Pos
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Product of sums Simplification Simplify the following Boolean function in 1. Sum of Products(SOP) 2. Product of Sums(POS) F(w,x,y,z) = ∑(0,1,2,5,8,9,10)
1.Sum of products Squares marked with 1’s represent minterms of the function F = x`z` + x`y` + w`y`z Squares marked with 0’s represent maxterms of the function 2. Product of sums F` = w x + y z + x z` F=(w`+x`)+(y`+z`)+(x`+z)(by DeMorgan’s theorem)
yz
y
wx
x w
z
Implementation of function F x` z` y` w` z
F = x`z` + x`y` + w`y`z
Implementation of function F w` x` y` z` z
F =(w` +x`)(y`+z`)(x`+z)
DON’T – CARE CONDITIONS The functions that have unspecified outputs for some input combinations are called incompletely specified functions or Don’t care conditions This conditions can be used on a map to simplify the Boolean expression.
F(w,x,y,z) = ∑(1,3,7,11,15) d(w,x,y,z) =∑ (0,2,5) Truth Table
F = y z + w`x`
Truth Table
F = y z + w`z
F = y z + w`z F(w,x,y,z) = y z + w`x`= ∑(0,1,2,3,7,11,15) F(w,x,y,z) = y z + w` z = ∑(1,3,5,7,11,15) F` = z` + w y` F(w,x,y,z) =z(w` +y) = (1,3,5,7,11,15)
NAND IMPLEMENTATION AND -Invert
Invert - OR
Two – Level Implementation
F = AB + CD
Multi – Level NAND Circuits AND – OR Gates
F= A(CD+B)+BC
NAND Gates
GENERAL PROCEDURE •Convert all AND gates to NAND gates with AND Invert graphic symbol •Convert all OR gates to NAND with Invert OR graphic symbol. •Check all the bubbles in the diagram. For every bubble that is not compensated by another small circle along the same line,insert an inverter or complement the input literal.
Graphic Symbol for NOR OR -Invert (x + y + z)`
Invert - AND (x + y + z)`
Implementing F = (A+B)(C+D)E
F = (AB` + A`B)(C + D`)
Other Two level Implementations
OR – AND –INVERT Implementation
OR - NAND
OR - NAND
NOR - OR
EXCLUSIVE – OR Function
x⊕ y = x y`+x`y
AND –OR - NOT
With NAND Gates
x ⊕ y = x y` + x`y (x⊕y)`= x y + x`y` x ⊕ 0= x x ⊕ 1 = x` x⊕ x=0 x ⊕ x` = 1 x ⊕ y` = x`⊕ y = (x⊕ y)` (x⊕y) ⊕ z = x⊕ (y ⊕ z) = x⊕ y⊕ z
Odd and Even Function 3- input odd function
3- input Even function
Parity Generation and Checking 3 –bit Even Parity Generator
4 –bit Even Parity Checker
Even Parity Generator Truth Table
1.Sum of products Squares marked with 1’s represent minterms of the function F = x`z` + x`y` + w`y`z Squares marked with 0’s represent maxterms of the function 2. Product of sums F` = w x + y z + x z` F=(w`+x`)+(y`+z`)+(x`+z)(by DeMorgan’s theorem)
yz
y
wx
x w
z
Implementation of function F x` z` y` w` z
F = x`z` + x`y` + w`y`z
Implementation of function F w` x` y` z` z
F =(w` +x`)(y`+z`)(x`+z)
DON’T – CARE CONDITIONS The functions that have unspecified outputs for some input combinations are called incompletely specified functions or Don’t care conditions This conditions can be used on a map to simplify the Boolean expression.
F(w,x,y,z) = ∑(1,3,7,11,15) d(w,x,y,z) =∑ (0,2,5) Truth Table
F = y z + w`x`
Truth Table
F = y z + w`z
F = y z + w`z F(w,x,y,z) = y z + w`x`= ∑(0,1,2,3,7,11,15) F(w,x,y,z) = y z + w` z = ∑(1,3,5,7,11,15) F` = z` + w y` F(w,x,y,z) =z(w` +y) = (1,3,5,7,11,15)
NAND IMPLEMENTATION AND -Invert
Invert - OR
Two – Level Implementation
F = AB + CD
Multi – Level NAND Circuits AND – OR Gates
F= A(CD+B)+BC
NAND Gates
GENERAL PROCEDURE •Convert all AND gates to NAND gates with AND Invert graphic symbol •Convert all OR gates to NAND with Invert OR graphic symbol. •Check all the bubbles in the diagram. For every bubble that is not compensated by another small circle along the same line,insert an inverter or complement the input literal.
Graphic Symbol for NOR OR -Invert (x + y + z)`
Invert - AND (x + y + z)`
Implementing F = (A+B)(C+D)E
F = (AB` + A`B)(C + D`)
Other Two level Implementations
OR – AND –INVERT Implementation
OR - NAND
OR - NAND
NOR - OR
EXCLUSIVE – OR Function
x⊕ y = x y`+x`y
AND –OR - NOT
With NAND Gates
x ⊕ y = x y` + x`y (x⊕y)`= x y + x`y` x ⊕ 0= x x ⊕ 1 = x` x⊕ x=0 x ⊕ x` = 1 x ⊕ y` = x`⊕ y = (x⊕ y)` (x⊕y) ⊕ z = x⊕ (y ⊕ z) = x⊕ y⊕ z
Odd and Even Function 3- input odd function
3- input Even function
Parity Generation and Checking 3 –bit Even Parity Generator
4 –bit Even Parity Checker
Even Parity Generator Truth Table
