Table Parameter

PARAMETER Digital Supply Voltage Analog Supply Voltage Ground Digital Power-Fail Reset Voltage Active Current Input Low Voltage

SYMBOL

CONDITIONS

VDVDD VAVDD

VAVDD = VDVDD

GND

AGND = DGND

VRST

Monitors VDVDD

IDD

VAVDD = VDVDD = 2.7V (Note 2)

VIL

MIN TYP MAX 2.7 3.6 2.7 3.6 0 0 2.59 2.69

UNITS V V V

2.64

V μA

285 DGND 0.30 x

V VDV

DD

Input High Voltage

VIL

Output Low Voltage Output High Voltage I/O Pin Capacitance RST Pullup Resistance Input Leakage Current XTAL,RST Input Leakage Current All Other Pins Input Low Current for RST CLOCK SOURCE

VOL

IOL = 4mA

VOH

IOH = -4mA

CIO

Guaranteed by design (Note 3)

External Clock Frequency VOLTAGE REFERENCE Internal Reference Voltage FSK INPUT

RRST IILRX IIL IIL1

V V V pF

15 19 45 -30 +30 -2 +2

k� μA μA

VIN = 0.4V

1

μA

70 fHFIN

-1% +1%

VREF

Input Voltage Range at FSK_IN FSK OUTPUT Output Voltage at FSK_OUT Frequency of FSK_OUT (Note 4)

0.75 x VDVDD VDVDD DGND 0.4 0.8 x VDVDD

3.6864

MHz

1.23

V

0 VREF VOUT

AC-coupled max 30k� load For a mark For a space

400 600 -1% +1% -1% +1%

V

500 1200 2200

mVP-P Hz

PIN

NAME

1, 2 3, 9,

DVDD DGND

FUNCTION Digital Supply Voltage Digital Ground

16, 17, 18 4

RST

5

OCD

6

RTS

7 8 10

XTAL1 XTAL2 XCEN

11 12

AVDD FSK_OUT

13

REF

14

FSK_IN

15 19 20

AGND D_OUT D_IN EP

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Active-Low Reset, Digital Input/Output. This pin includes an internal pullup resistor and is driven low as an output when an internal reset condition occurs Carrier Detect, Digital Output. A logic-high indicates a valid carrier detection on FSK_IN. OCD = 1 when FSK_IN amplitude is greater than 120mVP-P. OCD = 0 when FSK_IN amplitude is less than 80mVP-P. Request to Send, Digital Input. When set high, the device is put into the demodulator mode. A logic-low puts the device into modulator mode. Crystal Pin or Input for External Clock at 3.6864MHz Crystal Pin or Output of the Crystal Amplifier External Clock Enable, Digital Input. When set high, this pin allows the user to drive an external clock signal through XTAL1. When in this mode, XTAL2 should be left unconnected. An external crystal must be connected between XTAL1 and XTAL2 when set low. Analog Supply Voltage FSK Out, Analog Output. Output of the modulator. Provides a phasecontinuous, FSK-modulated output signal (1200Hz and 2200Hz output frequencies) to the 4–20mA current loop interface circuit. Reference, Analog Output. The internal voltage reference is provided as output. This pin must be connected to a 0.1μF capacitor FSK In, Analog Input. Input for the FSK-modulated HART receive signal from the 4–20mA current loop interface circuit Analog Ground Digital Data Out, Digital Output. Output from the demodulator. Digital Data In, Digital Input. Input to the modulator. Exposed Pad. Should be connected to ground (DGND, AGND).