Memory Access Methods Um Presentation

  • November 2019
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MEMORY ACCESS FOR MORE THAN ONE BYTE Prepared for : Sir Muhammad Saeed Prepared by : Umar Moin, Student of Class : Bs(CE)-5a

Standard Symbol for a 64K x 8 RAM Chip

General one byte data memory access

How To Access more then a byte ? • There are two ways: – Use more then one 8-bit ram chips in parallel – Access a single 8-bit chip in more then one memory cycles

Using more then one 8-bit ram chips in parallel

Intel 8086 Architecture Example • Intel 8086 microprocessor is a first member of x86 family of processors. Advertised as a "source-code compatible" with Intel 8080 and Intel 8085 processors, the 8086 was not object code compatible with them. The 8086 had

complete 16-bit architecture - 16bit internal registers, 16-bit data bus, and 20-bit address bus (1 MB of physical memory).

8086-80186-80286-80386sx • The 8086 had 2 memory banks – Even bank – Odd bank As it had a 16 bit architecture it required 16-bit memory The first 8-bits were provided by the even bank and the last 8bits were provided by the odd bank

80386-80486-pentium memory • Any number of bytes can be achieved by using parallel 1-byte memory chips – E.g. the memory system of 80386-80486-pentium used 4-byte (32-bit) memory by using 4 1-byte memories in parallel

Using more then one memory cycles

Intel 8088 Architecture Example • Intel 8088 microprocessor is almost identical to the Intel 8086 processor with the exception of the external data bus. External data bus width of the 8088 was reduced to 8 bits, and instruction queue size and prefetching algorithms were changed. Intel 8088 used two consecutive bus cycles to write or read 16 bit data instead of one cycle for the 8086. This made the processor to run slower, but on the plus side the hardware changes in the 8088 CPU made it compatible with 8080/8085 peripherals.

Intel 8088 (a) • Memory Cycle 1 • First 8 bits

MEM 8-bit

D0 – D7

Intel 8088 (b) • Memory Cycle 2 • Last 8 bits

MEM 8-bit

D8 – D15

Conclusion • Using more than one memory cycle to get more then one byte data wastes CPU time and increases memory references • Thus using more than one 1-byte memory chips in parallel is better

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