Direct Memory Access

  • October 2019
  • PDF

This document was uploaded by user and they confirmed that they have the permission to share it. If you are author or own the copyright of this book, please report to us by using this DMCA report form. Report DMCA


Overview

Download & View Direct Memory Access as PDF for free.

More details

  • Words: 263
  • Pages: 1
Direct Memory Access 1. DMA able to direct access to the memory while CPU is disable, this enable the memory components & DMA controller to transfer data between memory & I/O device. 2. Used for DMA is DRAM refresh, refreshing the video display screen, disk memory system reads & writes, fast memory to memory transfer. 3. DMA will always take over CPU when using the bus because only 1 master can be server at a time ,if CPU is working DMA will idel 8237 DMA Controller 1. It bypasses CPU & direct connects between peripherals & memory for fast transfer of data. 2. It controller has 40-pin chip ,4 channels for transferring data ,& each only for 1 device to transfer data 3. Every channel there are 2 associated signals ,DREQ(DMA Request)for input (such as hard disk controller) & DACK(DMA Acknowledge )for signal send back to device. 4. It rate of transfer 1.6M bytes per second ,each channel is capable of addressing a full 64k bytes section of memory & can transfer up to 64k bytes with programming. 8237 DMA Interface 1. DMA has 4 independent channels from 0 through 3,each is dedicated to a specific device ,such as floppy or hard disk. 8237 Controller Chips 1. DMAC chip is use fo servicing 8 bit device. DMA Operations 1. when DMA transfer data by bus it will sends a signal called HRQ to CPU & CPU will respond by sending signal HLDA to give permission. 2. Fixed priority :channel 0 is always servicing & channel 3 service only no other channel is active.

Related Documents