Edc Q2
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Section A Marks 2 each compare the characteristics of silicon and a germanium diode and determine which you would prefer to use for most practical applications. What will happen to output a.c. signal if the d.c. level is insufficient in an amplifier? Sketch the effect on waveform. What do you mean by Gain_Bandwidth product? Explain the concept of photoconductivity. What is programmable UJT? What is thermal runaway? What do you mean by Rise Time, Fall Time and Propagation Delay? What is ripple factor? Which of three configurations of BJT has a low voltage gain and highest output resistance? Why? What is Shockley equation? Section B Marks 5 each 2. (a) Describe why IG is effectively zero amperes for a JFET transistor. (b) Why is input impedance to a JFET so high? (c) Why is terminology field effect appropriate for this three-terminal device? 3. Explain Bias compensation Methods. 4. Given IE = 2.5 mA, the=140, hoe=20ms (m mho) and hdb=o.5 ms. Determine: (a) Common-emitter hybrid equivalent circuit (b) Common- base remodel. 5. An emitter follower using p-n-p transistor with bo= 150 is at Ic=0.25 mA. The voltage signal source has Rs=3kΩ : (a) In order to make overall Ro=110 Ω determine RE. (b) For this value of RE obtain Av and input resistance. 6. Discuss the relative differences in mode of operation between LED and LCD display. Section C Marks 10 each
7. By drawing neat diagram, explain the working of BJT and FET and state their relative merits. 8. (a) Potential divider biasing from Vcc=15 volts is obtained for an n-p-n transistor. Given R1 72 kΩ, R2=18 kΩ, RE=1.4 kΩ, Rc=4 kΩ. Determine the operating point: (i) When b=125 (ii) When b is doubled. Use VBE’= 0.7 V and comment on stability of operating point with change in b. (b) What is bias stabilization? Determine the general stability factors for all the configurations. 9 (a) In a CE transistor amplifier when signal changes by 0.02 V, the base current changes by 10 mA and collector current by 1 ma. If the collector resistance Rc= 5kΩ and RL=10 kΩ, find: (i) Voltage gain (ii) Current gain (iii) Input impedance (iv) A.C. load resistance, and (v) Power gain. (b) What is Ebers-Moll Model? Explain in detail.
7. By drawing neat diagram, explain the working of BJT and FET and state their relative merits. 8. (a) Potential divider biasing from Vcc=15 volts is obtained for an n-p-n transistor. Given R1 72 kΩ, R2=18 kΩ, RE=1.4 kΩ, Rc=4 kΩ. Determine the operating point: (i) When b=125 (ii) When b is doubled. Use VBE’= 0.7 V and comment on stability of operating point with change in b. (b) What is bias stabilization? Determine the general stability factors for all the configurations. 9 (a) In a CE transistor amplifier when signal changes by 0.02 V, the base current changes by 10 mA and collector current by 1 ma. If the collector resistance Rc= 5kΩ and RL=10 kΩ, find: (i) Voltage gain (ii) Current gain (iii) Input impedance (iv) A.C. load resistance, and (v) Power gain. (b) What is Ebers-Moll Model? Explain in detail.
