INTRODUCTION Binary Coded Decimal (BCD) is a binary coding format in which each of the decimal digits (0-9) is expressed as a binary numeral; for example, in binary coded decimal notation 12 is 0001 0010, as opposed to 1100 in pure binary. The purpose of this project is to demonstrate the addition of two BCD numbers by using binary adders and half adders connected by logic gates. This project will include both a graphical representation of the circuits and an explanation of how they work.
BCD NUMBERS The binary equivalents of the decimal numbers are: 0 = 0000 1 = 0001 2 = 0010 3 = 0011 4 = 0100 5 = 0101 6 = 0110 7 = 0111 8 = 1000 9 = 1001 In BCD, the binary patterns 1010 through 1111 do not represent valid BCD numbers, and cannot be used.
BINARY ADDERS AND HALF ADDERS Binary adders and half adders are circuits designed to manipulate binary bits to perform binary mathematics in a computer it is constructed by using XOR and AND gates. Design Diagram and Block diagram is given below of Half Adder and Full Adders.
FIGURE 1
A half adder is a combinational circuit which performs the addition of 2 binary bits. It has two inputs (two operand bits) and two outputs (a sum bit and a carry-out bit).
BINARY ADDERS AND FULL ADDERS
A full adder is a combinational circuit which performs the addition of 3 binary bits. It has three inputs (two operand bits and a carry-in bit) and two outputs (a sum bit and a carry-out bit). It is composed of two half adders
FIGURE 2
. A four bit binary adder
is
a
combination of four full adders. It is a combinational circuit that can add two 4-bit binary numbers. This is a straight forward process. However, a BCD adder must test for an invalid binary sequence. This can be accomplished by adding a comparator circuit and a second adder. The comparator circuit tests for the presence of a 1 in the most significant bit and the presence of a 1 in either of the next to bits. The second adder consists of four full adder. Contingent on the outputs of the comparator circuit, the second adder will add a binary six (0110) to
the results of the original result. In the next diagram, a 4-bit adder will be represented by a rectangle with eight inputs and five outputs.
If the
results of the first adder are 0000, 0001 ,0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001
Then the comparator circuit and the 3-bit adder have no effect and this result is transmitted. However, if the results of the first adder are 1010, 1011, 1100, 1101, 1110, 1111 then the comparator circuit will catch these conditions and the 3-bit adder will add 0110 (Binary of Six ) to the number. 1010
1011
+0110
+0110
1100
1101 +0110
1110 +0110
1111 +0110
+0110 10000
10001
10010
10011
10100
10101 this has the logical result of adding 10 to the next BCD digit.
CONCLUSION Although the binary addition of Binary Coded Decimal numbers is not as straight forward as the binary addition of Base 2 numbers, it is possible. I have explained and demonstrated half adders, full adders, 3-bit and 4-bit binary adders, and comparators circuits. I have explained and demonstrated why the extra steps used with BCD addition are necessary.