Circuito Sumador_restador Bcd
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SUMADOR_RESTADOR BCD DE CUATRO BITS (A ± B), CON INDICACIÓN DE SIGNO EN EL SEGMENTO G DEL DISPLAY 2 MODO = 0 => SUMA MODO = 1 => RESTA
DISP1
DISP2 Dato2 Dato1 3
E
4321
4321
U1 74LS83 A4 A3 A2 A1 B4 B3 B2 B1
s4 s3 s2 s1
Cin Cout
U7 74LS83 A4 A3 A2 A1 B4 B3 B2 B1
U2 74LS83 U3 4585
s4 s3 s2 s1
Cin Cout
5V
A3 A2 A1 A0 B3 B2 B1 B0
OA>B OA=B OA
A4 A3 A2 A1 B4 B3 B2 B1
Gnd
abcdefg.
abcdefg.
U4 74LS48 s4 s3 s2 s1
Cin Cout
A3 A2 A1 A0
g f e d c b a
test RBI RBO
IA>B IA=B IA
U5B
Modo 0V
Gnd
DISP1
DISP2 Dato2 Dato1 3
E
4321
4321
U1 74LS83 A4 A3 A2 A1 B4 B3 B2 B1
s4 s3 s2 s1
Cin Cout
U7 74LS83 A4 A3 A2 A1 B4 B3 B2 B1
U2 74LS83 U3 4585
s4 s3 s2 s1
Cin Cout
5V
A3 A2 A1 A0 B3 B2 B1 B0
OA>B OA=B OA
A4 A3 A2 A1 B4 B3 B2 B1
Gnd
abcdefg.
abcdefg.
U4 74LS48 s4 s3 s2 s1
Cin Cout
A3 A2 A1 A0
g f e d c b a
test RBI RBO
IA>B IA=B IA
U5B
Modo 0V
Gnd
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