Ashutosh Jaiswal Resume

Ashutosh Jaiswal 4607 Timberglen Rd, Apt 2133, Dallas, TX- 75287, Phone: (817)-933-1540, e-mail: [email protected]

OBJECTIVE Seeking a full-time position, that will help me utilize my experience, knowledge & practical skills in the field of digital, analog and mixed circuit design or telecommunications.

SKILLS Languages

Matlab 2007, C, C++, VHDL, Perl, PIC BASIC, Parallel Programming using the MPI library in C, ALP

Simulation Software Tools

Simulink, LabVIEW v8.2, MultiSim OrCAD-Capture, Layout & P-spice; Altera - Quartus-II, & MAX Plus-II; Model Slim and Precision; Microsoft Office Tools –Word, Excel, Access, Power point ; Adobe Photoshop; NI ELVIS Development System; Omega tool(Ericsson) , MapInfo v7.8; TEMS Data Investigation; QFD Capture (Quality Function Deployment tool), NI Circuit Design Suite – MultiSim and Ultiroute Windows NT, Win95, 98, ME, 2000, XP, MS-Dos 8051(Intel), HSC12(Motorola), PIC 16F874, MSP430(Texas Instruments) Soldering (Board Level); Lab Instruments – Oscilloscope, Logic Analyzer, Spectrum Analyzer, Multi-meter

Operating Systems Microcontrollers Other Skills

EXPERIENCE R.F Engineering Intern, Ericsson, Plano- Texas (Aug 2006 – Apr 2007) • Analysis and investigation of data for initial tuning and post launch drives of 3G Networks and present the report to the customer • Responsible for analysis of drive test data (TEMS) for various markets and the outputs from the analysis tool (OMEGA) to make useful inferences from it, based on Layer 3 messaging, to narrow down the problem areas. (UMTS/WCDMA) • Validating the dropped calls, access failures, missing neighbor using TEMS investigation which would help in better analysis of KPI’s (Key Performance Indicators) • Assisted the programmer to implement new functionalities and algorithms in the analysis tool (OMEGA), in order to derive more accurate results Lab Set-up Manager, St. Mary’s University, San Antonio- Texas (Jun 2006- Aug 2006) • In-charge for setting up a control systems and data acquisition laboratory in the university • Responsibilities included management of budget, ordering research equipment, installation of all the components required, interfacing respective circuits with the computer and verify functionality of the equipment, design, implementation and verification of lab experiments, development of LabVIEW based workstations and testing Graduate Assistant, St. Mary’s University, San Antonio-Texas (Jan 2006 – May 2006) • Graduate Teaching Assistant for the course Circuit Analysis-II and Electronics Lab, in the Electrical Engineering Department • Responsibilities included assistance of the professor in teaching the class, mentoring the students with topics related to the coursework and grading of assignments, labs and tests Circuit Design Engineer, Eikone Inc, Frisco-Texas. (Aug 2003- Dec 2005) • Designed and fabricated a circuit and PCB for diagnosis of a computer based skin analysis kiosk • Responsibilities included identification of design parameters using QFD capture, implementation of design, simulation of design using MultiSim, PCB design using Or CAD Layout, fabrication of prototype, and final prototype fabrication (board level) • Design involved use of some analog components such as current transformer, comparator, amplifier, triggering circuit and some digital components such as logic gates, decoder and opto-coupler Voluntary Circuit Designer, Real India Orphan Home, Hyderabad, A.P, India (Jan 2003 - July 2003) • Designed and fabricated a device that served as a learning aid for children. It helped the children learn words and form sentences using them, using a key pad interface to the user • Design used the PIC 16F872 micro-controller as the central processor and APR 6016 IC for voice recording. An SPI interface was incorporated for successfully recording and playing back audio files from the voice IC

EDUCATION •

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St. Mary’s University, San Antonio M.S, Electrical Engineering (GPA: 3.79/4.0) Graduation expected: Aug 2007 Amaravati University, Maharashtra, India B.E (Bachelor of Engineering), Electronics and Telecommunication Engineering (GPA: 3.9/4.0)

(Jan 2006 - Present)

(Aug 1999- May 2003)

Ashutosh Jaiswal 4607 Timberglen Rd, Apt 2133, Dallas, TX- 75287, Phone: (817)-933-1540, e-mail: [email protected]

PROJECTS •

Evaluation and real time implementation of different techniques for a wireless indoor communication channel and a comparative study of their effect on the BER – Masters Project ( Jan 2007 – Present) Implementation and evaluation of a wireless system using EVM TRF 6903/MSP430 from Texas Instruments is being performed. BER is being used to indicate the channel characteristics and a comparative study is being done to show how it can be improved using different schemes and techniques such as convolutional encoding, vertibi decoding and block interleaving. Elevator design and control simulation using LabVIEW ( Jan 2007– May 2007) Designed and fabricated an elevator mechanism prototype, which was controlled using LabVIEW software. Design included some interface circuitry comprising of photocells, latching circuits and motor driving circuit, in order to control the elevator prototype with LabVIEW VI programs via digital port of the NI ELVIS bench top workstation. Design and Fabrication of a “Wall Following Robot” using HSC12 microcontroller (Jan 2007 – May 2007) Designed and fabricated a wall following robot which was controlled by a HSC12 microcontroller. Design consisted of four IR sensors and a differential motor drive which were interfaced to the microcontroller using the A/D channel and digital ports respectively. A wall following algorithm was designed and implemented in ALP to solve an unknown maze. VGA Interface with Keyboard, for PONG video game using VHDL (Aug 2006 – Jan 2007) Designed and implemented VHDL code for PONG video game using Altera UP2 Educational FPGA board. An interface to VGA port and PS2 port was configured. Quartus II was used to simulate the design and verify the functionality of the circuit, based on timing and control. Implementation of Digital Door lock using VHDL& Xilinx Spartan-3 board ( Jan 2005- May 2005) Designed and implemented “Digital door Lock” using VHDL coding. Implemented a hardware design intended for synthesis and place/route, which was downloaded into a FPGA Xilinx Spartan-3 Starter Board, to verify the working of the design. The design was simulated using Model Slim. Vision Based Robotic System – Senior Design Project ( Nov 2002- Apr 2003) Designed and implemented “Vision Based Robotic System” based on digital image processing and feedback control. Project involved design and fabrication of hardware to interface the robot via the parallel port, design and fabrication of the PCB and software implementation (using C++ and Matlab) to complete the interface.

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RELEVANT COURSES • • • • • • • •

Linear Integrated Circuits Digital Circuit Design Computer Architecture Digital Signal Processing R.F Circuit Design Electronic Circuit Design Wireless Communications MEMS Technology

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Digital Integrated Circuits VHDL VLSI Design Microprocessor Applications Digital Image Processing Electronic Instrumentation Data Networks Data Acquisition &Analysis

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Parallel Processing using MPI & Open MP Electronic Devices Theory (Semiconductor Theory) Advanced Electronic Devices and Circuits Digital Communications Telecommunication Systems Micro Computer Interfacing Microprocessors (MC9S12DP256) Specification, Design and Implementation of Software Systems

TECHNICAL PAPERS • •

A.Jaiswal, “Single Chip Multiprocessors: An Overview”, as a part of course work for Parallel Processing, St.Mary’s University, San Antonio. A. Jaiswal, K.Siddhantham, S. Ghosh, “Implementation of 4-DOF structure for a MEMS gyroscope”, as a part of course work for Introduction to MEMS, University of Texas at Arlington.

ACTIVITIES/AWARDS AND ACHIEVEMENTS • • •

Attended workshop of “Total Quality Management with ISO-9000”. Result: Grade “A”. “Vision Based Robotic System” was selected as an exhibit at the National Technical Exhibition held at Hyderabad, India in September 2003. Achieved awards, medals and certificates for painting, sketching, social service and sports during high school and undergraduate study.