NR
Code No: 74266/MT
M.Tech. – II Semester Regular Examinations, September, 2008 ADVANCED DIGITAL IC DESIGN (Electronics & Communications) Time: 3hours
Max. Marks:60 Answer any FIVE questions All questions carry equal marks ---
1.a) b)
Explain working of CMOS inverters. Discuss the static characteristics and switching characteristics of MOSFET.
2.a) b)
Discuss the working of pseudo – NMOS, and domino logic gates. What is meant by deplection load? Discuss its effect on MOS gates.
3.a)
Explain with neat diagrams how SR latch circuit and clocked latch works. Write brief notes on edge triggered circuits.
b) 4.
What is meant by dynamic logic circuits? Discuss in detail the high performance dynamic CMOS circuits.
5.
What is a ROM? Discuss in detail the design issues in memory and array structures.
6.a) b)
Discuss about power consumption in CMOS circuits. Explain clearly the Quasi – adiabatic logic circuits.
7.a)
Discuss clearly the switching characteristics in BICMOS logic circuits. Explain about on – chip clock generation and distribution.
b) 8.
Write short notes on the following a) Latch up and its prevention b) BICMOS applications c) Multi – threshold CMOS. $$$