Toshiba Pcb Design Manual For Colour Tv Design

TOSHIBA INFORMATION SYSTEMS (UK) LIMITED Design Engineering

PCB DESIGN RULE MANUAL FOR CTV DESIGN

English Translation: Formatting and Revision: Revision: Revision:

Anthony Haggitt, M Takahashi, James Head, James Head, James Head, Chizu Taylor

1991 10 January 2001 15 November 2002 30 April 2003

Contents PCB DESIGN RULE MANUAL FOR CTV DESIGN ............................................................. 1  1 

Application ................................................................................................................... 1 

2 

Definition of Technical Terms .................................................................................... 1 

3 

2.1 

PBB (Printed Base Board) ................................................................................................ 1 

2.2 

PWB (Printed Wiring Board) ............................................................................................ 1 

2.3 

PCB Assembly................................................................................................................... 1 

2.4 

SS PCB (Single Sided PCB) ............................................................................................. 1 

2.5 

DS PCB (Double Sided PCB) ............................................................................................ 1 

2.6 

Multi-PCB ........................................................................................................................... 1 

2.7 

Hole Cuts ........................................................................................................................... 1 

2.8 

Top Side ............................................................................................................................. 1 

2.9 

Copper Side ....................................................................................................................... 1 

2.10 

Raw Material ...................................................................................................................... 1 

2.11 

Clad Material ...................................................................................................................... 2 

2.12 

Etching ............................................................................................................................... 2 

2.13 

Hole .................................................................................................................................... 2 

2.14 

Definition of Punched Hole Size ...................................................................................... 2 

2.15 

General Pattern ................................................................................................................. 2 

2.16 

Copper Pattern .................................................................................................................. 2 

2.17 

Land and Test Point Land ................................................................................................ 2 

2.18 

Track (Strip) ....................................................................................................................... 2 

2.19 

Solder Resist ..................................................................................................................... 2 

2.20 

Solder Land ....................................................................................................................... 3 

2.21 

Silver Through Hole .......................................................................................................... 3 

2.22 

Silver Through Hole Pitch ................................................................................................ 3 

2.23 

Plugged Via........................................................................................................................ 3 

General Items ............................................................................................................... 3  3.1 

Storage Conditions For PCBs .......................................................................................... 3 

3.2 

Soldering Conditions for PCBs ....................................................................................... 3 

3.3 

Operating Ambient Conditions ........................................................................................ 3 

4 

Designing "Out Of Standard" ..................................................................................... 3 

5 

Layout........................................................................................................................... 3 

6 

5.1 

Determining Single or Double Sided PCB Use ............................................................... 3 

5.2 

Layout Method................................................................................................................... 3 

Documents Involved for Production .......................................................................... 4  6.1 

Copper Pattern Drawing (Bottom Side) .......................................................................... 4 

6.2 

Solder Resist Pattern Drawing (Bottom Side) ................................................................ 4 

7 

6.3 

Copper Pattern Drawing (Top Side) ................................................................................ 4 

6.4 

Solder Resist Pattern Drawing (Top Side) ...................................................................... 4 

6.5 

Copper-Cut Pattern Drawing (Bottom Side) ................................................................... 4 

6.6 

Solder Resist Cut Pattern Drawing (Bottom Side) ......................................................... 4 

6.7 

Copper-Cut Pattern Drawing (Top Side) ......................................................................... 4 

6.8 

Solder Resist Cut Pattern Drawing (Top Side) ............................................................... 4 

6.9 

Silk Screen Ident Drawing (Top Side) ............................................................................. 4 

6.10 

Silk Screen Ident Drawing (Bottom Side) ....................................................................... 4 

6.11 

Layer 1 Copper Drawing ................................................................................................... 4 

6.12 

Layer 2 Copper Drawing ................................................................................................... 4 

6.13 

Layer 3 Copper Drawing ................................................................................................... 4 

6.14 

Layer 4 Copper Drawing ................................................................................................... 5 

6.15 

Solder Paste Drawing (Top Side) ..................................................................................... 5 

6.16 

Solder Paste Drawing (Bottom Side) ............................................................................... 5 

6.17 

Silver Through Hole Pad Drawing ................................................................................... 5 

6.18 

Silver Through Hole Overcoat Drawing .......................................................................... 5 

6.19 

Hole Drawing ..................................................................................................................... 5 

6.20 

Hole Modification List ....................................................................................................... 5 

6.21 

Group Hole Detail Drawing ............................................................................................... 5 

6.22 

V-cut Line Drawing ............................................................................................................ 5 

6.23 

X/Y Grid List....................................................................................................................... 5 

6.24 

Chip Grid List .................................................................................................................... 5 

6.25 

Chip Location Map (Chip Assembly Drawing) ............................................................... 5 

6.26 

Auto Insertion List ............................................................................................................ 5 

6.27 

NC Data .............................................................................................................................. 5 

6.28 

Standard Specification for PWB ...................................................................................... 6 

6.29 

Production Specification for PWB ................................................................................... 6 

Raw Materials .............................................................................................................. 8  7.1 

Selection of Raw Materials ............................................................................................... 8  Board resistance (Ω /cm3) .............................................................................................................. 8  Surface resistance (Ω) ................................................................................................................... 8  Insulation resistance (Ω) ................................................................................................................ 8  Dielectric Constant (tan δ) ............................................................................................................. 8  Dielectric Dissipation Factor (ε) of Insulation Board ...................................................................... 8  Water Retention (%) Characteristics ............................................................................................. 8  Stress and Impact Resistance ....................................................................................................... 8  Stress Through Bending and Winding Forces ............................................................................... 8  Flame Retardant Grade ................................................................................................................. 8  Anti-Tracking Characteristics..................................................................................................... 8  Thickness................................................................................................................................... 8  Price........................................................................................................................................... 8 

7.1.1  7.1.2  7.1.3  7.1.4  7.1.5  7.1.6  7.1.7  7.1.8  7.1.9  7.1.10  7.1.11  7.1.12 

7.2 

Conformity of Safety Standard ........................................................................................ 8  Flame Retardant Requirement For Electric Power Less Than 15 W ............................................ 9  Flame Retardant Requirement For Electric Power Greater Than 15 W ........................................ 9 

7.2.1  7.2.2 

7.3 

PCB Raw Materials.......................................................................................................... 10 

7.3.1 .......................................................................................................................................................... 10  7.3.2 .......................................................................................................................................................... 10 

8 

Grade of PCB and Process ....................................................................................... 13 

9 

Design Standards ...................................................................................................... 16  9.1 

Drawing Grids.................................................................................................................. 16  Basic and Auxiliary Grids ............................................................................................................. 16  Basic Hole .................................................................................................................................... 16  Hole Location ............................................................................................................................... 16  Location of Special Group Holes ................................................................................................. 16 

9.1.1  9.1.2  9.1.3  9.1.4 

9.2 

PCB Outline Sizing .......................................................................................................... 17  Standard Size .............................................................................................................................. 17  Maximum Board Outline Size ...................................................................................................... 17  Minimum Board Outline Size ....................................................................................................... 17  PCB Outline Tolerance ................................................................................................................ 18  PCB Outline Shape ...................................................................................................................... 18  Multi-Boards (Panellised Boards) ................................................................................................ 19  Standard PCB Outline Size.......................................................................................................... 20  Design Standard for Break-off Boards ......................................................................................... 21  Hole Cut Standard ....................................................................................................................... 22  V Cut Standard (Scoring) ........................................................................................................ 23  Standard for V Cut Jumping .................................................................................................... 24  Standard for Setting V cut ....................................................................................................... 24 

9.2.1  9.2.2  9.2.3  9.2.4  9.2.5  9.2.6  9.2.7  9.2.8  9.2.9  9.2.10  9.2.11  9.2.12 

9.3 

Basic Rules For Component Location .......................................................................... 25 

9.4 

Drawing the Copper Pattern ........................................................................................... 34  Basic Design Rules for Drawing the Copper Pattern................................................................... 34  Ground or Earth Pattern Drawing ................................................................................................ 35  Guidelines for Drawing Power Supply Copper Pattern................................................................ 36  Drawing Copper Pattern for Components Fitted After Bath Soldering ........................................ 36 

9.4.1  9.4.2  9.4.3  9.4.4 

9.5 

Drawing the Copper Side Solder Resist Pattern .......................................................... 37 

9.6 

Solder Lands for Unit Test ............................................................................................. 38  Size of Test Lands ....................................................................................................................... 38  Minimum Clearance Between Lands ........................................................................................... 38  The Number of Test Lands .......................................................................................................... 38  Dead Space for Unit Test Equipment .......................................................................................... 39 

9.6.1  9.6.2  9.6.3  9.6.4 

9.7 

Land Size ......................................................................................................................... 40  Standard Land Size ..................................................................................................................... 40  Minimum and Maximum Size of Land.......................................................................................... 40 

9.7.1  9.7.2 

9.8 

Strength of Lands Against Mechanical Stress ............................................................. 44  Maximum Mechanical Stress on a Land ...................................................................................... 44  Solder Resist Clearance for Heat Sinks ...................................................................................... 44  Countermeasure for the Absorption of Static Stress ................................................................... 45  Spare Land to Prevent Solder Bridging ....................................................................................... 45 

9.8.1  9.8.2  9.8.3  9.8.4 

9.9 

Holes and Hole Pitch ...................................................................................................... 48  Round Hole Size and Tolerance .................................................................................................. 48  Square Hole Size and Tolerance ................................................................................................. 48  Hole Positions and Hole Position Tolerance................................................................................ 48  Considerations When Using Square Holes ................................................................................. 48  Minimum Distance Between Hole and Board Edge (refer to Figure 9-46) .................................. 49  Minimum Clearance Between Holes and Copper Pattern ........................................................... 49  Slits .............................................................................................................................................. 54  PCB Attachment Holes ................................................................................................................ 55  Holes not on the Copper Pattern (Ventilation and Adjustment Holes etc.).................................. 57  Guide Holes ............................................................................................................................. 57 

9.9.1  9.9.2  9.9.3  9.9.4  9.9.5  9.9.6  9.9.7  9.9.8  9.9.9  9.9.10 

9.10 

Width of the Copper Pattern .......................................................................................... 59  Minimum Copper Pattern Width .............................................................................................. 59  Copper Pattern Width and Currant Capacity ........................................................................... 59  Copper Pattern Width and Resistance .................................................................................... 59  Minimum Copper Pattern Width with Regard to Heavy Components ..................................... 59  Minimum Copper Pattern Widths for Circuit Areas.................................................................. 59 

9.10.1  9.10.2  9.10.3  9.10.4  9.10.5 

9.11 

Clearance Between Copper Patterns ............................................................................ 62  The Minimum Clearance is Governed by Manufacturing Restraints ....................................... 62  Minimum Copper Pattern Clearance with Regard to the Board Assembly ............................. 62  Clearance of Copper Pattern with Regard to Withstand Voltage ............................................ 62  Standard Clearance Between Copper Patterns ...................................................................... 64  Resistance to Burning Under Non-Connection Fault Conditions ............................................ 67 

9.11.1  9.11.2  9.11.3  9.11.4  9.11.5 

9.12 

Minimum Distance Between Board Outline & Copper Pattern ................................... 67 

9.13 

Regulation for Solder Resist .......................................................................................... 68 

9.14 

Silk Screen ....................................................................................................................... 69  Silk Screen: Copper Side and Top Side .................................................................................. 69  Silk Screen Contents ............................................................................................................... 69 

9.14.1  9.14.2 

9.15 

Square Pins ..................................................................................................................... 77  Size of Square Pins ................................................................................................................. 77  Hole Size for Square Pin ......................................................................................................... 77  Position of Square Pin ............................................................................................................. 77  Depth of Square Pin Insertion ................................................................................................. 78  Square Pin for Supporting Assembled Unit ............................................................................. 78 

9.15.1  9.15.2  9.15.3  9.15.4  9.15.5 

9.16 

Eyelets.............................................................................................................................. 78  Purpose of Eyelets .................................................................................................................. 78  Type and Size of Eyelets ......................................................................................................... 78  Eyelet Position ......................................................................................................................... 79 

9.16.1  9.16.2  9.16.3 

9.17 

Board Edge Connectors ................................................................................................. 81 

9.18 

Attachment Method for Shield Cases ........................................................................... 82 

9.19 

Standard for Wiring on the Copper Side ....................................................................... 83  Land Size for Copper Side Parts ............................................................................................. 83  Number of Copper Side Components ..................................................................................... 83  Standard Copper Pattern for Disconnection (Solder Pads) .................................................... 84  Pattern Slit for Service Requirement ....................................................................................... 84 

9.19.1  9.19.2  9.19.3  9.19.4 

9.20 

Special Case Lands for IC and Mini-Connectors ......................................................... 85  Land Sizes ............................................................................................................................... 85 

9.20.1 

9.21 

Standard for Auto-Insertion (AI) Components ............................................................. 85  AI Land 5.0 mm Pitch .............................................................................................................. 85  AI Land 7.5; 10.0; 12.5; 15.0; and 20.0 mm Pitch ................................................................... 85  AI Land 2.5 mm Pitch Non-Axial (N Clinch) ............................................................................ 87  AI Land 5.0 mm Pitch Non-Axial.............................................................................................. 88  AI Land Transistor (3 pin TO-92 Type) .................................................................................... 89  AI Reference Axis .................................................................................................................... 89  Axial Components ................................................................................................................... 90  Board Edge Clearance for Auto-Inserted Axial Components .................................................. 90  Board Edge Clearance for Auto-Inserted Non-Axial Components .......................................... 91  Board Edge Clearance for Square Pins .................................................................................. 92  Performance Requirement for Auto-Insertion Machine ........................................................... 92  Non-Axial Components (Radial Components) ........................................................................ 93  Large Components .................................................................................................................. 94  Minimum Distance Between Components and Square Pins................................................... 95  Clearances for Auto-Inserted Chip Components..................................................................... 96  Stand Off Oxide Resistors ....................................................................................................... 97  Check Sheet for AI Components ............................................................................................. 99  Standard for Auto-Insertion using Special Inserter ............................................................... 102 

9.21.1  9.21.2  9.21.3  9.21.4  9.21.5  9.21.6  9.21.7  9.21.8  9.21.9  9.21.10  9.21.11  9.21.12  9.21.13  9.21.14  9.21.15  9.21.16  9.21.17  9.21.18 

9.22 

Standard for Auto-Alignment and ATE of Assembled TV Units ............................... 103  Standard for Parts of the Board that will be Supported During Test ..................................... 103  Component Height on the Board ........................................................................................... 103  Space Around Guide Holes ................................................................................................... 104  Restrictions on the Surrounding Space of Components ....................................................... 104  Restrictions on the Location of Components to be Auto-Inserted ......................................... 105 

9.22.1  9.22.2  9.22.3  9.22.4  9.22.5 

10 

Silver Through Hole Standard ............................................................................ 107 

11 

Silver Through Hole Standard DM-ST003E ........................................................ 108 

12 

Silver Through Hole Abstract ............................................................................. 108 

13 

Silver Through Hole Design Rules ..................................................................... 108 

13.1 

General ........................................................................................................................... 108 

13.2 

Silver Migration ............................................................................................................. 108  How Silver Migration Occurs ................................................................................................. 108  Countermeasures for Silver Migration ................................................................................... 109 

13.2.1  13.2.2 

13.3 

Rated Current ................................................................................................................ 109 

13.4 

Bowing of the PCB Panel ............................................................................................. 109 

13.5 

Sulfuration ..................................................................................................................... 109 

13.6 

Attachment to Power Board ......................................................................................... 109 

13.7 

Approved Silver Through Hole PCB Manufacture ..................................................... 110 

14 

Silver Through Hole PCB Types ......................................................................... 110 

14.1 

Double Sided Copper Through Hole PCB ................................................................... 110 

14.2 

Single Sided Copper with Single Sided Silver Wire Jumper PCB (PJC) .................. 110 

14.3 

Single Sided Copper with Single Sided Silver Wire PCB (PRC) ............................... 111 

14.4 

Other Types ................................................................................................................... 111 

15 

Silver Through Hole Documentation and Drawings for Production ................ 111 

16 

Raw Materials for Silver Through Hole PCB ...................................................... 111 

17 

Production Process of Silver Through Hole PCB ............................................. 111 

18 

Production Standard ........................................................................................... 112 

18.1 

Board Thickness ........................................................................................................... 112 

18.2 

Thickness of Copper Pad ............................................................................................. 112 

18.3 

Height of Silver Through Hole ..................................................................................... 112 

18.4 

Rated Current for Silver Through Hole ....................................................................... 112 

18.5 

Silver Through Hole Resistance .................................................................................. 112 

18.6 

Insulation Resistance ................................................................................................... 112 

18.7 

Dielectric Strength ........................................................................................................ 112 

18.8 

Potential Difference Between Silver Through Holes ................................................. 112 

18.9 

Temperature Range ...................................................................................................... 112 

19 

Design Standard .................................................................................................. 112 

19.1 

Design Standard for Different Manufacturers ............................................................ 112 

19.2 

Silver Through Hole Copper Land Board Edge Clearance........................................ 113 

19.3 

Silver Through Hole Copper Land and Break-off Hole Clearance ............................ 113 

19.4 

Silver Through Hole Copper Land and V-cut (Scoring) Line .................................... 113 

19.5 

Silver Through Hole and Component Hole Clearance ............................................... 113 

19.6 

Silver Through Hole Diameter ...................................................................................... 114 

19.7 

Crossing of Top Side Copper Pattern and Wire Jumper ........................................... 114  Basic Rule for Crossing JP Links and Top Copper Pattern .................................................. 114  Wire Link and Top Copper Pattern Clearance ...................................................................... 114  Clearance of Copper Pattern with Regard to Withstand Voltage (refers to 9.11.3) .............. 115 

19.7.1  19.7.2  19.7.3 

19.8 

Topside Pattern and Lead Parts Relationship for Double Sided Silver Via PCB .... 115  Application ............................................................................................................................. 115  Standard ................................................................................................................................ 115 

19.8.1  19.8.2 

20 

Design Standard for Chip Mount Patterns ......................................................... 116 

20.1 

Pattern ............................................................................................................................ 116  Pattern Design ....................................................................................................................... 116  Pattern Width and Clearance ................................................................................................ 116  Pattern Clearance to Board Edge and Through Hole ........................................................... 116  Pattern Clearance to Copper Lands ...................................................................................... 116 

20.1.1  20.1.2  20.1.3  20.1.4 

20.2 

Chip Component Position ............................................................................................ 117  Centre Position ...................................................................................................................... 117  Clearance Between Chip Components ................................................................................. 117 

20.2.1  20.2.2 

20.3 

Fiducial Markings .......................................................................................................... 120  Local Fiducials for Flat Package ICs ..................................................................................... 120  Position of Fiducial (AMF) Mark ............................................................................................ 120  Shape of Fiducial Mark .......................................................................................................... 121  Fiducial Marks for Printing Solder Paste Film ....................................................................... 121 

20.3.1  20.3.2  20.3.3  20.3.4 

21 

Copper Pattern Design ........................................................................................ 121 

21.1 

General Idea of Copper Pattern Design ...................................................................... 121 

21.2 

Requirement for Copper Pattern Design .................................................................... 122 

21.3 ............................................................................................................................................. 122 

22 

Copper Pattern Design for Surface Mount IC Package .................................... 123 

22.1 

Dip Side .......................................................................................................................... 123 

22.2 

Pattern Design Standard for FPIC (QFP, SOP) ........................................................... 123  Pattern Size ........................................................................................................................... 123  Solder Resist Size ................................................................................................................. 124  Solder Paste Printing Size ..................................................................................................... 124 

22.2.1  22.2.2  22.2.3 

22.3 

Pattern Design Standard for J-leg IC (SOJ, PLCC) .................................................... 125  General Component Size ...................................................................................................... 125  Land Area .............................................................................................................................. 126  Solder Paste Printing Size ..................................................................................................... 126  Solder Resist Size ................................................................................................................. 126 

22.3.1  22.3.2  22.3.3  22.3.4 

22.4 

Pattern Design Standard for PLCC Package .............................................................. 126  General Component Size (PLCC 1.27 mm pitch) ................................................................. 126  Land Area .............................................................................................................................. 126  Solder Paste Printing Size ..................................................................................................... 126  Solder Resist Size ................................................................................................................. 126  Setting Standard for Outer Lands (Corner Lands) ................................................................ 127 

22.4.1  22.4.2  22.4.3  22.4.4  22.4.5 

22.5 

Pattern Design Standard for Surface Mount ICs ........................................................ 127  Laid Down Track Widths........................................................................................................ 127  Copper Through Hole (Reflow Side) ..................................................................................... 127  Direction of Chip Mounting for Dip Side ................................................................................ 128 

22.5.1  22.5.2  22.5.3 

22.5.4 

23 

Silk Screen Idents .................................................................................................................. 128 

Design Material Reference .................................................................................. 130 

23.1 

Surface Insulation Resistance Between Patterns ...................................................... 130  Relationship Between Copper Pattern Shape and Surface Insulation Resistance ............... 130  Temperature Characteristic of Surface Insulation Resistance .............................................. 130  Relationship of Surface Insulation Resistance and Humidity ................................................ 130  Anti-Heat and Anti-Humidity Characteristic ........................................................................... 131 

23.1.1  23.1.2  23.1.3  23.1.4 

23.2 

Capacitance Between Copper Patterns ...................................................................... 132  Relationship Between Copper Pattern Shape and Capacitance........................................... 132  Temperature Characteristics for Capacitance ....................................................................... 133  Anti-Heat and Anti-Humidity of Capacitance ......................................................................... 134 

23.2.1  23.2.2  23.2.3 

23.3 

Inductance of the Copper Pattern ............................................................................... 135 

24 

Design Checklist .................................................................................................. 136 

25 

Appendix A Index of Figures .............................................................................. 138 

26 

Appendix B Index of Tables ................................................................................ 141 

PCB Design Manual

1

Application

This manual applies to the design of the following types of PCB for colour televisions and monitors:

2

•

Single sided, paper phenol, with non-plated through holes

•

Double sided, paper phenol, with non-plated through holes

•

Double sided, paper phenol, with silver through holes (vias)

•

Double sided, glass epoxy, with copper plated through holes

Definition of Technical Terms

This definition is for PCBs and both their component processes and reference terms. 2.1 PBB (Printed Base Board) This is defined as a board with a printed foil pattern, a printed solder resist pattern, and a die punched hole cut out. Figure 2-1 PCB Production Process

2.2 PWB (Printed Wiring Board) This is defined as a board with a printed foil pattern, printed solder resist pattern, die punched hole cut out, and both component side (top side) and copper side (foil side) component ident printing. In other words, a PBB plus ident printings. 2.3 PCB Assembly This is defined as a PWB with the electrical components assembled onto the board. 2.4 SS PCB (Single Sided PCB) This is defined as a PCB with a printed foil conductive pattern on only one side of the board. 2.5 DS PCB (Double Sided PCB) This is defined as a PCB with a printed foil conductive pattern on both sides of the board. 2.6 Multi-PCB This is defined as a large panel made up of individual "break-off" boards. 2.7 Hole Cuts These are defined as breakout holes for "motherboards" bearing several "child" boards. 2.8 Top Side This is defined as side of the board from which through-hole components are inserted. 2.9 Copper Side This is defined as the side of the board used for soldering of through-hole components by conventional "wave" soldering. 2.10 Raw Material This is defined as the plain board material. Paper phenol resin is the most popular. Page 1

PCB Design Manual

2.11 Clad Material This is defined as the raw material with a sheet of conductive foil material adhered to one or both sides of the board. 2.12 Etching This is defined as the process whereby the conductive foil clad is selectively removed to leave the required conductive foil pattern behind. 2.13 Hole A hole is defined as a space cleared through the board, the foil pattern, and the resist pattern. 2.14 Definition of Punched Hole Size Figure 2-2 Definition of Punched Hole Size

2.15 General Pattern The pattern is defined as any artwork related to the PCB. However it is generally accepted that pattern refers to the conductive foil pattern unless otherwise stated. 2.16 Copper Pattern This is defined as the conductive foil pattern when the conductive material is copper. It is generally accepted that this is usually the case and therefore all future reference to foil pattern will be copper pattern, although the same rules apply for all foil materials. 2.17 Land and Test Point Land A land is defined as an area of copper pattern specifically for component leg attachment. A test point is defined as the contact land for the test probe located near the land. 2.18 Track (Strip) This is defined as a length and/or area of copper pattern on the PCB between two points. 2.19 Solder Resist This is defined as the layer of printed pattern material that prevents solder adhering to areas of the copper pattern during the soldering process. It is usually green in colour though may also be blue, brown, or red.

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PCB Design Manual

2.20 Solder Land This is defined as the area of the copper land left exposed as bare copper by the solder resist pattern. This is the area to which solder will adhere during soldering. 2.21 Silver Through Hole This is defined as the copper through hole filled with silver filler, a mix of phenol, and epoxy resin. 2.22 Silver Through Hole Pitch This is defined as the minimum distance or pitch between silver though holes. 2.23 Plugged Via This is formed on both the top and bottom side of a silver though hole by the printing process. It is a coating over the surface of the silver through hole. The hole is not coated by resist.

3

General Items

3.1 Storage Conditions For PCBs Boards should be stored in the following conditions: Temperature Humidity

5 °C to 35 °C 45 % to 85 %

As temperature and humidity increase the copper will oxidise badly, and the resistance of the board material itself will decrease. PCB shelf life, when stored correctly, is only 3 months. 3.2 Soldering Conditions for PCBs The melted solder temperature should be between 250 °C and 260 °C, and the soldering time, a maximum of 3 to 4 seconds. The maximum soldering iron temperature should be 300 °C. This conforms to TDS No. 22-58-1. 3.3 Operating Ambient Conditions Under normal operation the temperature of the PCB should be between –20 °C and 100 °C, and the humidity between 20 % and 95 %. This applies below an altitude of 3000 m.

4

Designing "Out Of Standard"

If it is decided that part of a design needs to be out of standard then the relevant department must be contacted, and the requirement discussed before proceeding. Any out of standard design must be clearly stated in the specification for the design.

5

Layout

5.1 Determining Single or Double Sided PCB Use As a basic rule, all boards for television manufacture should be single sided due to cost and complexity considerations. However, it is sometimes not possible to achieve this under particular space and/or complexity constraints, in which case double-sided boards may have to be used. 5.2 Layout Method The constraining rules and recommendations for this method are described in the text but see the "P-CAD Engineering Manual" or the SFX Manuals for fuller descriptions of the practical modern technique.

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PCB Design Manual

6

Documents Involved for Production

6.1 Copper Pattern Drawing (Bottom Side) This is the film used to create the copper pattern by etching on the bottom side of the PCB. The image is a positive film, the black print being the copper pattern. 6.2 Solder Resist Pattern Drawing (Bottom Side) Bottom side solder resist covers the areas to be protected from stray soldering during solder-bath. It also ensures adequate soldering and prevents solder bridges, copper corrosion, and copper peeling. Generally solder resist should not cover the copper area of the land. The image is a negative film, the black print on the drawing representing the area not to be covered with solder resist and the clear areas showing the area to be covered by solder resist. 6.3 Copper Pattern Drawing (Top Side) A topside copper pattern drawing is required for double sided and multi-layered boards. The image is a positive film, the black print being the copper pattern. 6.4 Solder Resist Pattern Drawing (Top Side) A topside solder resist pattern drawing is required for double sided and multi-layered boards. Its purpose is the same as the bottom side solder resist and again is a negative image. 6.5 Copper-Cut Pattern Drawing (Bottom Side) This drawing represents copper to be removed from the copper pattern to create a final image for producing films for etching. It is combined with the copper pattern of 6.1. This is a negative image. 6.6 Solder Resist Cut Pattern Drawing (Bottom Side) This drawing represents areas to be removed from the solder resist pattern to create a final image for producing films for solder resist application. It is combined with the solder resist pattern of 6.2. 6.7 Copper-Cut Pattern Drawing (Top Side) This drawing represents copper to be removed from the copper pattern to create a final image for producing films for etching. It is combined with the copper pattern of 6.3. This is a negative image. 6.8 Solder Resist Cut Pattern Drawing (Top Side) This drawing represents areas to be removed from the solder resist pattern to create a final image for producing films for solder resist application. It is combined with the solder resist pattern of 6.4. 6.9 Silk Screen Ident Drawing (Top Side) This drawing represents the silkscreen idents, i.e. component reference markings and component outlines on the topside of the PCB. 6.10 Silk Screen Ident Drawing (Bottom Side) This drawing represents the silkscreen idents, i.e. component reference markings and component outlines on the bottom side of the PCB. 6.11 Layer 1 Copper Drawing This drawing represents the internal layer, Layer 1 in a multi-layer PCB. 6.12 Layer 2 Copper Drawing This drawing represents the internal layer, Layer 2 in a multi-layer PCB. 6.13 Layer 3 Copper Drawing This drawing represents the internal layer, Layer 3 in a multi-layer PCB.

Page 4

PCB Design Manual

6.14 Layer 4 Copper Drawing This represents the internal layer, Layer 4 in a multi-layer PCB. 6.15 Solder Paste Drawing (Top Side) This drawing represents the solder paste for the topside. A solder paste screen of apertures for applying solder paste is chemically etched using the gerber file for the topside solder paste. 6.16 Solder Paste Drawing (Bottom Side) This drawing represents the solder paste for the bottom side. 6.17 Silver Through Hole Pad Drawing This drawing represents the pattern for the overcoat used on silver through holes (also referred to as silver vias). 6.18 Silver Through Hole Overcoat Drawing This drawing represents the overcoat (resist) protection over the conductive area of a silver through hole. 6.19 Hole Drawing This drawing represents all component insertion holes, ventilation holes, slits, adjustment holes, and the PCB outline. 6.20 Hole Modification List This comprises a list of hole position or size differences between a previous hole drawing and a new hole drawing. The list shows where holes have been added or deleted. Holes changing in size or position are shown as one deleted hole and one added hole, being two hole changes. 6.21 Group Hole Detail Drawing This drawing shows hole sizes and positions for groups of holes such as a connector, scart socket, or CRT socket etc. 6.22 V-cut Line Drawing This drawing shows the position of any V-cut, or scoring lines across the board, such as on break-off boards and multi-boards. 6.23 X/Y Grid List This is a list of the x/y positions of all holes on the PCB. 6.24 Chip Grid List This is list of all chip mount components and the x/y positions of their centres of gravity. 6.25 Chip Location Map (Chip Assembly Drawing) This drawing shows the location of surface mount components as a block outline with the component reference in the centre. There are separate drawings for top and bottom sides of the PCB. 6.26 Auto Insertion List This is a list of all through hole components with the x/y positions of one hole (datum hole) and an angle, θ, for the rotation of the component. 6.27 NC Data This is a file used for programming CNC drill or rout machines, showing locations for holes, slots, and routing on the board. It can be an Excellon drill file or a Gerber file. Page 5

PCB Design Manual

6.28 Standard Specification for PWB Purchase specification describing standard items for PWB manufacture, supply, and quality. 6.29 Production Specification for PWB Purchase specifications for individual PCBs.

Page 6

PCB Design Manual Table 1 Documents Necessary for Production No. 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 6.11 6.12 6.13 6.14 6.15 6.16 6.17 6.18 6.19 6.20 6.21 6.22 6.23 6.24 6.25 6.26 6.27 6.28 6.29

Ο … Â

Type of Data Copper Pattern Drawing (Bottom Side) Solder Resist Pattern Drawing (Bottom Side) Copper Pattern Drawing (Top Side) Solder Resist Pattern Drawing (Top Side) Copper-Cut Pattern Drawing (Bottom Side) Solder Resist Cut Pattern Drawing (Bottom Side) Copper-Cut Pattern Drawing (Top Side) Solder Resist Cut Pattern Drawing (Top Side) Silk Screen Ident Drawing (Top Side) Silk Screen Ident Drawing (Bottom Side) Layer 1 Copper Drawing Layer 2 Copper Drawing Layer 3 Copper Drawing Layer 4 Copper Drawing Solder Paste Drawing (Top Side) Solder Paste Drawing (Bottom Side) Silver Through Hole Pad Drawing Silver Through Hole Overcoat Drawing Hole Drawing Hole Modification List Group Hole Detail Drawing V-cut Line Drawing X/Y Grid List Chip Grid List Chip Location Map (Chip Assembly Drawing) Auto Insertion List NC Data Standard Specification for PWB Production Specification for PWB

Gerber data or Film documents Paper documents or text files only for silver through hole PCB

„ U 

single sided double sided multi-layer out chip mount components yes/no yes no yes no yes no Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο Â Â Â Â … … … … … … … … … … … … … … … … … … „ „ „ „ „ „

U U

U U

U U

U U

U U

U U

…

…

…

…

…

…

U

U

U

U

U

U

 … …

 … …

 … …

 … …

 … …

 … …

Gerber data or paper documents Paper documents or text files Gerber data

Page 7

PCB Design Manual

7

Raw Materials

7.1 Selection of Raw Materials Raw material for PCB manufacture should be selected with regard for the following items, 7.1.1 through to 7.1.12. 7.1.1

Board resistance (Ω /cm3)

The electrical resistance of the actual raw material itself. 7.1.2

Surface resistance (Ω)

The electrical resistance of the raw material, together with the foil adhesive on the surface of the board. 7.1.3

Insulation resistance (Ω)

This is a combination of 7.1.1 and 7.1.2. 7.1.4

Dielectric Constant (tan δ)

This is the electrical capacitance of the raw material together with the foil adhesive. 7.1.5

Dielectric Dissipation Factor (ε) of Insulation Board

This influences dielectric dissipation factor between conductive patterns in close proximity, and between front and copper side conductive patterns. 7.1.6

Water Retention (%) Characteristics

Determined by comparing a board submerged in water at 23 °C for 24 hours with a dry board. 7.1.7

Stress and Impact Resistance

Stress and impact resistance is related to the strength of the PCB. 7.1.8

Stress Through Bending and Winding Forces

A conductive foil layered board that receives large stresses through bending and winding forces has a large size error when the PCB is manufactured. Also, through heat process of PCB production or soldering, boards that receive large stresses through bending and winding forces cause a breakage of the copper pattern or partially poor soldering. Moreover, it affects components auto-insertion. 7.1.9

Flame Retardant Grade

Marking shows the flame retardant grade for the material by burner test. The sets applied to DenkiYohin Law must use the listed PCBs that use defined flame-retardant grades. For details of the safety regulation, refer to section 7.2 7.1.10 Anti-Tracking Characteristics

Short-circuits can from gradually on the surface by a compound process of electrolyte pollution between the electric field and surface. A PCB, where a power greater than 15 W is supplied, require an IEC CT value greater than 600, and a pattern method of 200 V (0.4 mm interval) or greater than twenty (20) times H-OUT. 7.1.11 Thickness

For a single sided board, 1.6 mm is the general thickness. 7.1.12 Price

Price is relative to each characteristic mention in sections 7.1.1 to 7.1.10. 7.2 Conformity of Safety Standard The safety standard is divided into two sections; for circuit functions under 15 W or for circuit functions more than 15 W.

Page 8

PCB Design Manual 7.2.1

Flame Retardant Requirement For Electric Power Less Than 15 W

A voltage of less than 45 V peak at less than 15 W electric power is applied to the area, being less than 25 cm2. Table 2 Flame Retardant Requirements (< 15 W) Standard UL CSA IEC for Europe IEC for Asia

Requirement More than HB More than HB More than HB More than HB

Comment UL1492 20.1 table 7 C22.2 No.1 IEC60065 , 6th edition 20.1.3 IEC60065 , 6th edition 20.1.3

Specification V-0

Note: Requirement for safety standard is more than HB but in relation to the following, specification should comply with V-0. 7.2.2

Flame Retardant Requirement For Electric Power Greater Than 15 W

This requirement is limited to an area larger than 25 cm2. An electric power greater than 15 W is supplied, or a peak voltage below 45 V is applied. Table 3 Flame Retardant Requirement (> 15 W) Standard UL CSA IEC for Europe IEC for Asia

Requirement More than V-2 More than FV-1 More than FV-1 More than FV-1

Comment UL1492 20.1 table 7 C22.2 No.1 IEC60065 6th edition 20.1.3 IEC60065 6th edition 20.1.3

Specification

(1)

Japanese Domestic Market only, not included in this version of the manual.

(2)

UL1942 safety standard.

V-0

20.1 General materials. (a)

High molecule material and fibre material contacted to non-dielectric live area. Electric power greater than 15 W. V-2, V-1, V-0

(b)

High voltage area. Area with voltage of over 2500 V peak. V-2, V-1, V-0

20.5 Insulation material.

(3)

(a)

Clad materials used on the circuits having potential fire or electrocution risk must adhere to the following.

(b)

UL796, Symbol “▲” that satisfies the requirement of UL796, should be indicated. Also an individual type number should be indicated on the PWB.

CSA safety standard (a)

(4)

A printed wire assembles connected to AC mains or mains flow over 50 W under the normal operating condition should comply with the standard CSA-C22.2 No.0.17, which is equivalent to IEC60065.

For Europe and Asia (Sets complied to IEC standard): IEC60065 6th Edition 20.1.3 (a)

Materials for PCBs which operate under 400 V A.C. or D.C. of over 50 V, and excess power of 15 W should be categorised in FV1 of IEC60707. When a spark gap exists

Page 9

PCB Design Manual

on top of the condition mentioned, the material should be categorised in FV0 of IEC60707. 7.3 PCB Raw Materials See Table 5 for examples. Generally, for TV, a thickness of 1.6 mm ± 0.14 mm, with a copper foil thickness of 0.035 mm is used. For tuner, a thickness of 1.2 mm is used. Paper phenol laminate (TLC -132A) is used for CTV. 7.3.1

General single sided paper phenol PCB which does not require anti-tracking characteristic. R-8700 PLC-2147

(Matsushita) (Sumitomo)

MCL-437F DS-1107

(Hitachi) (Toyama Denki)

7.3.2

General single sided paper phenol PCB which requires anti-tracking characteristics. R-8700S CCP3400S (a)

(Shinkobe)

ELC-4970

(Sumitomo)

Glass epoxy PCB requiring anti-tracking characteristic. R1781

(c)

DS-1107A (Toyama Denki) MCL-437FS (Hitachi)

Glass epoxy PCB requiring high electric characteristic such as tuner. E-568

(b)

(Matsushita) (Chang chun corp)

(Matsushitu)

Glass epoxy PCB requiring thin profile, high electric characteristic, high size stability characteristic. PCB sparsely populated on one side, normal the other. TLC-551 (Toshiba Chemical)

Page 10

PCB Design Manual Table 4 thickness material NEMA/ANSI cubic Ω

surface Ω

insulation Ω

capacitance /dipole factor dielectric dissipation water content ratio heat resistance bending/ winding stress resistance flame resistance CTI

characteristic

unit mm Ω cm

FR1 1.6 paper phenol FR1

FR1 1.6 paper phenol FR1

CEM3 1.2, 1.6 glass epoxy CEM3

FR4 1.6 ~ 0.8 glass epoxy FR4

5x1012~1013

5x1012~1013

1~5x1015

1~5x1015

5x1011~1012

1~5x1012

5x1014~1x1015

5x1014~1x1015

5x1011~1012

1x1011~1012

1~5x1014

1~5x1014

5x1010~1011

1x1010~1011

5x1013~1X1014

5x1013~1x1014

1x1012~1013

1x1011~1012

5x1013~5x1014

5x1013~5x1014

1x108~109

5x107~5x108

5x1011~5x1012

5x1012~1x1013

4.5 ~ 5.0

4.5 ~ 5.0

4.4 ~ 4.6

4.6 ~ 4.8

5.0 ~ 5.5

4.8 ~ 5.3

4.5 ~ 4.7

4.7 ~ 4.9

0.045~ 0.050

0.045 ~ 0.050

0.017 ~ 0.024

0.015 ~ 0.020

0.050 ~ 0.055

0.050 ~ 0.055

0.020 ~ 0.026

0.017 ~ 0.023

0.7 ~ 1.0

1.0 ~ 1.2

0.08 ~ 0.12

0.05 ~ 0.10

normal

105

105

105

105

normal

2>

2>

6>

6>

Kgf/ mm2 -

after solder bath 250 °C for 3 s

12~16

12~16

25~35

45~55

UL94

94V-O

94V-O

94V-O

94V-O

V

IEC PUB 112

180

600

120

200

Flame resistance for normal circuit.

Flame resistance against tracking grade for high voltage circuit.

Flame resistance for normal circuit.

Flame resistance for double sided and multi layered, normal circuit boards.

Ω

Ω

-

-

% °C %

-

condition 20 °C 65% RH 96 hours 40 °C 90% RH 96 hours 20 °C 65% RH 96 hours 40 °C 90% RH 96 hours 20 °C 65% RH 96 hours 100 °C 2 hours 20 °C 65% RH 96 hours 40 °C 90% RH 96 hours 20 °C 65% RH 96 hours 40 °C 90% RH 96 hours 50 °C 24 hours 23 °C 24 hours

-

Electrical performance is average.

Electrical performance is average.

Electrical performance is good.

Electrical performance is good. Size accuracy is good.

Page 11

PCB Design Manual

Table 5 Raw Material Details Thickness MTL

Unit mm -

Measurement Conditions -

NEMA

-

-

Cubic Ω

Ωcm

Surface Ω

Ω

Insulation Ω

Ω

Dipole Factor (at 1MHz)

-

tan δ (at 1MHz)

-

Water Content Ratio Heat Resistance Bending/ Winding Stress Résistance Impact Resistance Flame Resistance

Advantages/ Disadvantages

%

20°C, 65%, 90 hrs.

TLC-321 1.6 Paperphenol XXXPC 1X1013 <

TLC-332-A 1.6 Paperphenol FR2 1X1012 <

TLC-332-T 1.6 Paperphenol FR2 1X1012 <

TLC-134 1.6 Paperphenol XPC-FR 5X1011 <

TLC-751 1.2 Fibre Glass CEM-3 5X1014 <

L-6514C 1.2 Fibre Glass CEM-3 5X1014 <

MA-7FR 1.2 Fibre Glass GPO-3 1X1013 <

TLC-132A 1.6 Paperphenol XPC-FR 5X1011 <

40°C, 90%, 96 hrs.

1X1012 <

1X1011 <

1X1011 <

5X1010 <

5X1013 <

5X1013 <

1X1012 <

5X1010 <

20°C, 65%, 90 hrs.

1X1012 <

1X1012 <

1X1012 <

1X1010 <

5X1013 <

5X1013 <

1X1012 <

1X1011 <

40°C, 90%, 96 hrs.

1X1011 <

1X1011 <

1X1011 <

1X109 <

5X1012 <

5X1012 <

5X1011 <

5X109 <

11

11

11

10

13

13

12

20°C, 65% in air, 90 hrs.

1X10 <

1X10 <

1X10 <

5X10 <

1X10 <

1X10 <

1X10 <

5X1010 <

100°C, in water, 96 hrs.

5X108 <

5X108 <

5X108 <

1X107 <

5X1011 <

5X1011 <

5X1011 <

5X107 <

20°C, 65%, 90 hrs.

4.5 >

5.0 >

5.0 >

5.5 >

5.0 >

4.5 >

4.2 + 0.3

4.0~4.5

20°C, 65%, 90 hrs.

0.04 >

0.04 >

0.04 >

0.055 >

0.028 >

0.03 >

0.03 >

0.04~0.05

40°C, 90%, 96 hrs.

0.05 >

0.05 >

0.05 >

0.10 >

0.032 >

0.04 >

0.04 >

0.05~0.06

0.75 >

0.75 >

0.75 >

3.6 >

0.12 >

0.30 >

0.70 >

3.6 >

105

105

105

105

105

105

105

105

6>

3>

2>

40

100

40°C, 90%, 96 hrs.

Air, 50°C, 24 hrs.

°C

Water, 23°C, 24hrs. Normal Condition

%

Temp Time

5>

5>

5>

2>

%

After Soldering (250°C 3s)

75

100

85

80

% -

After Soldering (250°C 3s) UL (Underwriters Lab), BS -

70 HB

100 V-0, BS

80 V-0, BS

Good Flame Resistance

Bending Flame & Impact Resistance Good

90 V-0 Flame Resistance & Price Good Electrical Performance not so good

Winding & Price good. Flammable

Page 12

V-0

V-0

60 V-0

100 V-1

Flame Resistance & Electrical Performance good High Price

Flame Resistance & Price good Performance not so good

Flame Resistance & Price good Performance not so good

Flame Resistance & Price good Performance not so good

PCB Design Manual

8

Grade of PCB and Process

PCBs come in two grades; X - High precision, fine pattern, expensive grade, low volume. Y - General precision, medium pattern, medium cost, mass production. A summary of these grades and their precision tolerances is given Table 6. Table 6 PCB Grades and Precision Tolerances Item Application

Precision

Production Process

Process Chart

SS Board DS Board

Copper Clad Size Pattern Clearance Tolerance Copper Pattern Film Position Solder Resist Film Position Foilside Ident Film Position Guide Hole Partside Copper Pattern Film Position Partside Solder Resist Film Position Partside Ident Film Position Copper Solder Resist Position Pattern Partside Copper Pattern Position Solder Resist Foilside Ident Relative Position Partside Solder Resist to Copper Pattern Relative Position Partside Solder Resist to Ident Relative Position Solder Resist Spreading Tolerance

PCB Grade X High Precision Low Volume Table 7 Table 8 250 X 250 mm

To be defined*

PCB Grade Y General Mass Production Table 7 Table 8 500 X 500 mm ± 0.05 mm ± 0.14 mm ± 0.25 mm ± 0.25 mm ± 0.26 mm ± 0.26 mm ± 0.26 mm ± 0.23 mm ± 0.23 mm

To be defined*

± 0.26 mm

To be defined*

± 0.26 mm

To be defined*

± 0.26 mm

To be defined*

+ 0.1 mm - 0.0 mm

* To be defined: values have not been determined yet, please refer to individual specifications. When designing boards for mass production, the following design standards apply: Minimum track width

0.25 ± 0.05 mm

In some cases, 0.20 ± 0.05 mm is allowable when necessary. Minimum clearance

0.25 ± 0.05 mm

In some cases, 0.20 ± 0.05 mm is allowable when necessary. Table 7 and Table 8 define the production process for single and double-sided PCB manufacture.

Page 13

PCB Design Manual Table 7 Single Sided Board Production Process PROCESS Single Sided Copper Board Raw Material Cutting

Format A

BOARD DRAWING

COMMENT

1010 (+10, –0) mm SHEET

Pattern Photo Resist Print Drying Etching Removal of Etch Resist Inspection Guide Hole Drilling Solder Resist Printing Resist Curing Foilside Ident Printing Ident Curing Topside Ident Printing Ident Curing Foilside Polishing Pre-flux Cutting Punching Inspection

500 mm x 500 mm stencil printing.

Page 14

PCB Design Manual Table 8 Double Sided Board Production Process PROCESS Double Sided Copper Board Raw Material Cutting

Format A

BOARD DRAWING

COMMENT

1010 (+10, –0) mm Material

Foilside Pattern Etch Resist Print Drying Topside Masking Foilside Etching Etch Resist Removal Inspection Topside Etch Resist Print Drying Foilside Masking Topside Etching Both Sides Etching Removal of Etch Resist Inspection Guide Hole Drilling for Punch Foilside Solder Resist Print Ident Curing Foilside Ident Print Ident Curing Topside Solder Resist Print Ident Curing Copper Polishing Pre-flux Cutting Punching Inspection

Page 15

PCB Design Manual

9

Design Standards

9.1 Drawing Grids Drawing grids define the datum (or reference) point location for all drawing entities such as components, tracks, and copper pattern etc. and should be used as the standard for datum location. 9.1.1

Basic and Auxiliary Grids

The basic (displayed) grid should be set at a pitch of 1.0 mm and the auxiliary (through hole component) grid set at 0.5 mm, or half of the displayed grid. Surface mount components and silver through hole grid should be set at 0.1 mm. 9.1.2

Basic Hole

Basic lines should conform to standard x, y Cartesian co-ordinates with the basic hole at the origin. The longest side of the drawing should be in parallel with the y-axis. The basic hole, or "Q hole", should be located at x = 5 mm, y = 5 mm on the bottom left hand corner from the outline of the PCB, as viewed from the bottom or copper side. In addition, "Q holes" should be located in each corner of the PCB, 5 mm in from the edge in either direction. 9.1.3

Hole Location

Except for group holes, any holes not centred on the 0.5 mm grid must be dimensioned individually with reference to the origin. 9.1.4

Location of Special Group Holes

The reference (datum location) point for a group hole must be positioned either in the centre of the group holes, or at the centre of the component outline. Prepare a detailed drawing of the group hole as shown in Figure 9-1. Figure 9-1 Group Holes

Page 16

PCB Design Manual

9.2 PCB Outline Sizing 9.2.1

Standard Size

The size of the PCB required will be dictated by the space available within the enclosure, the component count and component size. However, whichever size is required, it must fall into one of the standard size categories detailed in Table 9. (1)

Single sided board sizes are defined in Table 9.

(2)

The same applies to multi-boards but should be applied to the complete board.

(3)

When a board has an edge connection area, this should be located along the longest side of the board within the specified board dimensions. Table 9 PCB Standard Size Categories

Grade XY

Z

9.2.2

PCB Longest Side 330.0 245.0 137.5 120.0 85.0 77.5 Hot Punch (100°C) 334.0 299.0 198.0 164.0 139.0 121.0 107.0 96.0 86.0 79.0 72.0 66.0

195.0 105.0

160.0 95.0

Cold Punch (20°C) 330.0 245.0 194.0 160.0 135.0 117.0 103.0 92.0 82.0 75.0 68.0 62.0

PCB Shortest Side 247.5 165.0 80.0 67.5 47.5 42.5 Hot Punch (100°C) 299.0 165.0 123.0 98.0 81.0 67.0 60.0 53.0 48.0 43.0 39.0 36.0

122.5 97.5 60.0 52.5 37.5 Cold Punch (20°C) 248.0 164.0 122.0 96.0 80.0 68.0 59.0 52.0 46.0 41.0 38.0 34.0

Maximum Board Outline Size

The maximum board outline size is 330 mm x 249 mm, dictated by the solder cradle. 9.2.3

Minimum Board Outline Size

The minimum board outline size for auto inserted boards is 150 mm x 100 mm. There is no minimum size for manually inserted boards.

Page 17

PCB Design Manual 9.2.4

PCB Outline Tolerance

PCB outline tolerance is ± 0.5 mm for board sizes less than 150 mm and ± 0.3 mm for board sizes greater than 150 mm. See Table 10. Table 10 PCB Hole Size/Outline Tolerance

Tolerance

Class

Cold Punch Hot Punch Item Hole Size

Class 1 Hole Position Class 1/Class 2

Tolerance (mm)

Class 1 Class 2 Kind of Hole Round Square New Hole Modified Hole Square Hole

Outline

Round Hole Size New Design Round Hole Position Class 2 Modified Round Hole Position Square Hole Size Square Hole Position

Angle Tolerance

9.2.5

Class 1 Class 2 Common

Size Position Outline

Round and Square Holes

Normal Size (mm) 500 > ∅ 500 > ∅ 500 > ∅ 500 > ∅ 500 > ∅ 500 > ∅ 6>∅ 6 < ∅ < 18 18 < ∅ < 50 50 < ∅ < 125 125 < ∅ < 250 250 < ∅ < 500 6>∅ 6 < ∅ < 18 18 < ∅ < 50 50 < ∅ < 125 125 < ∅ < 250 250 < ∅ < 500 10 > ∅ 10 < ∅ < 50 50 < ∅ < 100 100 < ∅ < 1000

Tolerance ± 0.10 ± 0.20 ± 0.10 ± 0.20 ± 0.20 ± 0.30 ± 0.10 ± 0.12 ± 0.15 ± 0.20 ± 0.25 ± 0.30 ± 0.20 ± 0.22 ± 0.25 ± 0.30 ± 0.35 ± 0.40 ± 1° ± 30’ ± 20’ ± 10’

PCB Outline Shape

(1)

The shape must be rectangular or square.

(2)

The corners of the PCB should have a radius of 5.0 mm.

(3)

Board inner radii should also be a 5.0 mm and unused PCB areas isolated for breakout. See Figure 9-2. Figure 9-2 PCB Outline Shape

Page 18

PCB Design Manual 9.2.6

Multi-Boards (Panellised Boards)

(1)

A multi-board should generally only be designed if the individual boards are less than 100 mm x 100 mm in size, and the per-month quantity is 25 kpcs minimum. The total minimum quantity should also be in excess of 200 kpcs.

(2)

Multi-board arrangement format should be as shown in Figure 9-3 for two and four board arrangements. Boards should be positioned with the longest side following the grain of the PCB material, and all boards should be in the same direction. Figure 9-3 Multi-Board Arrangements

(3)

The maximum overall size of a multi-board PCB is 210 mm x 150 mm.

(4)

Breakout holes for a multi-board PCB: The minimum hole diameter is 1.0 mm and the minimum pitch centre is 2.5 mm. See Figure 9-5 and Figure 9-6. The minimum clearance between the copper pattern and the break hole is 1 mm, to allow for a 1 mm burr occurring at breakout.

(5)

The minimum slot width for a breakout hole is 1.5mm, and the maximum slot length is 50 mm.

(6)

It is recommended that the breakout line should consist of slots and holes in Position A, and holes only in Position B.

The combination of the multi-board arrangement is shown below Figure 9-4. It does not apply to hand-inserted boards. All boards should be orientated in the same direction and the pitch between boards the same. Figure 9-4 Multi-Board Arrangement

Page 19

PCB Design Manual Figure 9-5 Soldering Direction for Break-off Boards

9.2.7

Standard PCB Outline Size

For production efficiency a number of standard panel sizes are used. Do not use any other sizes for panels. Cut-outs can only be used on Paper Phenol. The following sizes can be chosen from the CAD menu: 249 mm x 330 mm 249 mm x 249 mm 198 mm x 330 mm 165 mm x 330 mm 165 mm x 198 mm 165 mm x 249 mm 123 mm x 198 mm 123 mm x 164 mm

} } Auxiliary Size }

Select from the menu, size for glass epoxy or silver through hole, unless this causes any inefficiency. In which case consult with production engineering and PCB manufacturer. Table 11 Round Hole Size Tolerance Hole Size < Ø 0.9 mm > Ø 1.0 mm

Tolerance + 0.1 mm - 0.05 mm ± 0.1 mm

The tolerance of a Square Hole is ± 0.2 mm.

Page 20

PCB Design Manual Table 12 Hole Position Tolerance New Design Size Tolerance ± 0.2 mm ± 0.25 mm ± 0.30 mm

< 125 < 250 < 500

Design Modification and Square Hole Hot Punch 125 ± 0.25 mm 250 ± 0.30 mm 500 ± 0.35 mm Angle Size < 10 > 10 < 50 > 50 < 100 >100 < 500

Tolerance ± 1° ± 0°30’ ± 0°20’ ± 0°10’

Note:

9.2.8

(1)

(1)

Semi-hot punch is applied to Paper-Phenol PCBs. Cold punch is applied to glass epoxy PCBs.

(2)

Angle tolerance is applied to hole size, position and outward form, and is common to both round and square holes.

Design Standard for Break-off Boards

Dead space for break-off. (a)

Minimum pattern clearance close to the hole-cut.

Table 13 Pattern Clearance for Break-offs

a : Near to hole-cut b: Near to slot

(b)

Pattern Width < 0.3 mm > 0.31 mm > 1.0 mm > 0.5 mm > 0.5 mm > 0.5 mm

Minimum pattern clearance near V cut.

Page 21

PCB Design Manual

(c)

Minimum chip mount component to hole-cut or V cut clearance.

Table 14 Chip Mount Component to V-cut/Breakoff Clearance compnent position x axis y axis

A 1.5 mm 2.0 mm

B 1.5 mm 2.5 mm

C 0.5 mm 0.5 mm

D 2.0 mm 3.0 mm

Note: In the case of chip mount outline being larger than chip land outline take the clearance measurement from the chip mount outline. 9.2.9

Hole Cut Standard

(a)

For large cut-outs add a slot of 1.5 mm width for ease of breakout. Figure 9-6 Hole Cut Standard

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PCB Design Manual

(b)

To prevent burrs from occurring on the edges of the PCB refer to Figure 9-7. Figure 9-7 Preventing Burring

9.2.10 V Cut Standard (Scoring)

(a)

Structure; both sides of the PCB should have identical scoring, or a "V cut".

(b)

Figure 9-8 shows the size and tolerance of a V cut. Figure 9-8 V cut size and tolerance

(c)

V cut position tolerance is 0.2 mm

(d)

V cut direction: V cuts should be located at a right angle to the long or short side of the PCB. A V cut cannot be cut diagonally.

(e)

V cut depth: the thickness of the PCB has priority over the depth of the V cut. Table 15 V cut Depth Board Thickness 1.6

Material Paper Phenol Silver Through-Hole Remaining Remaining Depth Depth Thickness Thickness 0.8 ± 0.1 mm 0.4 ± 0.1 mm 0.8 ± 0.1 mm 0.4 ± 0.1 mm

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PCB Design Manual

(f)

Board edge. There should be a cut-in or wedge in the edge of the board at the beginning of the V cut.

(g)

If the V cut is long than holes can be placed on the V cut line to avoid stresses against chip mount components. This is effective when V cut jumping cannot be placed. Note: It is necessary to consider component location when doing this as flux can run down and into the holes.

This applies to glass epoxy boards only, and not paper phenol boards. Paper phenol boards could be damaged during PCB manufacture if holes are added. 9.2.11 Standard for V Cut Jumping

Check with the manufacturer whether V-cut jumping is required or not.

9.2.12 Standard for Setting V cut

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PCB Design Manual

9.3 Basic Rules For Component Location (1)

Component parts should be spread over the board with an even density.

(2)

Components should be positioned with their centre lines along the x or y axis, see Figure 9-9. Figure 9-9 Basic Rules for Component Placement

(3)

Through hole components should only be mounted on the topside of the board.

(4)

Components should not cross over each other.

(5)

Jumper wires should not be angled except at 0°, 90°, 180° or 270°.

(6)

Where a high voltage is present both components and copper pattern should be widely spaced.

(7)

The safety clearance for components and pattern should be checked with the safety regulations for the individual country.

(8)

(a)

When using standoff components a tilt of ± 15° should be allowed for.

(b)

When using square wire wrapping pins, at least 2 mm should be allowed for the depth of the wrap. The minimum distance between the AC mains input posts and any cabinet mounted part (e.g. headphone socket) should be 10 mm.

(c)

Standoff component clearance should be such that after 300 g is applied the component still stands clear.

Adjacent standoff components should be mounted as shown in Figure 9-10. Figure 9-10 Stand-off Component Placement

(9)

The solder resist pattern must not be relied on as an insulator. Page 25

PCB Design Manual

(10)

Do not position temperature sensitive components close to hot components. The maximum temperature at any point on the PCB should never be more than 100 °C. Do not position a small component land immediately after a large component lead, such as a heat sink or tuner, to prevent dry joints from the solder bath.

(11)

Do not always rely on the strength of the component's legs or the PCB rigidity for providing mechanical support to larger components. This should be tested by impact and vibration tests. When using a bracket assembly to support a component, we must be aware of the thermal stress incurred, and the mechanical stress (maybe several KgF) that may remain after soldering due to expansion and contraction effects.

(12)

To improve mechanical strength, unused component legs should still be soldered (i.e. provide a land).

(13)

When positioning components with wide and narrow pitched legs, ensure the wide pitched side of the component is in parallel with the longest side of the board.

(14)

Keep the use of the PVC jumpers and tubing to a minimum.

(15)

Projection of component legs from the copper-side should be less than 6 mm in order not to touch the solder bath nozzle. To position a transistor (epoxy type) see Figure 9-11 for the correct orientation. Figure 9-11 Transistor Positioning

Good

Bad

Epoxy type transistors are currently popular, and should ideally be placed as below, assuming that clearance is not a problem.

(16)

Connectors should be placed at a minimum of 6 mm from the edge of the board as shown in Figure 9-12. Figure 9-12 Connector Placement In Relation To Board Edge

(17)

Lead insertion (DIP) ICs and connector components should be designed so that they are orientated as per Figure 9-13. Pitch should be less than 1.78 mm in order reduce dry joints and solder bridges. Page 26

PCB Design Manual Figure 9-13 DIP Orientation

(18)

Fine lead pitch components used on double sided chip mount PCBs should be positioned on the re-flow side to prevent solder bridges and dry joints.

(19)

Pattern location for specific component leads. When the lead shape is larger than the hole to secure the component, as in Figure 9-14, and the component body rests against the surface of the PCB, as in Figure 9-15 then component body must not come in contact with top side copper tracking. Care should be taken not to let the component body come in to contact with topside tracking. Figure 9-14 lead larger than hole

Figure 9-15 component body rests on PCB

The clearance indicated in fig is a standard based upon production quality requirements. In cases where this differs from the safety standard then priority should be given to the safety standard. (20)

The clearance between good conductors of heat such as test pins, HFC lead, and transformer casing etc. and electrolytic capacitors should be greater than 1.5 mm.

Page 27

PCB Design Manual

(21)

Due to restrictions on the mounting of the PCB assembly, certain areas around the edge of the board cannot be populated with component lands. Do not place components or lands within the shaded area shown in Figure 9-16. Figure 9-16 Board Edge Clearance

Figure 9-17 Restriction On Fitting PCB Into Cabinet Guides

L1 > 7.5 mm (Solder land size = ∅ 3.0 mm) L1 > 8.75 mm (Solder land size = ∅ 8.5 mm) L2 > 6.0 mm L3 > 6.0 mm

Page 28

PCB Design Manual

(22)

Restrictions on placing jumpers under ICs. This can cause problems where the length of the IC legs are not long enough and reduces soldering strength. If it is necessary to use wire jumpers underneath ICs then the following conditions should be satisfied. (1)

Jumper lead pitch should be a maximum of 7.5 mm.

(2)

Lead length underneath the board should be a minimum of 1 mm.

(3)

Jumper should be positioned as in diagram (a), and not as in diagram (b).

(a)

Standard of lead length underneath the board.

(b)

Bad example of a wire jumper underneath an IC.

* Ref: Wire Jumper insertion standard.

(23)

If there is a component to be attached later by solder dip then it should be covered by masking tape. The following diagram shows dead space in which components can not be positioned.

Acceptable widths of masking tape; 3 mm, 5 mm, 7 mm, 10 mm, 15 mm, and 20 mm. Tape width of 3 mm is not advisable as it is easy to peel off.

Page 29

PCB Design Manual

(24)

Clearance to prevent PCB Bowing. (a)

Figure 9-18 shows a clearance for the support bar that is set on the solder bath in the middle of the bottom side of the PCB along the X axis. Figure 9-18 Solder bar Support

(b)

Place topside silk screen idents to indicate position of solder bar support on bottom (copper) side. Use letter size of width 3 mm; length 8 mm if easy to read. There is no need to keep to this size. Figure 9-19 Topside Solder bar Ident

(c)

When the PCB is fixed on the chassis frame, the area of the PCB in contact with the frame should be identified by silkscreen to prevent misplacement. Figure 9-20 Chassis Frame Indicators

Page 30

PCB Design Manual

(25)

Clearance required on topside of PCB. Figure 9-21 shows the clearance required for the conveyor flyers on the production line. There should be no component outlines within the shaded area. Figure 9-21 Clearance on PCB topside

(26)

Clearance for "splash bar". There should be no component outline within the shaded area. Figure 9-22 Clearance for Splash Bar

Solder lands should not come into contact with outline.

Page 31

PCB Design Manual

(27)

If components or copper lands come within the shaded area in Figure 9-23, discuss with Production Engineering and arrange a suitable location for the support bar. Figure 9-23 Components within the area of the Support Bar

(28)

Standard for Screw Hole Location Do not place screw holes between the primary and secondary power circuits. If this can not be avoided then increase the distance between primary and secondary side from the normal 6.5 mm as shown in Figure 9-24. Figure 9-24 Clearance between Primary and Secondary Power Circuits with Screw Hole

14.5 mm – 8 mm = 6.5 mm 9.5 mm – 3 mm = 6.5 mm In the case of 3 mm screws, do not position any component within ∅14.5 mm of the screw. Do not place any copper pattern within ∅9.5 mm of the screw.

Page 32

PCB Design Manual

(29)

Location of Square Holes underneath ICs. Square holes are added to help engineers when IC has to be removed for service. The IC can be pushed from the copper side by tweezers whilst melting the leads with a soldering iron. Only add square holes for ICs with more than 30 pins.

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PCB Design Manual

9.4 Drawing the Copper Pattern 9.4.1

Basic Design Rules for Drawing the Copper Pattern

(1)

The pattern connection between lands should be as short as possible.

(2)

Avoid sharp corners in the pattern - no pattern bend should be less than 90°.

(3)

Make the copper pattern width as large as possible within the restriction listed below.

(4)

If an area of copper is larger than 25.4 mm diameter, then a hole or a break in the copper is required to allow any gases to escape during soldering.

(5)

The distance between adjacent patterns should be as wide as possible.

(6)

The shoulders between the lands and the tracks should be a smooth transitional curve.

(7)

The strip patterns (transitional curves) should be consistent throughout the board.

(8)

The pattern should run in parallel with the x and y axis, but when this is not possible the pattern should run in parallel with the adjacent pattern. See Figure 9-25 for examples. Figure 9-25 Good and Bad Copper Patterns BAD

GOOD

Page 34

PCB Design Manual 9.4.2

(1)

Ground or Earth Pattern Drawing

Make the impedance of the earth pattern as low as possible by spreading it out to fill all available gaps wherever possible. See Figure 9-26. Remember the rules in Section 9.4.1 (page 34). Figure 9-26 Ground Patterns

(2)

Each stage of an amplifier (say the SIF) should be surrounded by an earth pattern and the patterns joined at one point. Each circuit should be the same, with an enclosing earth pattern to prevent feedback loops being set up.

(3)

The earth patterns for each circuit (line deflection, field deflection, chroma/video, audio, µP and PSU) should be separate and joined at a single point, with the shortest possible distance to that point.

(4)

The earth patterns for AC and DC circuits should be kept separate.

(5)

Every circuit should have a separate earth pattern and these patterns should all be connected at one point. See Figure 9-27. Figure 9-27 Ground Connections

(6)

The earth pattern around the outside of the board should not be made a complete loop, so as to prevent inductive effects.

(7)

The circuit pattern returns A, B, C, as shown in Figure 9-27, should go back to a single point, and for any circuit earth pattern there should be only one connection to the chassis earth outside of the circuit. Earth patterns that are not connected should be made completely separate from each other. This is to prevent noise generated by the patterns touching via a mechanical component.

Page 35

PCB Design Manual

(8)

Decoupling capacitor earths on separate power supply circuits should return to earth at one point on the main PSU using the shortest possible path. This is to prevent hum building up in the supply networks.

(9)

Drawing the decoupling capacitor earth pattern.

(10)

9.4.3

9

Short and wide copper pattern.

9

The capacitor should be placed close to the load.

9

The capacitor should also be positioned at the power supply input rail to the circuit stage.

Drawing the RF decoupling capacitor earth pattern. 9

Short and wide copper pattern.

9

Draw a closed earth loop for the RF circuit current return.

Guidelines for Drawing Power Supply Copper Pattern

(1)

Use as wide as pattern as possible in order to reduce electrical resistance, increase current capacity and to increase mechanical strength.

(2)

The clearance between the patterns should also be as wide as possible.

9.4.4

Drawing Copper Pattern for Components Fitted After Bath Soldering

Figure 9-28 Components fitted after Solder Bath (1)

Figure 9-29 Components fitted after Solder Bath (2)

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PCB Design Manual

9.5 Drawing the Copper Side Solder Resist Pattern (1)

The resist should cover all areas except solder lands and edge connectors.

(2)

On the topside, the resist should cover all areas except solder lands.

(3)

When a copper pattern is common, two adjacent lands should be separated by a strip of resist 0.8 mm wide to achieve good soldering profiles. A different technique is used for wide and narrow pitch lands/holes. See Figure 9-30, Figure 9-31; and refer to Table 18 and Table 19 for distance data.

Figure 9-30 Solder Resist for Wide Pitch Holes

Figure 9-31 Solder Resist for Narrow Pitch Holes

Wide Pitch

Narrow Pitch

(4)

The size of the solder land should be correct for the component in order to ensure good soldering.

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PCB Design Manual

9.6 Solder Lands for Unit Test 9.6.1

Size of Test Lands Table 16 Test Land Sizes

For ICT

Size of Lands (minimum) ∅ 1.2 ∅ 2.5

Minimum Clearance of Lands (ref. 9.6.2) a, b, and c (all) 0.5 mm a, b, and c (all) 1.0 mm

For test equipment ∅ 2.0

9.6.2

a, b, and c (all)

0.5 mm

all places Horizontal Deflection Circuit Vertical Deflection Circuit Power Circuit Small Signal Circuit, e.g. reciever, micro-controller

Minimum Clearance Between Lands

The clearance between test lands and chip land outline should be as indicated in Table 16 and the diagram below. In the case of a chip land outline being larger than the chip land then the clearance should be measured between the chip land outline and the test land.

9.6.3

The Number of Test Lands

Information on the number and location of test lands for adjustment is obtained from Test Engineering. For ICT testing, place one test land on each net, as shown below, except where there is at least one discrete auto-inserted or hand-inserted component attached to the net. In other words ICT test lands are only required on nets that contain only chip mount components.

If a test land and a chip land is on a common net the test land and chip land should be separated by a strip of solder resist at least 0.8 mm wide to ensure good solderability.

Page 38

PCB Design Manual 9.6.4

Dead Space for Unit Test Equipment

There is no necessity to make a dead space for the unit test equipment as the unit test is covered within the region of chip mount dead space. In the case of multi-boards, dead space is required for the unit test since these boards are tested individually after being separated. In the case of complicated panel designs the requirements should be discussed with the test engineer during the design stage.

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PCB Design Manual

9.7 Land Size 9.7.1

Standard Land Size

For large or plug assembly type components that are under stress refer to Figure 9-32 that shows the standard and exceptional land sizes. For basic manual insertion land sizes refer to Table 17. 9.7.2

Minimum and Maximum Size of Land

When the standard is not used the minimum and maximum sizes are as follows: (1)

Hole Size The minimum round hole size diameter is 0.7 mm, and the minimum square hole size is 0.7 mm x 1.0 mm. (a)

If a square hole has a width of 0.7 mm to 0.9 mm, its length should be less than 3.0 mm.

(b)

The diameter D of a hole must be 0.2 mm bigger than the component leg diameter, d. Thus,

D ≥ d + 0.2 mm. (c)

In the case of multi-leg component group holes, the size of each hole can be calculated from the equation;

D ≥ d + 0. 2 + a 2 + b 2

mm

Component leg pitch tolerance = ± a mm can be found in the manufacturer's specification. Hole pitch tolerance = ± b mm can be found in Table 10. When a component has only 2 or 3 legs and they can be easily bent then a = b = 0, i.e.

D = d + 0.2 mm. Figure 9-32 Standard and Exceptional Land Sizes

Page 40

PCB Design Manual Table 17 Land Size For Manual Insertion Application Standard Copper Land

C B

Standard Solder Land

Land for Manual Insertion

A

E

Hole Diameter D = Ø 0.7 ~0.8 D = Ø 0.9 ~ 1.0 D = Ø 1.1 ~ 1.2 D = Ø 1.3 ~ 1.4 D = Ø 1.5 ~ 1.7 D = Ø 1.8 ~ 2.0 D ≥ 2.1 D = P, K D = Ø 0.8 ~ 1.0 D = Ø 1.1 ~ 1.2 D = Ø 0.7 ~ 0.8 D = Ø 0.9 ~ 1.0 D = Ø 1.1 ~ 1.2 D = Ø 1.3 ~ 1.4 D = Ø 1.5 ~ 1.7 D = Ø 1.8 ~ 2.0 D = P, K D = Ø 0.8 ~ 1.2

Grade X

Grade Y Ø 2.0 Ø 2.0 Ø 2.5 Ø 4.0 Ø 5.0 Ø 6.0 Ø 7.0 Ø 4.0 Ø 2.5 Ø 3.0 Ø 2.2 Ø 2.5 Ø 3.0 Ø 3.5 Ø 4.0 Ø 5.0 Ø 3.5 Ø 3.0

Notes } component } static wieght ≤3g copper side

Top Side } 8 mm } POTs General POTs B = Ø 3.5 B = Ø 4.0 Copper side Top Side

The value in the brackets can only be used with axial components mounted against the PCB. Also, the component static weight must be less than 0.8 g. The above method can also be used with low standoff components providing that there are nearby larger standoff components and the mechanical stress is not high. The maximum hole size for a component of leg diameter d mm:

D ≤ d + 0.4 mm as shown in Figure 9-33. Figure 9-33 Component Leg Diameters

For multi-leg components the maximum hole size can be calculated using the equation in Section 9.7.2 (c). (2)

Land Size Minimum size. Refer to Figure 9-34 where D is the hole diameter and F is the minimum distance from the centre of the hole to the edge of the land. F can be calculated from Table 18. Table 18 Minimum Distance From Hole Centre To Land Edge GRADE X Y

COPPERSIDE

TOPSIDE

F>(D/2)+0.45 mm

F>(D/2)+0.61 mm

Page 41

PCB Design Manual Figure 9-34 Minimum Distance From Hole Centre To Land Edge

This standard is to ensure good soldering, but does not allow for mechanical stress, in which case refer to Section 9.8, page 44. Maximum size. This is defined by the required pattern clearance as defined in Section 9.11. (3)

Solder Lands Minimum size. In Figure 9-35, D is the hole diameter and G defines the minimum distance from the centre of the hole to the edge of the resist. Table 19 gives the value of G. Table 19 Minimum Size Of Solder Land GRADE X Y

COPPERSIDE

TOPSIDE

G>(D/2)+0.61mm

G>(D/2)+0.66mm

Figure 9-35 Minimum Size of Solder Land

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PCB Design Manual

This standard is to ensure good soldering, but does not allow for mechanical stress, in which case refer to Section 9.8. Minimum size. As in Figure 9-30 and Figure 9-31, a strip of resist should be inserted to ensure good soldering.

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PCB Design Manual

9.8 Strength of Lands Against Mechanical Stress 9.8.1

Maximum Mechanical Stress on a Land

The maximum mechanical stress on a land can be calculated as follows:

P ≤ 7( Land size) = 5.5[ A 2 − (D + 0.2 ) ] X 1 2

(g)

P ≤ 10( SolderingArea) = 7.9[ B 2 − (D + 0.2 ) ] X 1

(g)

P ≤ 21.9(ComponentLegCrossSectionalCircumfrance) = 68.8d

(g)

2

Where: P A B D d X1

= maximum permissible land stress (g) = land diameter (mm) = solder land diameter (mm) = hole diameter (mm) = leg diameter (mm) = where a land has been cut, this is the percentage of the land left

X2 = where a land has been cut, this is the percentage of the solder land left NB: The equation assumes a 1 % de-rating, therefore if a land can take 1 kgF then 10 gF will be the maximum permissible. These requirements are necessary so as to provide good mechanical strength when under stress for a long period, perhaps causing some molecular creepage. 9.8.2

Solder Resist Clearance for Heat Sinks

Place a solder land around the hole required for a heat sink. The material used for the heat sink shown below is aluminium to which solder does not take. To the fix the heat sink securely apply solder to the copper side of the PCB.

When passing through the solder bath, solder attaches to the heat sink and creates short circuits which need to be knocked off after assembling. It is getting noticeable for solder to attach to heat sink legs when lead free solder is used.

Page 44

PCB Design Manual 9.8.3

Countermeasure for the Absorption of Static Stress

(a)

Stress under normal fitting conditions. If P exceeds the permissible limit then some additional component support will be necessary.

Figure 9-36 Mechanical Stress on Land (1)

9.8.4

Figure 9-37 Mechanical Stress on Land (2)

Spare Land to Prevent Solder Bridging

Where components have a lead pitch of less than 1.78 mm, such as ICs and connectors, then spare land should be included along the solder direction to prevent solder bridging. Refer to Figure 9-38. Figure 9-38 Spare Land to Prevent Solder Bridge

Page 45

PCB Design Manual Figure 9-40 Mechanical Stress on Land (4)

Figure 9-39 Mechanical Stress on Land (3)

Table 20 Components More Than 5g Component Carbon Resistor Metal Oxide Resistor Wire Wound Resistor Cement Wire Resistor Fusible Resistor

PP Film Capacitor

Myler Film Capacitors Super Capacitor Paper Capacitor

Electrolytic Capacitor

Rating 2W 7W 5 W (more than) 5 W (more than) 4 W (more than) 200 V 400 V 630 V 1250 V 1600 V 160 V (a.c.) 50V 100V 400V All

0.15 μF 0.082 μF 0.039 μF 0.027 μF 0.022 μF 0.1 μ 0.68 μF 0.68 μF 0.091 μF

63 V 10 V 16 V 25 V 35 V 50 V 100 V 160 V 200 V 250 V 315 V 350 V 400 V 450 V 500 V Big Mains Smoothing Capacitor

(more than) (more than) (more than) (more than) (more than) (across mains type) (more than) (more than) (more than)

Type 02 2200 μF 1000 μF 1000 μF 470 μF 330 μF 220 μF 33 μF 22 μF 22 μF 22 μF 10 μF 10 μF 33 μF

Type 04 2200 μF 1000 μF 470 μF 330 μF 220 μF 220 μF 33 μF 22 μF 22 μF 10 μF 10 μF 4.7 μF 3.3 μF 3.3 μF

Page 46

PCB Design Manual

(1)

Mechanical stress caused by board flexing. When component legs are strong, or the component is mounted close to the board, there will be mechanical stress incurred as shown in Figure 9-41, Figure 9-42 and Figure 9-43. Figure 9-41 Mechanical Stress (1)

Figure 9-42 Mechanical Stress (2)

Figure 9-43 Mechanical Stress (3)

The stress can be reduced in a number of ways: Position components so that the legs with the widest pitch are in parallel with the longest side of the board. A frame can be fitted to part, or all, of the board so as to protect it against bending or impact. If possible, mount components off the board or use components with flexible legs. (2)

Thermal stress during soldering. When a component is fixed as shown in Figure 9-44, a thermal related stress of several Kg can be incurred as a result of soldering. The thermal expansitivity of the board is 10 times that of the component legs, so when a component is fixed, a mechanical stress will remain on the component after soldering. To reduce this stress a soft absorber can be fitted as shown in Figure 9-45, and bends can be used in the component legs to allow for expansion. Figure 9-44 Retaining Screw to relieve Stress

Figure 9-45 Soft Absorber plus Retaining Screw

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PCB Design Manual

9.9 Holes and Hole Pitch 9.9.1

Round Hole Size and Tolerance

(1)

The minimum round hole size is 0.8 mm and size should be increased in steps of 0.1 mm, (diameter dimension).

(2)

For round hole tolerance refer to Table 10.

9.9.2

Square Hole Size and Tolerance

(1)

For square hole size refer to Table 21.

(2)

The tolerance for square holes is ± 0.20 mm. Table 21 Tolerance Of Square Holes Shortest Side 1.0 1.5

9.9.3

(1)

Longest Side 7.5 10.0 7.5 10.0

2.5 2.5

5.0 5.0

2.0

2.5 17.5

5.0 20.0

7.5 25.0

2.5

2.5 17.5

5.0 20.0

7.5 25.0

12.5 12.5

15.0

10.0

12.5

15.0

10.0

12.5

15.0

Hole Positions and Hole Position Tolerance

Hole Position The centre of the holes should be on the drawing grid. If this is not possible with some group holes, the centre point of the group holes should be on the drawing grids.

(2)

Hole Position Tolerance The tolerance of the distance between the hole centre and the xy reference lines can be found in Table 10.

9.9.4

(1)

Considerations When Using Square Holes

Decision to use Square Holes Square holes will reduce the strength of the board and the life of the punch tool. Because of this, it is recommended that round holes be used wherever possible.

(2)

Square Hole Radii The corner radii should be at least 0.5 mm to prevent the PCB cracking, and to extend the life of the punch tool.

(3)

Square Hole Minimum Size Table 22 Minimum Size For Square Holes Length/Width (mm) ~0.6 0.7 0.8 0.9 1.0~

~0.9

1.0~3.0

3.1~5.0

X X X X O X X O 0 X O O X O O O = OKAY X = NO GOOD

5.1~7.0

7.1~21.5

X X X O O

X X X X O

Page 48

PCB Design Manual 9.9.5

Minimum Distance Between Hole and Board Edge (refer to Figure 9-46)

(1)

The minimum distance from the edge of the board to the edge of a hole must be the same as the thickness of the board x 1.5.

(2)

Generally, if a hole is for a component leg then the minimum distance from the edge of the board to the centre of the hole should be 5.0 mm. If this is not possible, then 3.75 mm can be the minimum for main boards; refer to Figure 9-16. Figure 9-46 Minimum Distance for Component Hole to Board Edge

9.9.6

Minimum Clearance Between Holes and Copper Pattern

Design with regard for Sections i) to v) listed below; If component legs are flexible then the minimum pitch > 5.0 mm. If component legs are not flexible then the minimum pitch > 3.75 mm. The smaller pitch is not applicable to group hole components with hard legs. Flexible is defined as the flexibility of copper wire of diameter 0.45 mm. This is to prevent legs touching on the copper side. (1)

Refer to Figure 9-47 and Table 23. Figure 9-47 Clearance Between Holes and Copper Pattern

Page 49

PCB Design Manual Table 23 Hole/Land Measurement Guide (1) Y

Foil Side

Min Hole Pitch P

General Equation

Da = Db = 1 n =1 Da = Db = 1

Topside

Item

Restriction

2.8

3.4

n=2 Min Land Radius F Min Solder Land Radius G

D + 0.45 2 D + 0.61 2

Min Pattern Pitch h1 Min Pattern Clearance h2 Min Pattern Width W General Equation

0.25 0.25 0.25

Min Hole Pitch P

* 3.3

Da = Db = 1 n =1 Da = Db = 1

Mechanical Stress neglected

Voltage neglected Current neglected

Da − Db + 0.6 n + 1.6 2

3.9

n=2 Min Land Radius F Min Solder Land Radius G Min Pattern Pitch h1 Min Pattern Clearance h2 Min Pattern Width W

(2)

Da − Db + 0.6n + 1.3 2

Grade X

D + 0.61 2 D + 0.66 2 0.25 0.25 0.25

Mechanical Stress neglected

Voltage neglected Current neglected

Refer to Figure 9-48 and Table 24. This applies when there are two holes on the same land. If one hole is not used then make X = 0.

P>

Da + Db + BoardThickness 2

(Board Thickness is usually 1.6 mm but use 1.5 mm for equation.)

Page 50

PCB Design Manual Figure 9-48 Hole/Land Measurement Guide

Item Min Hole Equation

Grade Y

Pitch, P Da = Db = 1 Min Land Radius G

3.02

Min Width Resist X Min Hole Equation

0.8

Pitch, P Da = Db = 1 Min Land Radius G

3.12

Min Width Resist X

0.8

Da + Db + 2.02 2

Grade X

D + 0.61 2 Da + Db + 2.12 2

D + 0.66 2

Land Strength neglected in Equations

Both Sides

Copper Side

Table 24 Hole/Land Measurement Guide (2)

If it is not possible to insert a strip of resist as in Figure 9-48, then a pattern cut can be used as in Figure 9-49. With this method a narrower pitch can be achieved. Refer to Table 25 for data. Figure 9-49 Hole/Land Measurement Guide

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PCB Design Manual

This is to ensure good soldering so that the following is not obtained: Figure 9-50 Air Pocket

When the holes are situated on close, but separate patterns, a pattern cut must be used as shown in Figure 9-51, and to the data in Table 25. Figure 9-51 Pattern Cuts

Table 25 Hole/Land Measurement Guide (3) Y

Copper-side

Minimum Hole Pitch P

Topside

(3)

Equation

Da + Db + 1.75 2

Da =Db = 1.00 Minimum Land Radius F1

2.75

Minimum Land Clearance L Minimum Equation Hole Pitch P Da =Db = 1.00 Minimum Land Radius F1

0.85

Minimum Land Clearance L

0.85

X

Notes

D + 0.45 2 Da + Db + 1.75 2

30 Vo-p Maximum

3.07

D + 0.61 2 30 Vo-p Maximum

The clearance L1mm is necessary to prevent solder bridges. For all of the above, the maximum voltage between patterns is 75 Vo-p. If this is exceeded, follow Section 9.11.3. Page 52

PCB Design Manual

(4)

When a hole with a land is located near a hole without a land, (as shown in Figure 9-50), follow the data in Table 26. Figure 9-52 Hole/Land Measurement Guide

Table 26 Hole/Land Measurement Guide (4)

Da = Db = 1 When board thickness = 1.6 Min Land Radius F

Hole Both Sides

Minimum Hole Pitch P

Da = Db = 1 When board thickness = 1.6 Min Land Radius F

Grade Y

Da + Db + 1.0 2

Grade X

(Use 1.0 or board thickness, whichever is greater) 2.5

D + 0.45 2 Da + Db + 1.3 2 (Use 1.3 or board thickness, whichever is greater) 2.5

D + 0.61 2

Land Strength neglected in Equations No Voltages can be applied

Hole Copper Side

Item Minimum Hole Pitch P

If the board thickness is 1.6 mm use the value of 1.5 mm in the equations. These restrictions are to prevent the PCB cracking and to allow for manufacturing registration errors. This data (obviously) assumes no voltage between holes, otherwise follow Section 9.11.3 on page 62. (5)

If there is no pattern around adjacent holes (as shown in Figure 9-53), the clearance equation will be:

P>

Da + Db + BoardThickness 2

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PCB Design Manual

The clearance from the wall of one hole to another must be at least equivalent to the board thickness. Generally, if the board has a thickness of 1.6 mm then use 1.5 mm as the minimum guide. This is to prevent cracking of the board. The above equation is for a board thickness of 1.6 mm and assumes a "between hole" voltage of less than 100 Vo-p. If a greater voltage is involved then refer to Section 9.11.3, page 62. Figure 9-53 Hole Pitches and Board Thickness

9.9.7

Slits

Using slits in the PCB gives a higher withstand voltage, better isolation and less capacitance between patterns. See Figure 9-54. However, the PCB mechanical strength is less, so using slits is not recommended unless absolutely necessary. The standard size for slits is the same as for square holes shown in Table 21. A tolerance for the movement between the slits and the copper pattern during board manufacture should be allowed for as shown in Table 18. Figure 9-54 Slits

Table 27 Tolerance Between Slits & Copper Pattern GRADE X Y

TOLERANCE BETWEEN SLITS AND PATTERN COPPERSIDE TOPSIDE ±0.14MM ±0.26MM

When using slits the between pattern withstand voltage is as shown in Section 9.11.3, page 62. For f refer to Figure 9-68 (Graph for slits).

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PCB Design Manual

For q refer to Figure 9-67 (Graph for no slits). When designing special slits as shown in Figure 9-55, consult with the PCB manufacturer to check for feasibility and punch tool life. Figure 9-55 Special Slits

9.9.8

PCB Attachment Holes

See Figure 9-57. (1)

Size of Attachment Holes and Position Size = 4.0 mm +0.1 mm -0.0 mm diameter (hole Q) Figure 9-56 Q-Hole Positions

Standard holes should be placed on all four corners, positioned 5 mm from each edge of the board. (2)

Copper Pattern Around Attachment Hole Pattern diameter = attachment hole diameter + 1.0 mm. This is to prevent the hole being soldered over.

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PCB Design Manual

(3)

Earthing via Attachment Holes The solder resist pattern should be as shown in Figure 9-57. However, this method is not recommended. Figure 9-57 Earthing via Attachment Hole

Note: To avoid a patent infringement, make sure all areas devoid of resist around the attachment holes are of the same size. (4)

Standard Guide hole for unit test and to prevent mis-registration. Make a hole of 2 mm diameter within the shaded area shown Figure 9-58 and Figure 9-59. (a)

Single board 1 – there are break off boards on either side. See Figure 9-58.

(b)

Single board 2 – there are no break off boards. See Figure 9-59. Figure 9-58 Guide Hole (1)

Figure 9-59 Guide Hole (2)

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PCB Design Manual

(c)

Multi board – place two holes diagonally separate as far as possible on the PCB. The holes may be on the removed break-off boards. It is acceptable to have the attachment hole on the break off board as well. Place the guide hole so that the films for PCB manufacture cannot be mis-placed. PCB Size < 150 X 100 > 150 X 100

Guide Hole Size > ∅ 2.0 > ∅ 4.0

The area up to 1.0 mm in diameter around the guide hole should be clear of copper. 9.9.9

Holes not on the Copper Pattern (Ventilation and Adjustment Holes etc.)

The use of such holes is not recommended, but if used, a hole of diameter D mm must be clear of the adjacent pattern by at least D + 1 mm (i.e. 1 mm on all sides). This is to prevent the hole from being covered with solder. Figure 9-60 Ventilation Holes

Refer to Figure 9-61 that details adjustment holes in the copper pattern. Figure 9-61 Adjustment Hole in Copper Pattern

9.9.10 Guide Holes

(1)

There is a guide hole and mark that is required for PCB manufacture. (a)

Purpose The purpose of this mark is for the positioning of the pattern, resist and idents on both sides of the PCB.

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PCB Design Manual

(b)

Position of Guide Holes Two guide holes per board are required as shown in Figure 9-62. Figure 9-62 Placement Of Guide Holes

Holes G1 x G2 should be as far apart as possible and close to the diagonally opposite line. a > 4 mm

b > 4 mm

The minimum distance from the guide hole centre to the edge of other holes must be at least 4.5 mm. The guide hole should be 1 mm in diameter. If C > 100 mm then a + b > 40 mm Make sure that the guide holes are placed so that when the board is turned over the guide holes appear in different positions. (c)

For the size and shape of the symbols for the guide hole, refer to Table 28. Table 28 Guide Holes Copper Pattern

Solder Resist

Topside Artwork

Holes

Shape

Hole Size

3.5 ∅

1.5 ∅

2.5 ∅

1.0 ∅

Film alignment guide marks (usually added automatically by the slit program) for the artworks, should be located outside the board outline.

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PCB Design Manual

9.10 Width of the Copper Pattern The width of the copper pattern must be as described in Sections 9.10.1 to 9.10.5. 9.10.1 Minimum Copper Pattern Width

The minimum copper pattern width is shown in Table 29, and this is dictated by manufacturing restrictions. Table 29 Minimum Width Of Copper Pattern GRADE X Y

MINIMUM COPPER PATTERN WIDTH 0.25 mm ± 0.05 mm 0.25 mm ± 0.05 mm

Minimum Pattern Widths: For Komukai works +0.05 mm 0.25 mm -0.10 mm min width +0.1 mm 0.25 mm -0.05 mm min clearance Conditions: (a)

0.25 mm patterns must be drawn on CAD.

(b)

It is recommended that 0.3 mm be used as a minimum width and clearance.

A copper pattern of 0.2 mm minimum width can be used for 1608 chip (SMT) components. 9.10.2 Copper Pattern Width and Currant Capacity

The curves in Figure 9-63 are determined by copper thickness and width, and are de-rated by 10 %. For general use the permitted temperature rise is determined by the difference between the maximum safe operating temperature of laminated board (100 °C for paper/phenol), and the maximum ambient temperature where the board is in use. In the case of one track we can use Figure 9-63, but for multiple parallel tracks close together, the same parameters can be calculated by taking all the cross sectional areas and currents into account for all the tracks. Copper patterns carrying a current over 4 A should follow the temperature rise curve of 10° C. See Figure 9-63. 9.10.3 Copper Pattern Width and Resistance

If the circuit is sensitive to the small pattern resistance, refer to Figure 9-64. 9.10.4 Minimum Copper Pattern Width with Regard to Heavy Components

To prevent the pattern breaking use a minimum width of 1 mm to 2 mm with components such as the LOPT and in the power circuits. 9.10.5 Minimum Copper Pattern Widths for Circuit Areas

i)

AC mains input circuit

> 2.7 mm

ii)

Mains current in bridge rectifier

> 2.7 mm

iii)

Resonator capacitor in line output

> 2.7 mm

iv)

Horizontal yoke coil (line) circuit

> 2.7 mm

v)

Collector of line o/p transistor to LOPT

> 2.7 mm

vi)

B+ line from LOPT

> 2.2 mm

vii)

B+ line from supply circuit

>1.7mm

viii)

EHT return circuit from 2Y terminals

>1.7mm

Page 59

PCB Design Manual Figure 9-63 Current Capacity of Copper Foil

Taken from MIL-STD-275A 7 September 1960

Page 60

PCB Design Manual Figure 9-64 Chart for Pattern Widths

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PCB Design Manual

9.11 Clearance Between Copper Patterns This is defined as the distance between adjacent copper patterns and distance between the copper pattern and a hole. These clearances must be as defined in Sections 9.11.1 to 9.11.3. As far as possible, please use the standard clearances defined in Section 9.11.4. 9.11.1 The Minimum Clearance is Governed by Manufacturing Restraints

(1)

The minimum clearance, h, is shown in Figure 9-65. Table 30 defines this distance. This is due to manufacturers PCB printing precision tolerance.

Figure 9-65 Minimum Track/Track and Track/Pad Clearance

Table 30 Minimum Track/Track & Track/Pad Clearance GRADE X Y

(2)

MINIMUM CLEARANCE, hmm 0.25 0.25

The minimum clearance, (i), is shown in Figure 9-66. Table 31 states the minimum clearance between the pattern and a hole. Figure 9-66 Minimum Track/Hole and Pad/Hole Clearance

Table 31 Minimum Clearance Track/Hole & Pad Hole GRADE X Y

MINIMUM CLEARANCE, i COPPERSIDE TOPSIDE 0.25 mm

0.41 mm

This is to ensure that any movement between the pattern and the holes due to manufacturing tolerance, does not result in the pattern and holes touching. NB: Even when designing to the above standard the actual PCB may only have a minimum clearance of 0.1 mm due to manufacturing tolerance. 9.11.2 Minimum Copper Pattern Clearance with Regard to the Board Assembly

When lands are close together as in Figure 9-49 and Figure 9-51 the minimum clearance must be h1, as defined in Table 25. When a metal bracket, frame or case is used, the clearance from the pattern to the metal edge should be l + 1.0 mm, where l is defined in Figure 9-67 and Figure 9-68. 9.11.3 Clearance of Copper Pattern with Regard to Withstand Voltage

To determine the clearance of copper patterns and whether slits and double solder resist can be used, the results from each test in Table 33 and the maximum available voltage when the load is applied between patterns, should be taken into account.

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PCB Design Manual

Determine the applicable curve from Table 33 and then use Figure 9-67 and Figure 9-68 to find the clearance, l, then use Table 32 to allow for PCB manufacturing tolerances. Table 32 Copper Pattern Clearance to withstand Voltage GRADE X Y

Clearance h COPPERSIDE TOPSIDE l + 0.05 mm

l + 0.05 mm

Clearance I COPPERSIDE

l + 0.20 mm

TOPSIDE

l + 0.30 mm

Double solder resist is defined as a layer of ordinary solder resist covered with a layout of ident ink. This increases the between pattern withstand voltage and also helps prevent the surface resistance being reduced by dust. BASIS FOR THE ABOVE STANDARD: i)

Figure 9-67 and Figure 9-68 curves A and E These curves are based on the breakdown of board insulation resistance over a long period.

ii)

Figure 9-67 and Figure 9-68 curves A, B and F Curve A is based on the experience of the set fires in the field. Curve F = 1.50 E.

iii)

Curve B = 1.25 A.

Figure 9-68 curve D This curve defines the Japanese regulation for domestic electrical products.

iv)

Figure 9-67 and Figure 9-68 curves B and G These curves comply to UL standard UL1492 71.1 for CTV

UL1492 71.1 states for electric shock hazard: Apply electrical damage between, or to, the components under test. Apply a DC voltage of 2 x (maximum operating voltage +1000 V) for 1 minute across the components where a shock hazard exists. No insulation breakdown should occur. UL1492 117 states for fire hazard: This is applied to assembled boards with a maximum operating voltage below 2500 Vo-p. No insulation breakdown should occur when a dc voltage of [2X maximum operating voltage +1000 V] is applied across copper patterns where the maximum supply power exceeds 15 W. For circuits with a maximum operating voltage exceeding 2500 Vo-p, refer to UL1492 117 (HV arcing test). The clearance between primary and secondary AC should be as follows:

AC Solder Insertion AC Different Terminals AC Primary/Secondary

Safety Regulation > 4.0 mm > 3.5 mm (3.0 mm) > 3.5 mm (2.5 mm) > * 3.0 mm (2.0 mm)

UL/CSA > 4.0 mm > 3.5 mm (3.2/3.0 mm) > 3.5 mm (3.2/3.0 mm) > * 3.5 mm (3.2/3.0 mm)

IEC65 > 4.0 mm > 3.5 mm (3.0 mm) > 3.5 mm (3.0 mm) > 6.5 mm (6.0 mm)

The areas sealed by spark safety parts do not comply to this standard. Sets complying with UL/CSA should have a clearance of 6 mm between primary and secondary power circuits. Where slits are required the clearance should be greater than 5.5 mm. On the primary side the gap between copper patterns should be greater than 3.5 mm for UL/CSA compliance.

Page 63

PCB Design Manual 9.11.4 Standard Clearance Between Copper Patterns

With standards 9.11.1 to 9.11.3 it is permissible to use a clearance of less than 1.0 mm. However, it is recommended that 1.0 mm clearance is used as much as possible. Table 33 Copper Pattern Clearance

Market

Result of the Between Patterns

New Board

Japanese Export market

Japanese Market

X O O X O O O O O O O O O X X O O O O O O O O O O O : Pass X : Fail - : n/a

Arching Test Critical CarbonCompised onents Board O X O O X O O O O O O O O O X O X O O O O O O O O

X X O X O O O O O O O X X O O O O O O O O

Voltage across Pattern / Available Power Voltage Power

Slits

Clearance Curve

Double Resist

X

≥0

≥0

none

D

O

O O O O O O O O O O O O -

≥0 ≥0 ≥0 ≥0 ≥0 < 50 < 50 50~200 50~200 ≥ 200 ≥0 ≥0 ≥0 ≥0 ≥0 ≥0 < 50 < 50 50~200 50~200 ≥ 200 ≥0 ≥0 ≥0

≥0 ≥0 ≥0 ≥0 ≥0 < 15 ≥ 15 < 0.2 ≥ 0.2 ≥0 < 15 ≥15 ≥0 ≥0 ≥0 ≥0 < 15 ≥ 15 < 0.2 ≥ 0.2 ≥0 < 15 ≥ 15 ≥ 15

none none none none none none none none none none yes yes none none none none none none none none none yes yes yes

B B B B B A B A B B E F B B B B A B A B B E F G

∆ ∆

s/c test for Japan

Design Standard

O

∆ ∆ X X X X X X X O O

∆ ∆ X X X X X X X X

O : Apply Double Resist

∆ : Apply Double Resist (as much as possible) X : n/a

Page 64

PCB Design Manual Figure 9-67 Copper Pattern Clearance (1)

Page 65

PCB Design Manual Figure 9-68 Copper Pattern Clearance (2)

Page 66

PCB Design Manual 9.11.5 Resistance to Burning Under Non-Connection Fault Conditions

Assuming poor soldering, breakage or partial breakage of copper pattern, apply arcing test TDS24.1.2 (special test for CTV). If this results in the PCB or components burning one of the following countermeasures (or some other countermeasure) based on clinch/double solder points check sheet, should be issued by the system engineer. (1)

Component Lead Clinching Use auto-insertion components (clinched leads) as a countermeasure for the above. If this is not possible (manual insertion) then design the pattern so that manual clinching is possible. Method as in Section 9.19.

(2)

Eyelets Eyelets can be used as per Section 9.16.

(3)

Re-Soldering Lands can be re-soldered using a soldering iron.

(4)

Increasing Pattern Strength 1.

Increase the pattern width.

2.

Locate components so as to increase pattern strength and prevent cracking. Also it may be possible to use a bracket to reinforce the board.

Refer to PCB stress design manual No.M76-6-005. 9.12 Minimum Distance Between Board Outline & Copper Pattern Figure 9-69 and Figure 9-70 show the minimum distances - n and p - that are given in Table 34. Figure 9-69 Minimum Clearance Copper to Board Edge

Figure 9-70 Minimum Clearance Copper to BreakOff

Table 34 Board Outline Clearance Grade

Outline By Punch Copper side Topside

Outline By Hole Cut Copper side Topside

X Y

n > 0.75mm

Normally; n > 3.0mm Worst; n > 0.86mm

p > 1.75mm

Normally; p > 3.0mm Worst; p > 1.86mm

This is to prevent the pattern peeling away if there is some movement between the board outline and the pattern. If, at breakout, there is a 0.5 mm burr, there will still be 0.5 mm clearance between the edge of the board and the pattern. The UL standard requires that patterns smaller than 3x UL standard minimum pattern width, must not touch the board outline.

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PCB Design Manual

9.13 Regulation for Solder Resist (1)

Refer to Figure 9-71. The minimum distance from the solder land edge to the board outline is 3.5 mm. If however the board is slide mounted, this minimum is 6.0 mm. Figure 9-71 Minimum Clearance Between Solder Land Edge and Board Outline

This is to ensure good soldering by making sure that the solder pattern is inside the solder cradle edge. This maintains the minimum of 3.5 mm from soldered parts to the board edge. (2)

The minimum distance between the resist and the copper pattern is shown in Figure 9-72. Figure 9-72 Minimum Clearance Between Solder Resist and Copper Pattern

Table 35 Minimum Clearance Between Solder Resist and Copper Pattern Grade X Y

r Copper side

Topside

r ≥ 0.13 mm

r ≥ 0.17 mm

This is to allow for any movement between the copper and the resist patterns that may expose the copper.

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PCB Design Manual

9.14 Silk Screen 9.14.1 Silk Screen: Copper Side and Top Side

(1)

Operator must use the CAD registered circuit symbols and cells.

(2)

Part numbering and location numbering must be easy to read.

9.14.2 Silk Screen Contents

As a rule, use the following: (1)

Topside Ident Ident

Letter Size

PCB Parts Number

easy to read

PCB Unit Number

easy to read

Example

For a panellised board containing many copies of the same PCB, an area is needed for individual numbering of the boards. This is required to help detect, repair, and prevent problems in panellised boards. An example is shown below.

(2)

Copperside Ident Ident

Letter Size

PCB Part Number

UL mark and etcher mark

Example

easy to read

*1

easy to read Instruct the etcher to print

Material number

*2

easy to read Instruct the etcher to print

*1

PCB Part number, UL approval mark, and etcher mark can be placed on the copper side.

*2

Both *1 and *2 must be shown on a panellised board.

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PCB Design Manual

(3)

Examples of Silk Screen Idents

Items

Topside Silk Screen

Copper side Silk Screen

Logo

Carbon Resistor

Metal Oxide Resistor

Resistors

Solid

Fusible

Cement

Variable

Capacitor

Ceramic

Capacitor

Electrolytic (polarised)

Electrolytic (nonpolarised)

Mylar Film

Page 70

Items

Topside Silk Screen

PCB Design Manual Copper side Silk Screen

PP Film Capacitor

Peaking Coil

Coil

Choke Coil

Linearity Coil

Diode

Coaxial

μ pc574 J Type

LED

Plated Jumper

Transistor

Lead Jumper (part reference must be unique)

SSTM, LSTM hand insertion

SSTM, LSTM auto-insertion

Page 71

Items

Topside Silk Screen

PCB Design Manual Copper side Silk Screen

Minitransistor auto-insertion

square transistor

SIP

ICs

DIP

DIP (shrink)

Connector

Socket

Plug

Page 72

Items

Topside Silk Screen

PCB Design Manual Copper side Silk Screen

Line Filter

Transformer

SMT Transformer

FBT (LOPT) 5 mm / 10 mm indicators for component height regulation

CRT Socket

Page 73

Items

Topside Silk Screen

PCB Design Manual Copper side Silk Screen

Fuse UL IEC type Rating and type name should be shown.

Crystal

Varistor

Support Bar

Live Area IEC UL

6.5 mm 6.0 mm

Compulsory Soldering

Eyelets small (1.9 mm) large (2.5 mm)

Page 74

Items

Topside Silk Screen

PCB Design Manual Copper side Silk Screen

Double Resist Silkscreen of width 1 mm applied to edge of tracks of high voltage signals.

(4)

PCB Flow Direction The direction of PCB flow is as follows. Indicate the direction of PCB flow by displaying an arrow on the silkscreen. Figure 9-73 PCB Flow Indicator

Position the characters around the centre of the length of the PCB, and within 10 mm of the edge of the top edge if possible. If this can't be done it is acceptable to place the arrow elsewhere if it is more readable. (5)

Topside

•

Position the characters so they can be seen when the components are mounted.

•

The symbol drawing must connect between holes (ref. Figure 9-74).

•

The clearance between the solder land and the ident "t" as shown in Figure 9-74 must be as described in Table 36. This is the same for the clearance between the holes, outline and the ident. This is to prevent poor soldering should there be any movement between the holes and the ident.

Page 75

PCB Design Manual Figure 9-74 Minimum Clearance to Idents

Table 36 Minimum Clearance to Idents GRADE X Y

(6)

s

t

s > 0.24 mm

t > 0.26 mm

Copper side Refer to Figure 9-74 where u is the minimum distance between the board outline and the ident, and v is the minimum distance between the edge of the solder lands and the ident. Values for u and v are in Table 37. These two clearances - u and v - are to allow for any movement between the ident and the holes or pattern which could cause poor soldering. Figure 9-75 Minimum Distances to Board Outline

Page 76

PCB Design Manual Table 37 Clearance between Solder Resist, Board Edge and Ident GRADE X Y

u

v

u > 0.24 mm

v > 0.26 mm

Copper side idents and copper pads must not overlap each other. 9.15 Square Pins 9.15.1 Size of Square Pins Figure 9-76 Size of Square Pins

9.15.2 Hole Size for Square Pin Table 38 Hole Size Of Square Pins Symbol

Hole Size on Pattern ∅ 1.13 (+0, -0.1)

P

Punching Tool

Material

hot punch

common

Auto-Insertion Yes/No yes

9.15.3 Position of Square Pin

Refer to Figure 9-77. (1)

Clearance between adjacent square pins.

•

When used for wire wrapping, 7.5 mm minimum.

•

When not used for wire wrapping, 4.0 mm minimum.

(2)

Do not place square pins within 6.0 mm of the AI panel guide holes.

(3)

Clearance from components.

•

If there is wiring near the pin, minimum clearance is 7.5 mm.

•

If there is no wiring near the pin, minimum clearance is 4.0 mm.

These clearances are necessary to increase productivity and to prevent operator injury. (4)

With an AI board there should be no square pins within 6.0 mm of the board outline.

Page 77

Figure 9-77 Position of Square Pins (1)

PCB Design Manual Figure 9-78 Position of Square Pins (2)

9.15.4 Depth of Square Pin Insertion

The pin must be 5.6 + 0.5, -0mm from the copper side as shown in Figure 9-78. 9.15.5 Square Pin for Supporting Assembled Unit

These are used to protect component legs that project from the copper side. One pin should be fitted in each corner. Only one lead should be fitted to each square pin. 9.16 Eyelets 9.16.1 Purpose of Eyelets

To improve soldering and to strengthen the land. 9.16.2 Type and Size of Eyelets

The same size is used throughout. (1)

Stock number 23060997, Eyelet 2.3 mm x 3.5 mm Nakadachi Stock number 23060110, Eyelet 1.6 mm x 3.0 mm Nakadachi Figure 9-79 Large Eyelet

(2)

Figure 9-80 Small Eyelet

Size of Hole, Land and Solder Land for Eyelets

Page 78

SN 23060997 23060110

Hole Size Ø 2.5 ± 0.1 mm Ø 1.9 ± 0.1 mm

Land Size Ø 6.0 mm Ø 5.0 mm

PCB Design Manual Solder Land Size Ø 5.5 mm Ø 4.5 mm

NB: If a solder cut line has to be applied on an eyelet land, this should be no more than 1 mm on one side of the land, if it is applied so as to surround the land (reducing the diameter to 4.0 mm) this will seriously affect the reliability. 9.16.3 Eyelet Position

(1)

Available area for eyelet insertion. There must be no eyelets within the shaded area, but on the border of this area (centre of eyelet is okay). Figure 9-81 Available Area for Eyelet Insertion

(2)

Position of Eyelet Relative to Square Pins Minimum requirement as Figure 9-82. Figure 9-82 Eyelet Position Relative To Square Pins

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PCB Design Manual

(3)

Position of Eyelet Relative to AI Parts Auto inserted parts must not be within the shaded area as shown in Figure 9-83. Figure 9-83 Eyelet Position Relative To AI Parts

(4)

Eyelet Position Relative to Non-Axial Parts Non-axial parts must not be in the shaded area as shown in Figure 9-84. Figure 9-84 Eyelet Position Relative To Axial Parts

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PCB Design Manual

(5)

Eyelet Position Relative to Other Eyelets Figure 9-85 Eyelet Position Relative To Other Eyelets

9.17 Board Edge Connectors (1)

The distance between the edge of the copper pattern and the board outline is 2 mm (+0.5, 0) as shown in Figure 9-86. Chamfered edge height = 1.5 mm (+0.5, -0) The chamfer has a depth of 0.8 mm to improve connector insertion. The pattern must not be cut by this chamfer.

(2)

The connection part of the pattern, as shown in Figure 9-86, should be devoid of resist and roll solder plated to improve reliability. To achieve this, the resist must be triangular as shown in order to form a solder "pool" at the top of the connector. Figure 9-86 Board Edge Connectors

(3)

One of the connector pattern centres should be on the main or auxiliary grid. This is for the centring of each drawing.

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PCB Design Manual

9.18 Attachment Method for Shield Cases (1)

Do not use a board edge cut for case legs. Use only square holes with width 0.7 mm as shown in Figure 9-87. NOTE: If an edge cut is used this will give poor strength.

(2)

See Figure 9-88.

•

When mounted, the shield case must be at least 4.5 mm from the board outline.

•

The centre of the shield case holes must be at least 5.0 mm from the board outline.

This is to avoid the case touching the test jigs. (3)

The solder land edge for the shield case must be at least 3 mm from the board outline. Figure 9-87 Attachment Method For Shield Cases (1)

Figure 9-88 Attachment Method For Shield Cases (2)

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PCB Design Manual

9.19 Standard for Wiring on the Copper Side This is not recommended because of the increased labour. However, when it is necessary the following should be observed. A 1.0 mm hole should be present in the land centre to allow solder fumes to escape. Figure 9-89 Copper Side Wiring

9.19.1 Land Size for Copper Side Parts Table 39 Land Size For Copperside Parts

Land Size Solder Land Size Land Size (Solder Land Size) Hole Size

Wire ≥ 6.5 ∅ (use ≥ 5.0 ∅ if specified value not possible) ≥ 4.5 ∅ ((use ≥ 4.0 ∅ if specified value not possible) ≥ 2.0 ∅ (use ≥ 1.0 ∅ if specified value not possible) 1.0 ∅

Capacitor / Resistor ≥ 5.0 ∅ ≥ 3.5 ∅ ≥ 1.5 ∅ 1.0 ∅

9.19.2 Number of Copper Side Components

Use only one land for one component leg. Figure 9-90 Copper side Components

When designing as in the above we must consider the distance W in relation to the fact that the wire conductors may project from the soldering part by up to 4 mm.

Page 83

PCB Design Manual 9.19.3 Standard Copper Pattern for Disconnection (Solder Pads)

This is used for circuit disconnection during assembly and test. After testing is complete the pattern can be reconnected by using a soldering iron. The pattern is as shown in Figure 9-91. Figure 9-91 Slit Pattern for Assembly and Test

This is to prevent solder bridging and to increase productivity. 9.19.4 Pattern Slit for Service Requirement

This pattern disconnection pad is required for service only and should be soldered in the solder bath. It can then be disconnected for service operations as required. The pattern should be as shown in Figure 9-92. Figure 9-92 Slit Pattern for Service

This is to produce a good solder bridge and increase productivity. Figure 9-93 Figure 9-94

Page 84

PCB Design Manual

9.20 Special Case Lands for IC and Mini-Connectors 9.20.1 Land Sizes

Component Type/Pitch

Table No.

2.54 mm pitch IC

> (32-1)

1.78 mm pitch IC

> (32-2)

2.50 mm pitch mini-connector

> (32-3)

2.00 mm pitch mini-connector

> (32-4)

9.21 Standard for Auto-Insertion (AI) Components The PCB must comply with the standards described in other sections. Where previous standards and this standard overlap, this standard takes priority. (For TCP and technical aid, use previous standards.) 9.21.1 AI Land 5.0 mm Pitch Double Resist applied to shaded area, all dimensions in mm Cardon Resistor (1/6 W) Ceramic Capacitor

Note: All kinds of board should have a 5.0 mm pitch. Plated Jumper

Inspection Standard

t: minimum pattern width on a land

μ: minimum solder width on a land

9.21.2 AI Land 7.5; 10.0; 12.5; 15.0; and 20.0 mm Pitch Double Resist applied to shaded area, all dimensions in mm

Page 85

PCB Design Manual

Note: Any kind of board such as paper phenol (D = 1.0 mm) or glass epoxy (D = 1.1 mm) should be greater than 7.5 mm pitch in common. Hole copper A Pitch P side ident between lands Carbon Resistor (1/6 W) 7.5 A B Plated Jumper B Glass Diode (ISS176) C Peaking Coil A Carbon Resistor (1/6 W) Plated Jumper Glass Diode (1SS1555)

10.0

A B C

Plated Jumper

12.5 15.0 20.0

B

C

Inspection Standard

t: minimum pattern width on a land

μ: minimum solder width on a land

Page 86

PCB Design Manual 9.21.3 AI Land 2.5 mm Pitch Non-Axial (N Clinch) Double Resist applied to shaded area, all dimensions in mm Electrolytic Capacitor Non-Polarised Capacitor

Note:

For Glass Epoxy, + 0.1 mm Grey Hatch Pattern between lands is 0.3 mm maximum (x1)

Inspection Standard

t: minimum pattern width on a land

μ: minimum solder width on a land

Page 87

PCB Design Manual 9.21.4 AI Land 5.0 mm Pitch Non-Axial Double Resist applied to shaded area, all dimensions in mm Ceramic Capacitor Mylar Film Capacitor Electrolytic Capacitor Non-Polarised Capacitor Peaking Coil

Note: Any kind of board such as paper phenol (D = 1.0 mm) or glass epoxy (D = 1.1 mm) should be 5 mm pitch Inspection Standard

t: minimum pattern width on a land

μ: minimum solder width on a land

Page 88

PCB Design Manual 9.21.5 AI Land Transistor (3 pin TO-92 Type) Double Resist applied to shaded area, all dimensions in mm Transistor, 3 pin TO-92 type (SSTM, LSTM)

Note: For Glass Epoxy board Ø = 1.0 mm (this is + 0.1 mm on 0.9 mm). Inspection Standard

t: minimum pattern width on a land

μ: minimum solder width on a land

9.21.6 AI Reference Axis

(1)

Four AI directions are available to increase the number of AI parts, not to encourage random designing. Axial components are shown in Figure 9-95 whilst non-axial components are shown in Figure 9-96. Polarised components require four directions while non-polarised components require only two. Figure 9-95 Axial Components

(2)

Figure 9-96 Non-Axial Components

Pitch used for auto-insertion (AI) Axial

5.0 mm

Non-Axial

5.0 mm

7.5 mm

10.0 mm

Page 89

PCB Design Manual

As an exception some facilities allow a 12.5 mm and 15.0 mm pitch for axial components and a 2.5 mm pitch for non-axial components, therefore design carefully and consult with the manufacturing facility. 9.21.7 Axial Components

(1)

Insertion type and pitch are shown in Table 40. Table 40 Axial Component Pitch

Component Glass Diode Carbon Resistor Axial Capacitor Axial Peaking Coil Choke Coil Plated Jumper Epoxy Diode Solid Resistor

(2)

Pitch (all dimensions in mm) 7.5 10.0 5.0 7.5 10.0 5.0 5.0 7.5 10.0 5.0 7.5 10.0 12.5 15.0 20.0 15.0 15.0

Type Glass, epoxy, large, and small

Total Number of Types of Components and Total Number of Components For an axial component AI, the number of different types must be 118 or less (117 + Tin Copper Links), i.e. 39 types x 3 lands. Design the board such that the components in Table 40 can be auto-inserted.

9.21.8 Board Edge Clearance for Auto-Inserted Axial Components

In Figure 9-97 the usable area for auto-inserted axial components is shown as shaded. Refer to C when 52 mm width taping is used. Refer to A or B when 26 mm taping is used. This refers to the width of the taped components on a magazine for loading the auto-insertion machines. Figure 9-97 Board Edge Clearance for Auto-Inserted Axial Components X Axis Insertion Direction

Y Axis Insertion Direction

A 10.0 mm 7.5 mm

B 5.0 mm

Page 90

X Axis Insertion Direction

PCB Design Manual Y Axis Insertion Direction

B (JP) 15.0 mm 20.0 mm

C

All dimensions are in mm. 9.21.9 Board Edge Clearance for Auto-Inserted Non-Axial Components

In Figure 9-98 the usable area for auto-inserted axial components is shown as shaded. Figure 9-98 Board Edge Clearance for Auto-Inserted Non-Axial Components X Axis Insertion Direction

Y Axis Insertion Direction

All dimensions are in mm.

Page 91

PCB Design Manual 9.21.10 Board Edge Clearance for Square Pins

Figure 9-99 shows the board edge clearance required for square pin insertion by non-axial insertion machines. Figure 9-99 Board Edge Clearance for Square Pins

9.21.11 Performance Requirement for Auto-Insertion Machine

(1)

There is a limit on the number of different types of component (different type, values, and bodies etc.) that can be placed by each type of auto-insertion machine owing to the magazine capacity available on each machine. These limits are: UNI .................... < 80 different component types 50 types for 26 mm PANA (AE) ....... < 40 different component types, inc. JP links tape width, take care PANA (AV) ....... < 50 different component types, inc. JP links if using 52 mm tape AV (IVC5) ......... < 40 different component types width. AV (IVC5A) ...... < 80 different component types PANA (RHU) .... < 62 different component types (includes standard and large components)

(2)

Clinch round is necessary on a board for auto-insertion. Axial component: inside clinch. Non-axial component: 5 mm pitch, outside clinch; 2.5 mm pitch, N clinch. RHU applies to 2.5 mm, 5.0 mm, and 7.5 mm pitch; N clinch.

(3)

When the distance between hand insertion components is too close rejects occur with components are being knocked off. Make sure that there is no problems with component insertion in these areas.

Page 92

PCB Design Manual 9.21.12 Non-Axial Components (Radial Components)

For insertion type see Table 41. Table 41 Non-Axial Components (Radial Components) Type Ceramic Capapcitor

Size (all dimensions in mm) D = Ø 3.5 ~ Ø 11.0 T ≤ 4.4

Electrolytic Capacitor Specific Capacitor

D = Ø 4.0 ~ Ø 8.0

Mylar Capacitor Non-polarised Capacitor

L ≤ 9.5 T ≤ 6.5 H ≤ 12.5

Peaking Coil

D ≤ 8.0 L ≤ 9.0

Diode Transistor

Figure

Type TO-92 Miniture Type

Note: all auto-inserted components should be available on tape with the legs formed as shown above.

Page 93

PCB Design Manual 9.21.13 Large Components

To increase the auto-insertion effectively there is a machine available that can insert large components. Insertion pitch can be 2.5 mm, 5.0 mm, or 7.5 mm. Leg diameters up to 0.8 mm are allowable. On the copper side of a chip mount board there is a maximum height of 18.0 mm for the chip mounter. For insertion type see Table 42. Table 42 Large Components Type Ceramic Capacitor

Size (all dimensions in mm) D = Ø 3.5 ~ Ø 11.0 T ≤ 4.4

Electrolytic Capacitor

D = Ø 18.0 maximum

Mylar Capacitor Non-polarised Capacitor

L ≤ 22.5 maximum T ≤ 6.5 H ≤ 26.0 maximum

Resistor (stand off type)

1/2 W, 1 W, 2 W metal oxide resistor

Figure

safety approved capacitor, 7.5 mm pitch

1/2 W pitch 5.0 mm 1W, 2W pitch 7.5 mm Plug Connector

Others

2.5 mm pitch 3 pin ~ 8 pin

Fuse Holder Tactile Switch

Note: all auto-inserted components should be available on tape with the legs formed as shown above. The hole pitch for auto inserted and manual inserted stand off resistors should follow the diagram below. Holes on the 10 mm or 15 mm pitch are for hand insertion where as the 5 mm and 7.5 mm pitch holes are for the auto inserted equivalent.

Page 94

PCB Design Manual 9.21.14 Minimum Distance Between Components and Square Pins

If there are auto-inserted components in the areas shown in Figure 9-100, Figure 9-101, and Figure 9-102 then insertion of square pins is not possible. (1)

Axial Components (Wire Link, Resistor, Diode) Figure 9-100 Square Pin to Axial Components

I J

wire jumper 3.0 3.0

carbon resistor / diode D = Ø 2.0 D = Ø 3.0 3.5 4.0 3.0 3.0

All dimensions in mm.

(2)

Non-Axial Components (Radial Components)

Figure 9-101 Square Pin to Non-Axial Components D ≤ Ø 5.0

D > Ø 5.0

I

D + 4 .0 2

J

4.5

D + 4 .0 2 D−5 + 4.0 2

All dimensions in mm.

(3)

Square Pin to Square Pin Figure 9-102 Square Pin to Square Pin a

D = 1.0 4.0

All dimensions in mm.

Page 95

PCB Design Manual 9.21.15 Clearances for Auto-Inserted Chip Components

(1)

The clearance required for non-axial auto inserted parts (radial parts) inserted by AVISERT VC-4 or VC-5 to chip mount parts is shown below in Figure 9-103 and Figure 9-104. Figure 9-103 Clearance for Radial Auto-Insertion with Chip Mount Component (1)

Figure 9-104 Clearance for Radial Auto-Insertion with Chip Mount Component (2)

Table 43 Clearance for Radial Auto-Insertion with Chip Mount Component component height < 0.5 0.6 ~1.0 1.1 ~ 1.5 1.6 ~ 2.0 2.1 ~ 2.5 2.6 ~ 3.0 > 3.1

L 3.5 4.0 4.5 5.0 5.5 6.0 15.0

E1

4.5

Size (all dimensions in mm) Pitch 2.5 mm E2 F E1

2.5

0.5

2.5

Pitch 5.0 mm E2

F

2.5

0.5

When the component outline is larger than the land, such as a tantalum or electrolytic capacitor, use the outline of the component as standard and add 0.5 mm to allow for component movement.

Page 96

PCB Design Manual

(2)

Axial Components Mounter – Universal Inserter

(3)

Axial Components Mounter – Panasert-AI (NM-2023, NM-2024)

(4)

Wire Link (JP Jumper) Inserter – Panasert-Jv (NM-2034)

9.21.16 Stand Off Oxide Resistors

(1)

Types – 1 W small size or equivalent. ½ W small size.

(2)

Component shape and insertion pitch.

Page 97

Unique Axial to Unique Axial

First to be inserted.

First to be inserted.

First to be inserted.

First to be inserted.

First to be inserted.

First to be inserted.

First to be inserted.

First to be inserted.

B

First to be inserted.

First to be inserted.

First to be inserted.

C

E

First to be inserted.

First to be inserted.

First to be inserted.

First to be inserted.

First to be inserted.

Non-Axial to Unique Axial

Axial to Unique Axial

Radial & Radial

Axial & Radial

Axial & Axial

A

Table 44 Rough Figures for Checking AI Components PCB Design Manual

Page 98

12.5, 15.0, 20.0 Pitch

10.0 Pitch

7.5 Pitch

5.0 Pitch

TC Link

Diode

Carbon Resistor 1/6W

TC Link

Peaking Coil

Diode

Carbon Resistor 1/6W

2.5

2.5

2.5

2.5 2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

TC Link

2.5

2.5

Axial Ceramic Capaciotr

2.5

2.5

2.5 2.5

B

A

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

C E

2.5

2.5

2.5

2.5

TC Link, Resistor, Capacitor

Carbon Resistor 1/6W

TC Link

Check Sheet for AI Components Axial and Axial

5.0 Pitch

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

A

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

B

3.5

3.5

3.5

3.5

3.5

3.5

3.5

3.5

3.5

3.5

3.5

C

1.5

2.5

2.0

2.0

1.5

3.5

3.5

3.5

E

1SS176 1/6W, TC Link, Resistor, Coil, Diode

7.5 Pitch

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

A

2.5

3.0

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

2.5

B

3.0

3.0

3.0

3.0

3.0

3.0

3.0

3.0

3.0

3.0

3.0

C

1.5

2.5

2.5

1.5

3.5

3.5

3.5

3.5

3.5

3.5

3.5

E

1S1555 1/6W, TC Link, Resistor, Diode

10.0 Pitch

Component to be inserted

2.0

A

2.0

B

3.0

C

TC Link

2.5

E

12.5, 15.0, 20.0 Pitch

9.21.17 Check Sheet for AI Components PCB Design Manual

Table 45 Axial and Axial

Component Already Inserted

Page 99

Carbon Resistor 1/6W Diode Axial Ceramic Capacitor Axial Peaking Coil

Jumper

Already Inserted

3.0

C

3.5

3.0

E

Common Spacing

2.5

A

Axial Peaking Coil

3.5

2.5

B

A

3.5

B

A

∅2.3

4.0 4.0

3.5 3.5

B

B

3.5

A

4.5

4.0

3.5

B

4.0

3.5

E

2.5

A

A

4.0 4.0

3.5 3.5

A

B

4.5 4.5

4.0 4.0

B

D = ∅6.3

4.5

A

Electrolytic Capacitors

3.5

2.5

B

3.5

2.5

B

4.5

A

B

B

5.5 5.5

3.5

A

3.5

A

4.5

3.5

B

4.5

3.5

B

W X T 10.0 X 6.4

Film Capacitor

A

B

3.0 4.0

2.5 3.5

B

T = 1.5

A

3.0

B

B

4.0

E

4.0

3.5

3.0 3.5 3.5 3.5

A

T = 2.5

Transistor (SSTM, LSTM)

4.5

4.0

E

2.5 3.5

A

4.5

4.0

3.5

4.5 4.5

B

D = ∅8.4

3.5

A

D = ∅11.0, T = 4.4

Ceramic Capacitor D = ∅10.0, T = 4.4

D = ∅5.2

2.5

A

∅2.0 3.0 3.5

∅0.6

To be inserted

3.5

A

Capacitor where body size ≤ ∅9.0 PP Capacitor Peaking Coil Mini Transformer

Carbon Resistor 1/6W Diode (1SS176, 1S1555) Axial Ceramic Capacitor

Jumper

Already Inserted

∅2.3

∅2.0

∅0.6

To be inserted

Table 46 Axial & Radial (part 1) PCB Design Manual

Table 47 Axial & Radial (part 2)

Page 100

Ceramic Capacitor

Peaking Coil WXT

Transistor or Diode Miniture TR, Di

Transistor SSTM, LSTM

Electrolytic Capacitor

WXT

Film Capacitor

Width T = 4.4

Width T=3

First Insertion

6.5 4.0 5.0 3.5 4.0 5.5 6.5

4.5

4.5

4.5

4.5

4.5

4.5

4.5

4.5

4.5

4.5

D = ∅4.2

D = ∅5.2

D = ∅6.3

D = ∅8.4

T = 1.5

T = 2.5

T = 0.95

T = 1.65

6.4 X 6

9X8

6.0

5.0

4.5

5.0 5.5

5.0

10 X 6.4

4.5

4.0

4.5

6 X 3.4

8 X 5.0

4.5

5.5

D = ∅11.0

4.5

5.0

D = ∅10.0

4.0

4.0

E

4.5

4.5

C

Spacing T or W = 9

D = ∅9.0

D = ∅6.2

Second Insertion

6.0

5.0

4.0 4.0

4.0

3.0

4.5

4.0

6.0

5.5

4.5

4.0

5.0

4.5

3.5

4.0

4.0

3.5

3.5

B

4.0

4.0

4.0

4.0

4.0

4.0

4.0

4.0

4.5

4.0

4.0

5.0

4.5

4.0

4.0

A

D = ∅6.2 T=3

4.0

4.0

4.0

4.0

4.0

4.0

4.0

4.0

4.0

4.0

4.5

4.0

4.0

5.0

4.5

4.0

4.0

A

6.0

5.0

4.0

3.0

4.5

4.0

6.0

5.5

4.5

4.0

5.0

4.5

3.5

4.0

4.0

3.5

3.5

B

D = ∅9.0 T=3

4.5

4.0

4.0

4.0

4.0

4.0

4.5

4.0

4.0

4.0

5.0

4.0

4.0

5.5

5.0

4.5

4.0

A

6.5

5.5

4.5

3.5

5.5

4.0

7.0

6.0

5.5

5.0

6.0

5.0

4.5

5.0

5.0

4.0

4.0

B

5.0

4.5

4.5

4.5

4.5

4.5

4.5

4.5

4.5

4.5

5.5

4.5

4.5

6.0

5.5

5.0

4.5

C

D = ∅10.0 T = 4.4 E

7.0

6.0

4.5

4.0

5.5

4.5

7.0

6.5

5.5

5.0

6.0

5.5

4.5

5.0

5.0

4.5

4.5

Ceramic Capacitor

4.5

4.0

4.0

4.0

4.0

4.0

4.5

4.0

4.0

4.0

5.0

4.0

4.0

5.5

5.0

4.5

4.0

A

6.5

5.5

4.5

3.5

5.5

4.0

7.0

6.0

5.5

5.0

6.0

5.0

4.5

5.0

5.0

4.0

4.0

B

5.5

4.5

4.5

4.5

4.5

4.5

5.0

4.5

4.5

4.5

6.0

5.0

4.5

6.5

6.0

5.5

4.5

C

D = ∅11.0 T = 4.4

7.5

6.5

5.0

4.5

6.0

5.0

7.5

7.0

6.0

5.5

6.5

6.0

5.0

5.5

5.5

5.0

5.0

E

4.0

4.0

4.0

4.0

4.0

4.0

4.0

4.0

4.0

4.0

4.5

4.0

4.0

5.0

4.5

4.0

4.0

A

6.0

5.0

4.0

3.5

5.0

4.0

6.5

5.5

5.0

4.5

5.5

4.5

4.0

4.5

4.5

3.5

3.5

B

6 X 3.4

5.0

4.0

4.0

4.0

4.0

4.0

4.5

4.0

4.0

4.0

5.5

4.5

4.0

6.0

5.5

5.0

40

A B

7.0

6.0

5.0

4.0

5.5

4.5

7.0

6.5

5.5

5.0

6.0

5.5

4.5

5.0

5.0

4.5

4.5

8X5

5.5

4.5

4.0

4.0

4.0

4.0

5.5

4.5

4.0

4.0

6.0

5.0

4.0

6.5

6.0

5.5

4.5

A

Film Capacitor

7.5

6.5

5.5

5.0

6.5

5.5

8.0

7.0

6.5

6.0

7.0

6.0

5.5

6.0

6.0

5.0

5.0

B

5.0

4.5

4.5

4.5

4.5

4.5

4.5

4.5

4.5

4.5

5.5

4.5

4.5

6.0

5.5

5.0

4.5

C

10 X 6.4

7.0

6.0

4.5

4.5

5.5

4.5

7.0

6.5

5.5

5.0

6.0

5.5

4.5

5.0

5.0

4.5

4.5

E

Table 48 Radial (5.0 mm) and Radial (5.0 mm) PCB Design Manual

Page 101

PCB Design Manual Table 49 Stand Off Oxide Resistors (was table 34-3 page 150) Application Insertion Pitch Height Leg Diameter Hole Size Shape

l H d D

1 W Small Type, Equivalent 15.0 mm 6.5 ± 0.5 mm 0.8 mm 1.2 mm

½ W Small Size 10.0 mm 6.5 ± 0.5 mm 0.6 mm 1.0 mm

(3)

Land size for AI components - same as ⅛ W resistor in Table 33-1.

(4)

Minimum distance between component holes. Figure 9-105 Minimum distance between component holes

No components should be inside the hatched area. Component holes on the broken line are okay. (5)

All standoff components should be mounted on the same single axis. This axis should be parallel with the longer side of the board. (This axis is the same as the axial AI direction shown in Figure 9-95 and Figure 9-96 {x axis}.)

9.21.18 Standard for Auto-Insertion using Special Inserter

(1)

Land size – The land size on which the special insertion equipment clinches the component leg, should be as defined in Table 33-1 for the 1/8 W resistor. For land size where there is no clinch refer to Table 10.

(2)

Types of Components, Hole Size, Restrictions. Table 50 Auto-Insertion Using Special Inserter

Component IF Transformer 7 Square IF Transformer 10

Component Form

Hole Pitch

Size Restrictions

There must be no components in the shaded area.

Page 102

PCB Design Manual

9.22 Standard for Auto-Alignment and ATE of Assembled TV Units Any board involved in auto alignment and test must comply with all previous standards and the following: 9.22.1 Standard for Parts of the Board that will be Supported During Test

As shown in Figure 9-106, there should be a space at the top of the board where the board will be secured during test. It must comply with the following conditions: i)

There should be one point of support every 50 mm².

ii)

Where there are no standoff components a space of diameter 10 mm should be present around the support point (APC press arm).

iii)

Where it is possible that components may fall under a press arm, then a space diameter of Ø 15 mm should be allowed. As shown in Figure 9-107, the above is required for the following reasons:

•

To prevent board bowing.

•

To keep the board flat and prevent damage to PCB and components.

•

To improve productivity.

•

To improve reliability. Figure 9-106 Test Support (1)

Figure 9-107 Test Support (2)

9.22.2 Component Height on the Board

As shown in Figure 9-108, the component height on the board should be less than 150 mm. On the foilside the component height should be less than 6 mm. Figure 9-108 Component Height on the Board

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PCB Design Manual 9.22.3 Space Around Guide Holes

(1)

Where there are components that may fall over, there should be a clearance radius of 9 mm as shown in Figure 9-109.

(2)

Solder lands should be away from the guide hole centre by more than R 6 mm as shown in Figure 9-109.

(3)

The pattern should be away from the guide hole by R 4.5 mm. Figure 9-109 Clearance for Guide Hole

9.22.4 Restrictions on the Surrounding Space of Components

(1)

Horizontal Type Variable Resistor (a)

As shown in the shaded area of Figure 9-110, there must be no components within a 16 mm diameter of the potentiometer's centre,

(b)

It is permissible to place components under the shaded area, but consideration should be given to the effect of components falling over. Figure 9-110 Variable Resistor (horizontal)

(2)

Coil (a)

As shown in Figure 9-111, there must be no components within a Ø 16 mm diameter of the coil's centre.

(b)

It is permissible to place components under the shaded area, but consideration should be given to the effect of components falling over. Figure 9-111 Clearance required for coil

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PCB Design Manual

(3)

Phono Plug (a)

As shown in Figure 9-112, there must be no components higher than 7 mm within a Ø 16 mm diameter of the centre of the Phono plug. In addition there must be no components higher than 30 mm within a Ø 64 mm diameter of the centre of the Phono plug.

(b)

The values and rules given above shall cover the effect of a component tilting over. Figure 9-112 Clearance required for Phono plugs

(4)

Vertical Type Variable Resistor for Service/Production Control (a)

As shown in Figure 9-113, there should be no components within 16 mm of the potentiometer's centre. Figure 9-113 Clearance required for Vertical Variable Resistor

(5)

Horizontal Type Variable Resistor User Controls (a)

As shown in Figure 9-114, there must be no components within the shaded area, but positioning components behind the shaded area is permissible. Figure 9-114 Clearance required for Horizontal Variable Resistor

9.22.5 Restrictions on the Location of Components to be Auto-Inserted

(1)

Mutual positioning of vertical potentiometers. These must be placed on the edge of the board facing either the back cover or the CRT face. (a)

Potentiometer pitch

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As shown in Figure 9-115, the pitch of potentiometers must be at least 16.25 mm. Figure 9-115 Pitch of Potentiometers

(b)

Sequence of positions Regardless of domestic or export models, the potentiometer function sequence should be the same.

(c)

Relationship between the edge of the board and vertical potentiometers As shown in Figure 9-116, the end of the potentiometer should be at a distance D from the board edge. Distance A < 9 mm, Distance D = 0 to 8 mm. Figure 9-116 Service Personal Operated Variable Resistor

(d)

Relationship between the edge of the board and the vertical potentiometer for user. Relationship between the Service and User Potentiometers. As shown in Figure 9-117, the end of the user potentiometer must not project over the board edge by more than 17 mm. Figure 9-117 User Operated Variable Resistor

(2)

Relationship between horizontal potentiometer; between coils and between horizontal potentiometers and coils When positioning horizontal potentiometers or coils to be automatically aligned on the board, the hatched rectangular space for the alignment driver head is required (16 mm x 58 mm) shown in Figure 9-118. Therefore, these components must be located so that the "head space" for one component does not overlap the "head space" for an adjacent component. The direction of the alignment driver head can be in either x or y planes. Page 106

PCB Design Manual Figure 9-118 Horizontal Potentiometers and Coils

(3)

Relationship between horizontal potentiometer and phono plugs When positioning horizontal phono plugs to be auto inserted the hatched rectangular space shown in Figure 9-119 is required (20 mm x 78 mm). Therefore, these components must be located so that the horizontal potentiometer "head space" (16 mm x 58 mm) and the phono plug "head space" do not overlap. The direction of the insertion head can be in either x or y planes. Figure 9-119 Horizontal Potentiometer and Phono Plugs

10 Silver Through Hole Standard This standard applies to silver through hole PCB design. It is for the purpose of increasing total profit, improving quality, improving reliability, and reducing design cost and manpower.

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11 Silver Through Hole Standard DM-ST003E The DM-ST003E standard defines silver through hole PCB design used in electronic equipment such as Television and VCR.

12 Silver Through Hole Abstract Silver through hole PCB has various design rules and production system differing from a single or double sided copper through hole PCB. The manufacturing process of a silver via PCB is different. The minimum pitch "P" between silver through holes is shown in Figure 12-1. This value can vary depending upon different PCB manufacturers and the level (or density) of copper tracks on the board. Figure 12-1 Minimum Pitch Between Silver Through Holes

13 Silver Through Hole Design Rules 13.1 General A silver through hole is a simple through hole filled with a silver filler mixed with a resin such as phenol or epoxy. It is characteristic of the raw material used in low priced paper phenol PCBs. This is an inexpensive process compared with the more costly method of copper plating. In addition, the reliability of the silver through hole is high. Compared to copper plated through hole there are some disadvantages such as: lover copper track density; lower electric currant capacity; silver migration; and lower heat resistance. The demand from the market however has improved silver migration and track density and silver through hole is replacing copper plated through hole in many fields. There are also not very many PCB suppliers who can manufacture boards using this process at present. One reason for using silver is that this is an inexpensive precious metal and has the highest electric conductivity in metals. Precious metals do not oxidize easily and are more chemically stable. Copper can oxidize when burnt in air with the presence of oxygen. To prevent oxidation Copper should be burnt in a nitrogen atmosphere. Silver is more suitable for this simple through hole process since it does not oxidise easily. 13.2 Silver Migration One troublesome characteristic of using Silver is known as Silver Migration. Although this can not be avoided, it has been improved so that it should not cause any practical problems. 13.2.1 How Silver Migration Occurs

Silver Migration occurs as the result of an ion reaction between exposed silver terminals at different potentials in the presence of moisture, to form an electrolytic solution. Oxidised silver (Ag2O) is reduced to silver (Ag). The reaction will occur where there is water present to create an electrolytic solution. Eventually the silver will cause insulation deterioration. Silver is oxidised by the prescence of water which is absorbed on the surface by ambient moisture where there is a

Ag → Ag + + e −

and

H 2O → OH − + H + Page 108

PCB Design Manual potential difference. The Silver and Hydroxide ions deposit on the anode, forming Silver Hydroxide

Ag + + OH − → AgOH

Silver Hydroxide decomposes to Silver Oxide and is deposited on the anode.

2 AgOH ↔ Ag 2O + H 2 O

Then by a hydrate reaction.

Ag 2O + H 2O ↔ 2 AgOH ↔ 2 Ag + + 2OH −

As the reaction advances Silver ions move to the cathode and Silver is deposited there. 13.2.2 Countermeasures for Silver Migration

(a)

Reduce the relative potential difference to less than 50 V.

(b)

Silver through-holes should be positioned far apart if possible.

(c)

Choose a PCB base material that has better resistance to humidity. The quantity of ion remnants in the paper base affect the materials resistance to humidity.

(d)

Apply an overcoat.

(e)

Humidity in the environment should be controlled. It is especially important not to let moisture condense.

13.3 Rated Current A Silver through hole has usually between 20 to 30 mΩ resistance. Heat is emitted through excessive current which causes the resin inside the through hole to deteriorate, increasing the resistance and damaging the copper pattern. When a D.C. current was gradually increased to 3 A over 5 minutes the resistance of the hole increased 1.5 times and damaged the pattern. After exceeding 3 A the pattern was fully broken. The maximum rated current on a single Silver through hole is 300 mA. There is a limit in the magnitude of current even if the number Silver through holes are increased, such as including two holes at each end of the pattern. 13.4 Bowing of the PCB Panel Double sided silver through hole PCBs are often assembled using many soldering processes, such as reflow, plus reflow, and solder bath. This can cause panel bowing problems. Paper materials are more susceptible to heat than glass materials. Silver through hole boards are manufactured with a "reverse" operation against bowing when the boards get bowed during curing. Therefore when the board is subjected to heat again it attempts to get back to the original condition. Other countermeasures that can be designed in are matching the pattern density on top and bottom sides, distributing copper pads on break-off panels, and using the minimum board size necessary. It is also often necessary to prevent bowing during the soldering process. 13.5 Sulfuration As a Silver through hole is covered with an overcoat (soldermask) there is no problem with sulfuration. 13.6 Attachment to Power Board Prior to connecting a Silver through hole PCB to a Power PCB and ground pattern, check to ensure that the temperature, rated current, and rated voltage do not exceed each standard.

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13.7 Approved Silver Through Hole PCB Manufacture See Table 51 below for details of manufacturers, materials, and the minimum pitch between silver through holes. Table 51 Approved Silver Through Hole PCB Manufacture Manufacturer Hokuriku Japan CMK Yamagishi Daitoku (Korea)

minimum pitch between silver through holes 1.5 mm 2.0 mm Sumitomo Bakelight PLC-2147(RH) Sumitomo Bakelight PLC-2147(R) or Hitachi MCL-437F(ED) Hitachi MCL-437F(RD) Hitachi MCL-437F(RD) Toyama Denshi (Korea) DS-1107

14 Silver Through Hole PCB Types The following are types of Silver through hole PCB. PJC PCB and PRC PCB are for reference. 14.1 Double Sided Copper Through Hole PCB

1 2 3 4

Raw Material Copper Pad Silver through hole (drill hole) (organic binder – silver powder) Copper side solder resist

5 6 7

Top side solder resist (see note) Bottom side solder resist Ident

8

Silver through hole pitch

Note: When solder is going to be applied only to the copper side there is a method to cover all the topside with a clear overcoat so that the top part of the silver through hole covered. 14.2 Single Sided Copper with Single Sided Silver Wire Jumper PCB (PJC) PCB with copper only on the bottom side and Silver wire jumpers on topside.

1 2 3

Raw Material Copper Pad Silver through hole (drill hole) (organic binder – silver powder)

6 7 8

Silver wire (silver painting print) Overcoat Ident

Page 110

4

Copper side solder resist

9

5

Undercoat

10

PCB Design Manual Solder resist (it is possible to overlap solder resist and ident) Silver through hole pitch

14.3 Single Sided Copper with Single Sided Silver Wire PCB (PRC)

1 2 3 4 5

Raw Material Copper Pad Silver through hole (drill hole) (organic binder – silver powder) Copper side solder resist Solder Resist

6 7 8

Ident Undercoat Silver wire (silver painting print)

9 10 11

Printed Resistor Overcoat Silver hole pitch

14.4 Other Types There are other variations such as printed resistors formed on the solder surface or double printed silver wire etc.

15 Silver Through Hole Documentation and Drawings for Production Drawings for Silver through hole PCBs should be added to section 6 Documents Involved for Production.

16 Raw Materials for Silver Through Hole PCB Paper phenol (FR1/FR2) is a popular raw material for silver through hole boards. To distinguish between single sided and silver through hole PCB attach suffix at end of part name. Silver through hole PCBs have improvements to prevent silver migration (see section 13.2).

17 Production Process of Silver Through Hole PCB 1 2 3 4 5 6 7 8 9 10 11 12 13

Hokuriku Denki raw material cutting through hole drilling pattern printing etching solder resist printing (both sides) UV curing silver through hole printing curing plugged via and idents printing (both sides) curing punching pre-flux inspection

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CMK raw material cutting through hole drilling pattern printing etching solder resist printing (both sides) UV curing silk screen ident printing UV curing silver through hole printing curing overcoad printing (both sides) UV curing punching pre-flux inspection

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18 Production Standard 18.1 Board Thickness For a paper phenol PCB the board thickness is 1.6 mm with a tolerance of ± 0.15 mm. 18.2 Thickness of Copper Pad Normally, the thickness of the copper pad shall be 35 µm with a tolerance of +10.0, -5.0. 18.3 Height of Silver Through Hole For the height of silver through hole see Figure 18-1 and Table 52. Table 52 is derived from the PCB manufacturers approved drawings. Figure 18-1 Height of Silver Through Hole

Table 52 Height of Silver Through Hole Hokuriku Denki CMK

a 70 µm (max) 70 µm (max)

b 150 µm (max) 270 µm (max)

18.4 Rated Current for Silver Through Hole The rated current for a silver through hole is less than 300 mA per one through hole (see 13.3). 18.5 Silver Through Hole Resistance The resistance of a silver through hole should be less than 100 mΩ per one through hole. 18.6 Insulation Resistance The value of insulation resistance between silver through hole and a point at different electric potential should be less than 100 MΩ. A D.C. potential difference of 100 V is applied for 1 minute under normal temperature. 18.7 Dielectric Strength The dielectric strength between silver through hole and a different electric potential should be less than 100 V D.C.. There should be no damage after applying a potential difference of 100 V D.C. for 1 minute. 18.8 Potential Difference Between Silver Through Holes The highest potential difference between silver through hole and a different electric potential should be 50 V D.C. or less. If the potential difference is above 50 V then a plated jumper should be used. 18.9 Temperature Range Temperature range is -30 °C to + 100 °C.

19 Design Standard 19.1 Design Standard for Different Manufacturers Each manufacturer has a different design standard in pitch size. See Table 53 for details. Do not mix the design rules for each pitch. Table 53 Design Standards for PCB Manufacturers Item

shown in

HDK

CMK

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silver through hole pitch clearance silver through hole copper land diameter resist diameter plugged via diameter silver through hole and copper pattern clearance

Figure 19-1 W1 W2 W3 W4 W5

2.0 mm pitch > 2.0 mm Ø 1.5 mm Ø 1.9 mm Ø 2.3 mm > 0.5 mm

PCB Design Manual 1.5 mm pitch 2.0 mm pitch > 1.5 mm > 2.0 mm Ø 1.2 mm Ø 1.5 mm Ø 1.6 mm Ø 1.9 mm Ø 2.0 mm Ø 2.1 mm > 0.3 mm > 0.5 mm

19.2 Silver Through Hole Copper Land Board Edge Clearance The distance between a silver through hole copper land and the edge of the board should be equal to or greater than 2.0 mm for CMK and Hokuroku PCB manufacture, and 6.0 mm for Daiduck PCB manufacture. In Figure 19-1 this is shown as W6. silver through hole copper land and board edge clearance ≥ 2.0 mm silver through hole copper land and board edge clearance ≥ 6.0 mm

for CMK and Hokuroku for Daiduck

19.3 Silver Through Hole Copper Land and Break-off Hole Clearance The distance between a silver through hole copper land and a break-off hole should be equal to or greater than 1.25 mm. In Figure 19-1 this is shown as W7. silver through hole copper land and break-off hole ≥ 1.25 mm 19.4 Silver Through Hole Copper Land and V-cut (Scoring) Line The distance between a silver through hole copper land and the centre of a V-cut (scoring line) should be equal to or greater than 1.5 mm. In Figure 19-1 this is shown as W8. silver through hole copper land and V-cut (scoring line) ≥ 1.5 mm Figure 19-1 Design Standard of Silver Through Hole silver through hole pitch silver through hole land diameter

resist diameter

silver through hole and copper pattern clearance

silver through hole copper land and board edge clearance

silver through hole copper land and break-off hole clearance

silver through hole and V-cut (scoring) line

19.5 Silver Through Hole and Component Hole Clearance The clearance between silver through hole and component hole is shown below in Figure 19-2. Page 113

PCB Design Manual Figure 19-2 Silver Through Hole/Component Hole Clearance

In the case of W9 ≥ 1.8 mm component holes can be punched or drilled. In the case of W9 < 1.9 mm component holes should be drilled and not punched. The clearance W10 between silver through hole copper land and component hole should be equal to or greater than 0.5 mm. 19.6 Silver Through Hole Diameter Diameter of a silver through hole is between 0.6 mm and 0.7 mm for a 2.0 mm pitch silver through hole PCB. Diameter of a silver through hole is between 0.5 mm and 0.6 mm for a 1.5 mm pitch silver through hole PCB. 19.7 Crossing of Top Side Copper Pattern and Wire Jumper 19.7.1 Basic Rule for Crossing JP Links and Top Copper Pattern

Wire jumpers (JP links) and the topside copper pattern should cross at right angles (90°) as shown in Figure 19-3. The topside copper pattern should be positioned in the middle of the wire jumper. Rated voltage is 5 V (D.C.). Figure 19-3 Crossing JP links and top copper pattern

19.7.2 Wire Link and Top Copper Pattern Clearance

Except where top copper pattern crosses a JP link as in 19.7.1, the relationship between a wire JP link and the top copper pattern should be as shown in Figure 19-4.

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PCB Design Manual Figure 19-4 JP link and top copper pattern clearance

Exception: Try not to position the topside copper pattern in the area shown dotted. If this can not be avoided, keep a clearance of 0.5 mm from the centre of the JP wire link and make sure that both solder resist and a silkscreen ident covers area of the JP link.

19.7.3 Clearance of Copper Pattern with Regard to Withstand Voltage (refers to 9.11.3)

This covers the clearance between patterns of different potentials and regulated standard values stated in 9.11.3 Clearance of Copper Pattern with Regard to Withstand Voltage. Refer to section 9.11.3. 19.8 Topside Pattern and Lead Parts Relationship for Double Sided Silver Via PCB 19.8.1 Application

This section applies to the topside copper pattern for double sided PCBs for auto-inserted parts, operated forming process, or double sided silver through hole PCBs. 19.8.2 Standard

(1)

Example of forming:

This forming shape describes the shape of legs sticking out from boards when components are inserted; "f" shows the distance between the original point and formed point. (2)

Area where copper patterns cannot be placed:

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PCB Design Manual

a: = 1.0 mm p:

insertion pitch

f:

lead forming size

d:

lead pitch allowed to stick out

Exception: Try not to position the topside copper pattern in the area shown dotted. If this can not be avoided, keep a clearance of 0.5 mm from the centre of the component and make sure that both solder resist and a silkscreen ident covers area of the component.

(3)

This covers the clearance between patterns of different potentials and regulated standard values stated in 9.11.3 Clearance of Copper Pattern with Regard to Withstand Voltage. Refer to section 9.11.3.

20 Design Standard for Chip Mount Patterns For the design standard for chip mount patterns, for normal land size of chip mount components refer to DM-ST003E. 20.1 Pattern 20.1.1 Pattern Design

The copper pattern should be as straight as possible. 20.1.2 Pattern Width and Clearance

Pattern Width Pattern Clearance

0.25 mm (minimum) 0.25 mm (minimum)

* 1608 size chip mount components only, can use 0.2 mm pattern width. 20.1.3 Pattern Clearance to Board Edge and Through Hole

Clearance of copper pattern to board edge is a minimum of 0.5 mm. In the area of a break-off board refer to the design standard for a break-off area section 9.12. 20.1.4 Pattern Clearance to Copper Lands

Reflow Dip

0.25 mm (minimum) 0.3 mm (minimum)

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20.2 Chip Component Position 20.2.1 Centre Position

The centre of a chip component must be on the 0.1 mm grid. 20.2.2 Clearance Between Chip Components

(1)

When the outline of the chip component is smaller than the chip land outline:

Height of Chip Component 1 < 1.2 mm 2 1.3 mm ~ 2.5 mm 3 2.6 mm ~ 4.0 mm 4 > 4.1 mm

Symbol

(2)

1 0.4 0.4 0.4

4 1.5 1.5 1.5

When the outline of the chip component is larger than the chip land outline:

Symbol

(3)

A B C

Height of Chip Component (mm) Reflow Dip 2 3 4 1 2 3 0.5 1.0 1.5 0.8 0.8 1.0 0.5 1.0 1.5 0.8 0.8 1.0 0.5 0.5 0.5 0.8 0.8 1.0

A B C

1 0.4 0.4 0.5

Height of Chip Component (mm) Reflow Dip 2 3 4 1 2 3 0.5 1.0 1.5 0.8 1.0 1.5 0.5 1.2 2.0 0.8 1.0 1.5 0.5 0.5 0.5 0.8 1.0 1.5

4 2.0 2.0 2.0

Chip clearance adjacent to various types of surface mount IC packages:

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Nothing can be placed in the area of a fiducial mark (refer to section <SECTION> for details). QFP Component Height (mm)

Symbol

A B C

1 0.5 0.5 -

2 0.5 0.5 -

Reflow 3 1.0 1.0 -

4 1.5 1.5 -

1 1.0 1.0 -

2 1.5 1.5 -

Dip 3 2.0 2.0 -

4 2.5 2.5 -

Dip 3 1.5 2.0

4 2.0 2.5

SOP Component Height (mm)

Symbol

A B C

1 0.5 0.5

2 0.5 0.5

Reflow 3 1.0 1.0

4 1.5 1.5

1 1.0 1.0

2 1.0 1.5

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PCB Design Manual MSP J bend Component Height (mm)

Symbol

(4)

A B C

1 1.0 -

2 1.5 -

Reflow 3 2.0 -

4 2.5 -

1 2.0 -

2 3.0 -

Dip 3 4.0 -

4 5.0 -

Mounting clearance between various types of surface mount IC packages (land clearance). A B C D E F G

QFP SOP MSP PLCC SOJ Filter Double TC

⇒ treat the same way ⇒ treat the same way All dimensions in mm.

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PCB Design Manual

(5)

Clearances for discrete components. Copper side clearance. Reflow Dip Attach later

size a 1.5 0.8 1.5

All dimensions in mm.

20.3 Fiducial Markings 20.3.1 Local Fiducials for Flat Package ICs

Local fiducial marks are necessary for IC's where the leg pitch is less than 0.8 mm. Where the leg pitch is equal or greater to 0.9 mm a local fiducial is not necessary except when mounting FP IC, AMS, or AMF only.

A Ø 1.0 mm B Ø 2.5 mm Position a pair of fiducial marks diagonally across the QFP IC.

C Ø 2.8 mm

copper pad exposed area solder resist clearance non-resist area area with no other copper pad

20.3.2 Position of Fiducial (AMF) Mark

The fiducial marks for the auto insertion machine should be positioned in each of the four corners of a surface mount board. Usual Case (all dimensions in mm) L1 and L2 should be less than 15.0 mm and must not be the same size and shape to prevent the board flow direction from being mistaken.

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PCB Design Manual Exceptional Case (if the usual case can not be applied). L1 and L2 should be less than 15.0 mm and should not be the same size and shape to prevent the board flow direction from being mistaken. a = 5.0 mm As an exception, "a" can be 2.0 mm minimum in exceptional circumstances.

20.3.3 Shape of Fiducial Mark

(1)

Basic Shape 1 A Ø 1.0 mm B Ø 3.0 mm C Ø 4.0 mm

(2)

copper pad exposed area solder resist clearance non-resist area area with no other copper pad

Basic Shape 2 A Ø 1.0 mm B Ø 3.0 mm C Ø 4.0 mm

copper pad exposed area solder resist clearance non-resist area area with no other copper pad

20.3.4 Fiducial Marks for Printing Solder Paste Film

A fiducial mark is necessary for the solder paste screen. (1)

Position: Same position as the normal fiducial mark (AMF).

(2)

Details: Fiducial mark is circuilar shape, 1.0 mm in diameter.

21 Copper Pattern Design 21.1 General Idea of Copper Pattern Design Component placement and copper pattern layout should be designed to make production simple and secure quality and reliability. For instance, if the mounting density is not very high and there are no restrictions then it is preferable to scatter components evenly over the board for productivity and to improve quality. Components to be used, and their locations should be chosen with consideration to reducing the number of components on the copper side, reducing the number of manual insertions or preparatory processes and to ensure a basic production process of re-flow and flow.

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21.2 Requirement for Copper Pattern Design When track is laid down from a chip land make the pattern width small in relations to the land, considering that the solder resist area will become larger than the land because of leaning and spreading. When copper patterns bend at 90° do not make the angle sloping if possible. A copper pattern underneath a chip component should be laid down the centre of the chip. Do not position through holes inside the edge of an electrolytic capacitor or a resin film component. 21.3 (1)

How to lay down copper tracking: Reflow Side Good Example Pattern should be smaller than land.

(2)

Dip Side Good Example Edge of land should be recogniseable.

Bad Example

When bending copper patterns at right angles do not fillet the angle down to 45°. Reflow Style: Good

Bad Bad There is a risk of a short circuit with a chip component that has been mis-positioned.

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(3)

Cross pattern example, underneath chip components.

(a) If there is a single or odd number of copper tracks:

(b) If there are an even number of copper tracks:

Copper track should run in the centre of the gap.

Copper tracks should be spread evenly through the gap.

(4)

Through hole position for electrolytic capacitor. The heat from soldering can transferred by the through hole to the component and destroy components covered in weak-heat-resistant resin film. Short circuits can be created. The following rules aim to prevent this. They apply to all components covered with a weak heat-resistant resin film, except for electrolytic capacitors. B = A + 1.0 mm (each side 0.5 mm clearance) A B

component body diameter area to be clear of through holes

22 Copper Pattern Design for Surface Mount IC Package 22.1 Dip Side The minimum lead pitch for a FPIC that is glued and goes through solder bath should be 0.8 mm. Contact the Component Approval Engineer/department to check if components have permissible heat resistance. For manual soldering, refer to the copper side standard. 22.2 Pattern Design Standard for FPIC (QFP, SOP) 22.2.1 Pattern Size

(1)

Land width based upon lead pitch. All dimensions in mm.

leg pitch 1.27 1.00 0.80 0.65 0.50

(2)

land width 0.66 0.50 0.45 0.40 0.28

outer land width Reflow side Dip side 1.50 1.50 0.60 1.00 0.60 1.00 -

Land length. All dimensions in mm. L1

contact length between leg and land. Page 123

PCB Design Manual leg pitch size a > 0.80 size b size a < 0.65 size b

Reflow side 0.40 0.50 0.30 0.40

Dip Side 0.40 0.80 -

L

Land Length

L = L1 + a + b

Land should not be extended beneath the package.

22.2.2 Solder Resist Size

The method of applying solder resist is different between photo resist (liquid photo imageable solder resist, lpsr) and screen printing which results in differing amounts of print misalignment. (1)

Set the solder resist area to be larger than the land, as shown in the diagram.

Size A

0.1 mm for screen printed solder resist

Size A

0.05 mm for photo printed solder resist (see note below)

Note: when the pitch is less than 0.5 mm use photo resist method defining size A as 0.05 mm.

(2)

The screen printed method increases printing misalignment. For ICs with a pitch size below 0.65 mm it is not possible to have solder resist between lands. In this case a single solder resist clearance is used on all legs to prevent cracking/webbing of the solder resist.

22.2.3 Solder Paste Printing Size

(1)

The thickness of the solder paste screen should be decided by a Production Engineer.

(2)

Solder paste print area depends upon the leg or lead pitch. (a)

If lead pitch is larger than 1.0 mm then the solder paste is the same size as the copper land.

(b)

If lead pitch is 0.8 mm then solder paste length is equal to the copper pad length and solder paste width is 0.38 mm. See the diagram below, all dimensions are in mm.

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(c)

If lead pitch is 0.65 mm then refer to the diagram below. All dimensions are in mm.

(d)

If lead pitch is 0.5 mm then refer to the diagram below. All dimensions are in mm.

22.3 Pattern Design Standard for J-leg IC (SOJ, PLCC) 22.3.1 General Component Size

(1)

J-leg components (SOJ and PLCC) can only be mounted on the reflow side as solder can not be applied at solder bath.

(2)

Size of component (SOJ 1.27 mm pitch):

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All dimensions in mm.

22.3.2 Land Area

The land area is shown in the diagram below:

22.3.3 Solder Paste Printing Size

The solder paste print area is the same area as the copper land. 22.3.4 Solder Resist Size

The solder resist area is shown below. Method Screen printing solder resist method

Solder Resist Area : set value land outline + 0.1 mm (on each side)

22.4 Pattern Design Standard for PLCC Package 22.4.1 General Component Size (PLCC 1.27 mm pitch)

Component size details are the same as for SOJ in section 22.3.1. 22.4.2 Land Area

Component land area is the same as for SOJ in section 22.3.2. 22.4.3 Solder Paste Printing Size

The solder paste is the same as for SOJ in section 22.3.3. The solder paste print area is the same area as the copper land. 22.4.4 Solder Resist Size

The solder resist area is shown below. Method Screen printing solder resist method

Solder Resist Area : set value land outline + 0.1 mm (on each side) Page 126

PCB Design Manual 22.4.5 Setting Standard for Outer Lands (Corner Lands)

The clearance between corner (or outer) lands shall be a minimum of 0.5 mm.

If the minimum clearance of 0.5 mm cannot be met, then the edge of the corners should be cut as shown in the diagram below.

22.5 Pattern Design Standard for Surface Mount ICs To maintain the level of soldering quality consideration should be given to the following requirements of design. 22.5.1 Laid Down Track Widths

Etching forms standard size lands. The laid down track width should be narrower than the width of the land. In the event of misalignment causing the land area to change then the amount of solder must also be changed to avoid solder rejects. 22.5.2 Copper Through Hole (Reflow Side)

(1)

Position. Through holes should be kept separate from surface mount lands to prevent solder running into the through hole.

A B C D E F G

Solder Resist forming method screen printing 0.5 0.5 0.5 0.5 0.5 0.5 0.5

All dimensions in mm.

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(2)

Bad Examples A

solder paste will run into through hole under reflow temperature.

B

solder paste will run into through hole under reflow temperature.

22.5.3 Direction of Chip Mounting for Dip Side

(1)

Purpose. To reduce the chances of solder bridging and component miss-insertion occurring, and to improve the quality of the solder process.

(2)

To prevent solder bridging and component miss-insertion.

SOP SMTR (3, 4, 5, and 6 pins)

(3)

To prevent component miss-insertion.

tanalum electrolytic capacitor chip inductor power transistor / diode trimmer chip variable resistor

Note: refer to section 9.3 for component locating. 22.5.4 Silk Screen Idents

Do not print silk screen idents on through holes to prevent contamination.

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23 Design Material Reference 23.1 Surface Insulation Resistance Between Patterns For detail refer to Reports 50051, 50052. 23.1.1 Relationship Between Copper Pattern Shape and Surface Insulation Resistance

(1)

Surface insulation resistance is not proportional to pattern clearance. Even if the clearance is large the insulation resistance will not be large.

(2)

Surface insulation resistance is inversely proportional to the length of parallel pattern. If the length of the pattern is doubled the surface insulation resistance is halved.

(3)

The surface insulation resistance is greatly increased by the use of slots.

23.1.2 Temperature Characteristic of Surface Insulation Resistance

Generally this will follow the Arrhenius formula: Insulation resistance = Ae B/T Where A, B are constants depending on the board material and T is Absolute Temperature (°K). Figure 23-1 shows a representation of the insulation resistance curves. Figure 23-1 Temperature Characteristic of Surface Insulation Resistance

TLC-134 ML-PEG TLC-751 MA-7FR L-6514C

paper phenol paper epoxy glass compsite epoxy glass polyester glass compsite epoxy

TLC-321 TLC-331 TLC-332 TLC-332T TCL-332A

paper phenol paper phenol paper phenol paper phenol paper phenol

23.1.3 Relationship of Surface Insulation Resistance and Humidity

This is shown in Figure 23-2. As humidity increases, the surface water content will increase and the resistance will decrease. When salt is deposited on the surface, provided that it is dry, the crystalline lattice structure will prevent ion movement and the surface resistance will increase. However, when the humidity increases and the salt becomes moist, sodium positive and chlorine negative ions are formed, producing electrical characteristics, and the resistance will quickly reduce. Consideration when dust is present on the board - in dry conditions, dust has good insulation resistance, but in high humidity the dust will absorb the moisture, and the insulation resistance will quickly roll off. Therefore, the copper side should face downwards and the pattern clearance should be as wide as possible. Page 130

PCB Design Manual Figure 23-2 Relationship of Surface Insulation Resistance and Humidity

Material: TLC-332 (paper phenol). Copper pattern clearance shown inside brackets. 23.1.4 Anti-Heat and Anti-Humidity Characteristic

The board is left with no load at 40 °C and 90 to 95 % humidity for a long period and then the insulation resistance measured. The result is as shown in Figure 23-3 (solid line). The same is done again but at 85 °C (broken line). TLC-134 ML-PEG TLC-751 MA-7FR L-6514C

paper phenol paper epoxy glass compsite epoxy glass polyester glass compsite epoxy

TLC-321 TLC-331 TLC-332 TLC-332T TCL-332A

paper phenol paper phenol paper phenol paper phenol paper phenol

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PCB Design Manual Figure 23-3 Anti-Heat and Anti-Humidity Characteristic

23.2 Capacitance Between Copper Patterns 23.2.1 Relationship Between Copper Pattern Shape and Capacitance

In high frequency circuits this will be relevant to the PCB design, and can be calculated from the formulae: Surface capacitance

Interlayer capacitance

ε sl K ' . ( pF ) 7.2π K ε lb C2 = s ( pF ) 3.6cπ

C1 =

As shown in Figure 23-4 and Figure 23-5: C1

Capacitance between A & B (pF)

c

Board thickness (mm)

C2

Capacitance between A & C (pF)

ℓ

Pattern length (mm)

2a

Pattern clearance (mm)

εs

Dipole factor

b

Pattern width (mm)

K1/K

As shown in Figure 23-5

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Figure 23-4 Capacitance Between Copper Patterns (diagram)

PCB Design Manual Figure 23-5 Capacitance Between Copper Patterns (graph)

NOTE: When slots are used C1 ; Es = 1. This also improves the board humidity characteristics. 23.2.2 Temperature Characteristics for Capacitance

This is shown in Figure 23-6. The temperature characteristic is not linear. Temperature coefficients are +2200 to +2400 ppm for paper phenol, +2400 ppm for paper epoxy and +900 ppm for glass epoxy. From ambient to 70 °C, phenol resin -OH ions will align into molecule chains, and thus the temperature coefficient will be high. This must be considered when designing the circuit. Figure 23-6 Temperature Characteristics for Capacitance TLC-134 ML-PEG TLC-751 MA-7FR L-6514C TLC-321 TLC-331 TLC-332 TLC-332T TCL-332A

paper phenol paper epoxy glass compsite epoxy glass polyester glass compsite epoxy paper phenol paper phenol paper phenol paper phenol paper phenol

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PCB Design Manual 23.2.3 Anti-Heat and Anti-Humidity of Capacitance

Figure 23-7 and Figure 23-8 represent the respective characteristics. If the laminated boards contain water then εs will be high (-80) and therefore the capacitance will increase. If the board is drier, then the capacitance will decrease. This gives a similar characteristic to insulation resistance. Figure 23-7 Static Electric Capacity Difference Ratio (between layers)

TLC-134 ML-PEG TLC-751 MA-7FR L-6514C TLC-321 TLC-331 TLC-332 TLC-332T TCL-332A

paper phenol paper epoxy glass compsite epoxy glass polyester glass compsite epoxy paper phenol paper phenol paper phenol paper phenol paper phenol

TLC-134 ML-PEG TLC-751 MA-7FR L-6514C TLC-321 TLC-331 TLC-332 TLC-332T TCL-332A

paper phenol paper epoxy glass compsite epoxy glass polyester glass compsite epoxy paper phenol paper phenol paper phenol paper phenol paper phenol

Figure 23-8 Static Electric Capacity Difference Ratio (surface)

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23.3 Inductance of the Copper Pattern The inductance of the pattern can be calculated using the following formula (±5 % tolerance).

⎡ ⎛ 8 A ⎞⎛ C 2 ⎞ 3C 2 1 ⎤ ⎟+ L = 0.319 AN ⎢2.3⎜ log10 − ⎥ ( μH ) ⎟⎜⎜1 + 2 ⎟ 2 C 96 A 80 A 2⎦ ⎠⎝ ⎠ ⎣ ⎝ 2

Figure 23-9 Inductance of Copper Pattern

In Figure 23-9: A

Average radius of coil in inches

N

Number of turns

C

Width of winding in inches

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24 Design Checklist After finishing the design, check the following: 1.

Do you have permission from other departments when using an exception from the design standard?

2.

Did you study the selection of material?

3.

Did you study the selection of the grade in detail?

4.

Are the component holes and outline on the grid?

5.

Is the outline size optimum for economical spitting?

6.

Did you investigate whether a PCB should be a single or multi-board?

7.

Is the component location correct with regard for withstand voltage, anti-heat and mechanical stress?

8.

Are shield plates located correctly, used effectively and to the standard?

9.

Is the pattern, at minimum distance, free of sharp edges and smooth in signal path?

10.

Are the areas of copper foil less than a diameter of 25.4 mm?

11.

Is the earth and B+ pattern correct?

12.

Do holes have the correct clearance from component leads?

13.

Are the land sizes to standard?

14.

Are the solder lands to standard - are there any problems with soldering?

15.

Have the corners of square holes and the PCB outline the correct radii?

16.

Is the clearance between the holes and the outline correct?

17.

Is the minimum distance between holes to standard?

18.

When slots were used was this investigated in detail?

19.

Check the size, position and pattern around the attachment holes.

20.

Are the guide holes the correct size and position?

21.

Is the pattern width correct with regard to current capacity, resistance and mechanical considerations?

22.

Is the pattern clearance correct with regard to withstand voltage and production restraints?

23.

Did you confirm the insulation resistance capacitance and inductance between patterns?

24.

Is the clearance between the copper pattern and the board outline correct?

25.

Is the clearance between solder lands and the board outline correct?

26.

Are the idents identifying the correct parts?

27.

Do the topside or bottom side idents overlap the holes, solder lands or board outline?

28.

Do any of the foil side idents overlap the copper pattern text (e.g. Stock No.)?

29.

Are the locations of square pins or through hole pins correct (i.e. not close to guide holes or other parts)?

30.

Ensure the copper pattern on connectors is located correctly from the outline? Make sure the solder resist does not overlap the copper edge connector. Ensure solder pools are allocated, and make sure that at least the centre of one connector is on the grid. Page 136

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31.

Did you try to keep copper side components to a minimum, and where they are used, is this to standard?

32.

When using small pitch ICs, is the centre line through the lands at right angles to the soldering direction?

33.

When using AI components, make sure their position and clearance is as the standard.

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25 Appendix A Index of Figures Figure 2-1 PCB Production Process.................................................................................................................... 1  Figure 2-2 Definition of Punched Hole Size ........................................................................................................ 2  Figure 9-1 Group Holes ..................................................................................................................................... 16  Figure 9-2 PCB Outline Shape .......................................................................................................................... 18  Figure 9-3 Multi-Board Arrangements ............................................................................................................... 19  Figure 9-4 Multi-Board Arrangement ................................................................................................................. 19  Figure 9-5 Soldering Direction for Break-off Boards ......................................................................................... 20  Figure 9-6 Hole Cut Standard............................................................................................................................ 22  Figure 9-7 Preventing Burring ........................................................................................................................... 23  Figure 9-8 V cut size and tolerance ................................................................................................................... 23  Figure 9-9 Basic Rules for Component Placement ........................................................................................... 25  Figure 9-10 Stand-off Component Placement ................................................................................................... 25  Figure 9-11 Transistor Positioning..................................................................................................................... 26  Figure 9-12 Connector Placement In Relation To Board Edge ......................................................................... 26  Figure 9-13 DIP Orientation .............................................................................................................................. 27  Figure 9-14 lead larger than hole ...................................................................................................................... 27  Figure 9-15 component body rests on PCB ...................................................................................................... 27  Figure 9-16 Board Edge Clearance ................................................................................................................... 28  Figure 9-17 Restriction On Fitting PCB Into Cabinet Guides ............................................................................ 28  Figure 9-18 Solder bar Support ......................................................................................................................... 30  Figure 9-19 Topside Solder bar Ident ................................................................................................................ 30  Figure 9-20 Chassis Frame Indicators .............................................................................................................. 30  Figure 9-21 Clearance on PCB topside ............................................................................................................. 31  Figure 9-22 Clearance for Splash Bar ............................................................................................................... 31  Figure 9-23 Components within the area of the Support Bar ............................................................................ 32  Figure 9-24 Clearance between Primary and Secondary Power Circuits with Screw Hole .............................. 32  Figure 9-25 Good and Bad Copper Patterns ..................................................................................................... 34  Figure 9-26 Ground Patterns ............................................................................................................................. 35  Figure 9-27 Ground Connections ...................................................................................................................... 35  Figure 9-28 Components fitted after Solder Bath (1) ........................................................................................ 36  Figure 9-29 Components fitted after Solder Bath (2) ........................................................................................ 36  Figure 9-30 Solder Resist for Wide Pitch Holes ................................................................................................ 37  Figure 9-31 Solder Resist for Narrow Pitch Holes............................................................................................. 37  Figure 9-32 Standard and Exceptional Land Sizes ........................................................................................... 40  Figure 9-33 Component Leg Diameters ............................................................................................................ 41  Figure 9-34 Minimum Distance From Hole Centre To Land Edge .................................................................... 42  Figure 9-35 Minimum Size of Solder Land ........................................................................................................ 42  Figure 9-36 Mechanical Stress on Land (1) ...................................................................................................... 45  Figure 9-37 Mechanical Stress on Land (2) ...................................................................................................... 45  Figure 9-38 Spare Land to Prevent Solder Bridge ............................................................................................ 45  Figure 9-39 Mechanical Stress on Land (3) ...................................................................................................... 46  Figure 9-40 Mechanical Stress on Land (4) ...................................................................................................... 46  Figure 9-41 Mechanical Stress (1) .................................................................................................................... 47  Figure 9-42 Mechanical Stress (2) .................................................................................................................... 47  Figure 9-43 Mechanical Stress (3) .................................................................................................................... 47  Figure 9-44 Retaining Screw to relieve Stress .................................................................................................. 47  Figure 9-45 Soft Absorber plus Retaining Screw .............................................................................................. 47  Figure 9-46 Minimum Distance for Component Hole to Board Edge ................................................................ 49  Figure 9-47 Clearance Between Holes and Copper Pattern ............................................................................. 49  Figure 9-48 Hole/Land Measurement Guide ..................................................................................................... 51  Figure 9-49 Hole/Land Measurement Guide ..................................................................................................... 51  Figure 9-50 Air Pocket ....................................................................................................................................... 52  Figure 9-51 Pattern Cuts ................................................................................................................................... 52  Figure 9-52 Hole/Land Measurement Guide ..................................................................................................... 53  Figure 9-53 Hole Pitches and Board Thickness ................................................................................................ 54  Figure 9-54 Slits................................................................................................................................................. 54  Figure 9-55 Special Slits .................................................................................................................................... 55  Figure 9-56 Q-Hole Positions ............................................................................................................................ 55  Figure 9-57 Earthing via Attachment Hole ........................................................................................................ 56  Figure 9-58 Guide Hole (1) ................................................................................................................................ 56 

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PCB Design Manual Figure 9-59 Guide Hole (2) ................................................................................................................................ 56  Figure 9-60 Ventilation Holes ............................................................................................................................ 57  Figure 9-61 Adjustment Hole in Copper Pattern ............................................................................................... 57  Figure 9-62 Placement Of Guide Holes............................................................................................................. 58  Figure 9-63 Current Capacity of Copper Foil .................................................................................................... 60  Figure 9-64 Chart for Pattern Widths................................................................................................................. 61  Figure 9-65 Minimum Track/Track and Track/Pad Clearance........................................................................... 62  Figure 9-66 Minimum Track/Hole and Pad/Hole Clearance .............................................................................. 62  Figure 9-67 Copper Pattern Clearance (1) ........................................................................................................ 65  Figure 9-68 Copper Pattern Clearance (2) ........................................................................................................ 66  Figure 9-69 Minimum Clearance Copper to Board Edge .................................................................................. 67  Figure 9-70 Minimum Clearance Copper to Break-Off ...................................................................................... 67  Figure 9-71 Minimum Clearance Between Solder Land Edge and Board Outline ............................................ 68  Figure 9-72 Minimum Clearance Between Solder Resist and Copper Pattern ................................................. 68  Figure 9-73 PCB Flow Indicator ........................................................................................................................ 75  Figure 9-74 Minimum Clearance to Idents ........................................................................................................ 76  Figure 9-75 Minimum Distances to Board Outline............................................................................................. 76  Figure 9-76 Size of Square Pins........................................................................................................................ 77  Figure 9-77 Position of Square Pins (1) ............................................................................................................ 78  Figure 9-78 Position of Square Pins (2) ............................................................................................................ 78  Figure 9-79 Large Eyelet ................................................................................................................................... 78  Figure 9-80 Small Eyelet ................................................................................................................................... 78  Figure 9-81 Available Area for Eyelet Insertion ................................................................................................. 79  Figure 9-82 Eyelet Position Relative To Square Pins ....................................................................................... 79  Figure 9-83 Eyelet Position Relative To AI Parts .............................................................................................. 80  Figure 9-84 Eyelet Position Relative To Axial Parts .......................................................................................... 80  Figure 9-85 Eyelet Position Relative To Other Eyelets ..................................................................................... 81  Figure 9-86 Board Edge Connectors ................................................................................................................. 81  Figure 9-87 Attachment Method For Shield Cases (1) ...................................................................................... 82  Figure 9-88 Attachment Method For Shield Cases (2) ...................................................................................... 82  Figure 9-89 Copper Side Wiring ........................................................................................................................ 83  Figure 9-90 Copper side Components .............................................................................................................. 83  Figure 9-91 Slit Pattern for Assembly and Test................................................................................................. 84  Figure 9-92 Slit Pattern for Service ................................................................................................................... 84  Figure 9-93 ........................................................................................................................................................ 84  Figure 9-94 ........................................................................................................................................................ 84  Figure 9-95 Axial Components .......................................................................................................................... 89  Figure 9-96 Non-Axial Components .................................................................................................................. 89  Figure 9-97 Board Edge Clearance for Auto-Inserted Axial Components ........................................................ 90  Figure 9-98 Board Edge Clearance for Auto-Inserted Non-Axial Components ................................................ 91  Figure 9-99 Board Edge Clearance for Square Pins ......................................................................................... 92  Figure 9-100 Square Pin to Axial Components ................................................................................................. 95  Figure 9-101 Square Pin to Non-Axial Components ......................................................................................... 95  Figure 9-102 Square Pin to Square Pin............................................................................................................. 95  Figure 9-103 Clearance for Radial Auto-Insertion with Chip Mount Component (1) ......................................... 96  Figure 9-104 Clearance for Radial Auto-Insertion with Chip Mount Component (2) ......................................... 96  Figure 9-105 Minimum distance between component holes ........................................................................... 102  Figure 9-106 Test Support (1) ......................................................................................................................... 103  Figure 9-107 Test Support (2) ......................................................................................................................... 103  Figure 9-108 Component Height on the Board ............................................................................................... 103  Figure 9-109 Clearance for Guide Hole........................................................................................................... 104  Figure 9-110 Variable Resistor (horizontal) ..................................................................................................... 104  Figure 9-111 Clearance required for coil ......................................................................................................... 104  Figure 9-112 Clearance required for Phono plugs .......................................................................................... 105  Figure 9-113 Clearance required for Vertical Variable Resistor ...................................................................... 105  Figure 9-114 Clearance required for Horizontal Variable Resistor ................................................................. 105  Figure 9-115 Pitch of Potentiometers .............................................................................................................. 106  Figure 9-116 Service Personal Operated Variable Resistor ........................................................................... 106  Figure 9-117 User Operated Variable Resistor ............................................................................................... 106  Figure 9-118 Horizontal Potentiometers and Coils.......................................................................................... 107  Figure 9-119 Horizontal Potentiometer and Phono Plugs ............................................................................... 107  Figure 12-1 Minimum Pitch Between Silver Through Holes ............................................................................ 108 

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PCB Design Manual Figure 18-1 Height of Silver Through Hole ...................................................................................................... 112  Figure 19-1 Design Standard of Silver Through Hole ..................................................................................... 113  Figure 19-2 Silver Through Hole/Component Hole Clearance ........................................................................ 114  Figure 19-3 Crossing JP links and top copper pattern .................................................................................... 114  Figure 19-4 JP link and top copper pattern clearance..................................................................................... 115  Figure 23-1 Temperature Characteristic of Surface Insulation Resistance..................................................... 130  Figure 23-2 Relationship of Surface Insulation Resistance and Humidity ...................................................... 131  Figure 23-3 Anti-Heat and Anti-Humidity Characteristic.................................................................................. 132  Figure 23-4 Capacitance Between Copper Patterns (diagram) ...................................................................... 133  Figure 23-5 Capacitance Between Copper Patterns (graph) .......................................................................... 133  Figure 23-6 Temperature Characteristics for Capacitance ............................................................................. 133  Figure 23-7 Static Electric Capacity Difference Ratio (between layers).......................................................... 134  Figure 23-8 Static Electric Capacity Difference Ratio (surface) ...................................................................... 134  Figure 23-9 Inductance of Copper Pattern ...................................................................................................... 135 

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26 Appendix B Index of Tables Table 1 Documents Necessary for Production .................................................................................................... 7  Table 2 Flame Retardant Requirements (< 15 W) .............................................................................................. 9  Table 3 Flame Retardant Requirement (> 15 W) ................................................................................................ 9  Table 4 ............................................................................................................................................................... 11  Table 5 Raw Material Details ............................................................................................................................. 12  Table 6 PCB Grades and Precision Tolerances ................................................................................................ 13  Table 7 Single Sided Board Production Process .............................................................................................. 14  Table 8 Double Sided Board Production Process ............................................................................................. 15  Table 9 PCB Standard Size Categories ............................................................................................................ 17  Table 10 PCB Hole Size/Outline Tolerance ...................................................................................................... 18  Table 11 Round Hole Size Tolerance................................................................................................................ 20  Table 12 Hole Position Tolerance ..................................................................................................................... 21  Table 13 Pattern Clearance for Break-offs ........................................................................................................ 21  Table 14 Chip Mount Component to V-cut/Breakoff Clearance ........................................................................ 22  Table 15 V cut Depth ......................................................................................................................................... 23  Table 16 Test Land Sizes .................................................................................................................................. 38  Table 17 Land Size For Manual Insertion ......................................................................................................... 41  Table 18 Minimum Distance From Hole Centre To Land Edge ........................................................................ 41  Table 19 Minimum Size Of Solder Land ............................................................................................................ 42  Table 20 Components More Than 5g ................................................................................................................ 46  Table 21 Tolerance Of Square Holes ................................................................................................................ 48  Table 22 Minimum Size For Square Holes ........................................................................................................ 48  Table 23 Hole/Land Measurement Guide (1) .................................................................................................... 50  Table 24 Hole/Land Measurement Guide (2) .................................................................................................... 51  Table 25 Hole/Land Measurement Guide (3) .................................................................................................... 52  Table 26 Hole/Land Measurement Guide (4) .................................................................................................... 53  Table 27 Tolerance Between Slits & Copper Pattern ........................................................................................ 54  Table 28 Guide Holes ........................................................................................................................................ 58  Table 29 Minimum Width Of Copper Pattern .................................................................................................... 59  Table 30 Minimum Track/Track & Track/Pad Clearance................................................................................... 62  Table 31 Minimum Clearance Track/Hole & Pad Hole ...................................................................................... 62  Table 32 Copper Pattern Clearance to withstand Voltage ................................................................................ 63  Table 33 Copper Pattern Clearance .................................................................................................................. 64  Table 34 Board Outline Clearance .................................................................................................................... 67  Table 35 Minimum Clearance Between Solder Resist and Copper Pattern ..................................................... 68  Table 36 Minimum Clearance to Idents ............................................................................................................. 76  Table 37 Clearance between Solder Resist, Board Edge and Ident ................................................................. 77  Table 38 Hole Size Of Square Pins ................................................................................................................... 77  Table 39 Land Size For Copperside Parts ........................................................................................................ 83  Table 40 Axial Component Pitch ....................................................................................................................... 90  Table 41 Non-Axial Components (Radial Components) ................................................................................... 93  Table 42 Large Components ............................................................................................................................. 94  Table 43 Clearance for Radial Auto-Insertion with Chip Mount Component..................................................... 96  Table 44 Rough Figures for Checking AI Components ..................................................................................... 98  Table 45 Axial and Axial .................................................................................................................................... 99  Table 46 Axial & Radial (part 1)....................................................................................................................... 100  Table 47 Axial & Radial (part 2)....................................................................................................................... 100  Table 48 Radial (5.0 mm) and Radial (5.0 mm) .............................................................................................. 101  Table 49 Stand Off Oxide Resistors (was table 34-3 page 150) ..................................................................... 102  Table 50 Auto-Insertion Using Special Inserter ............................................................................................... 102  Table 51 Approved Silver Through Hole PCB Manufacture ............................................................................ 110  Table 52 Height of Silver Through Hole .......................................................................................................... 112  Table 53 Design Standards for PCB Manufacturers ....................................................................................... 112 

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