Presentation on Adder.
Submitted to:Vikas Sir Parmar
Submitted by:Deependra Singh
+
Basic Adders
Presented To Vikas Sir & All the EC branch.
Presented by Deependra Singh Parmar
What is Adder?
Adder : In electronics an adder is digital circuit that perform addition of numbers. In modern computer adder reside in the arithmetic logic unit (ALU).
Adders : Adders are important not only in the computer but also in many types of digital systems in which the numeric data are processed. Types of adder: •
Half adder 7. Full adder
Half adder : The half adder accepts two binary digits on its inputs and produce two binary digits outputs, a sum bit and a carry bit. input
input
Sum
cout
Carry
Truth Table A
B
C
S
0
0
0
0
0
1
0
1
1
0
0
1
1
1
1
0
Circuit diagram of Half adder
S is the two-bit XOR of A and B,
C is the AND of A and B.
Drawbacks •The major drawback of this circuit is that in case of a multibit addition, it cannot include a carry.
Full adder : The full adder accepts two inputs bits and an input carry and generates a sum output and an output carry. input
A
input
B
input
Cin
Sum
Cout
Carry
Circuit Diagram of Full Adder
Half adder to Full adder Half adder input
A
input
B
Half adder
A
Sum
B
Cin
Cout
Truth Table of Full Adder
Truth Table of Adder A
B
Cin
Cout
∑
0
0
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
Truth Table of Adder A
B
Cin
Cout
∑
0
0
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
Truth Table of Adder A
B
Cin
Cout
∑
0
0
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
Truth Table of Adder A
B
Cin
Cout
∑
0
0
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
Truth Table of Adder A
B
Cin
Cout
∑
0
0
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
Truth Table of Adder A
B
Cin
Cout
∑
0
0
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
Truth Table of Adder A
B
Cin
Cout
∑
0
0
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
Truth Table of Adder A
B
Cin
Cout
∑
0
0
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
Circuit of Adder A B
Circuit of Adder A B
X
Circuit of Adder A B
Cin
∑
Circuit of Adder A B ∑
Cin Y
Circuit of Adder A B ∑
Cin Y
= A.B
Circuit of Adder A B
Cin
∑
Cout
Cout= (A
B). Cin + A.B
Verification of Truth Table A
A
B
Cin
Cout
∑
0
0
0
0
0
B
Cin
∑
Cout
Verification of Truth Table A
A
B
Cin
Cout
∑
0
0
1
0
1
B
Cin
∑
Cout
Verification of Truth Table A
A
B
Cin
Cout
∑
0
1
0
0
1
B
Cin
∑
Cout
Verification of Truth Table A
A
B
Cin
Cout
∑
0
1
1
1
0
B
Cin
∑
Cout
Verification of Truth Table A
A
B
Cin
Cout
∑
1
0
0
0
1
B
Cin
∑
Cout
Verification of Truth Table A
A
B
Cin
Cout
∑
1
0
1
1
0
B
Cin
∑
Cout
Verification of Truth Table A
A
B
Cin
Cout
∑
1
1
0
1
0
B
Cin
∑
Cout
Verification of Truth Table A
A
B
Cin
Cout
∑
1
1
1
1
1
B
Cin
∑
Cout
Summary • The Adders • Cout = A.B + (A ⨁ B).Cin • ∑ = A ⨁ B ⨁ Cin • Applications and Uses of Adder
Subtractor
Half Subtractor Consider the circuit below: The circuit has two outputs labelled DIFF and BORROW. A truth table for the circuit looks like:
Truth Table A
B
DIFF
BORROW
0
0
0
0
1
0
1
0
0
1
1
1
1
1
0
0
Cleary this circuit is performing binary subtraction of B from A (AB, recalling that in binary 0-1 = 1 borrow 1). Such a circuit is called a half-subtractor, the reason for this is that it enables a borrow out of the current arithmetic operation but no borrow in from a previous arithmetic operation.
Full Subtractor As in the case of the addition using logic gates, a full subtractor is made by combining two half-subtractors and an additional OR-gate. A full subtractor has the borrow in capability (denoted as BORIN in the diagram below) and so allows cascading which results in the possibility of multi-bit subtraction. The circuit diagram for a full subtractor is given below:-
Circuit of Full Adder
The final truth table for a full subtractor looks like:
Truth Table The final truth table for a full subtractor looks like:A
BORIN
B
BOROUT
D
0
0
0
0
0
0
0
1
1
1
0
1
0
1
1
0
1
1
0
1
1
0
0
1
0
1
0
1
0
0
1
1
0
0
0
1
1
1
1
1
Q/A Session
Thanks!