Lesson Plan Template 'a' Section

RAJALAKSHMI ENGINEERING COLLEGE Thandalam, Chennai – 602 105 LESSON PLAN

Faculty Name Subject Name

: :

R.KUMUDHA MICROPROCESSOR &

Code Code

: :

EE25 EC1362

Year Degree & Branch

: :

MICROCONTROLLER III B.E. – E.E.E.

Semester Section

: :

VI ‘B’

Aim:  To introduce Microprocessor Intel 8085 and the Micro Controller 8051 Objectives:  To study the Architecture of 8085 & 8051.  To study the addressing modes & instruction set of 8085 & 8051.  To introduce the need & use of Interrupt structure.  To develop skill in simple program writing.  To introduce commonly used peripheral / interfacing ICs – To study simple applications.

Signature of Faculty

Signature of HOD 1

Text Book(s): 1. R.S. Gaonkar, ‘Microprocessor Architecture Programming and Application’, Wiley Eastern Ltd., New Delhi, 1995. 2. Muhammad Ali Mazidi & Janice Gilli Mazidi, ‘The 8051 Micro Controller and Embedded Systems’, Pearson Education, 5th Indian reprint, 2003.

Reference Book(s): 1. William Kleitz, ‘Microprocessor and Micro Controller Fundamental of 8085 and 8051 Hardware and Software’, Pearson Education, 1998.

Signature of Faculty

Signature of HOD 2

Sl.

Date

Period Unit

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

7/12/08 7/12/08 10/12/08 10/12/08 11/12/08 12/12/08 12/12/08 12/12/08 13/12/08 14/12/08 14/12/08 02/01/08 04/01/08 04/01/08 07/01/08 08/01/08

1 2 5 6 5 4 6 7 4 1 2 4 4 5 6 7

I I I I I I I I I I I I I I I I

17

09/01/08

3

II

18 19

11/01/08 18/01/08

1 1

II II

20

21/01/08

6

II

21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

22/01/08 23/01/08 23/01/08 25/01/08 28/01/08 28/01/08 29/01/08 30/01/08 30/01/08 30/01/08 01/02/08 04/02/08 05/02/08 06/02/08 07/02/08 11/02/08 11/02/08 11/02/08 11/02/08 11/02/08 18/02/08 18/02/08

5 3 5 1 6 7 5 3 4 5 1 6 5 3 3 3 4 5 6 7 2 6

II II II II II II II II II II II II II II II III III III III III III III

Topic(s) Introduction Functional block diagram Signals Signals Memory interfacing Memory interfacing Problems Peripheral Interfacing Problems Timing Diagram Timing Diagram Timing Diagram Interrupt structure Interrupt structure Revision Test Instruction format and addressing modes Assembly language format Data transfer instructions Arithmetic & Logic Instructions Control Instructions Additional 16 bit Instructions Additional 16 bit Instructions Programs Programs Programs Tutorial Loop structure with counting Loop structure with counting Indexing Look up table Subroutine instructions Stack Revision Test Architecture of 8255 Architecture of 8255 Modes of 8255 Architecture of 8253 Programming of 8253 Modes of 8253 Test

Signature of Faculty

T / R Book

Page(s)

Book T T T T T T T T T T T T T T T T

No. 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

T

1

T T

1 1

179,180 42 - 46 176 - 186

T

1

186 - 204

T T T T T T T T T T T T T T T T T T T T T T

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

204 - 210 227 - 255 227 - 255 223,224 265 - 267 323 - 347

31-81 105-110 96-100 116 - 126 116 - 126 157 - 162 121 139 - 156 150 - 156 142,145 158 Notes 376 - 397 376 - 397

37 – 42,

276 - 289 276 - 289 276 - 289 Notes 305 - 318 295 - 304 460 - 463 460 - 463 463 - 476 494 - 496 497 - 499 499 - 505

Signature of HOD 3

Sl.

Date

Period Unit

No. 43

19/02/08

5

III

44

20/02/08

3

III

45

20/02/08

4

III

46

22/02/08

1

III

47

25/02/08

6

III

48

26/02/08

5

III

49

27/02/08

3

III

50

27/02/08

4

III

51

29/02/08

1

III

52

03/03/08

6

III

53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

04/03/08 05/03/08 05/03/08 07/03/08 10/03/08 11/03/08 12/03/08 12/03/08 14/03/08 17/03/08 18/03/08 19/03/08 19/03/08 21/03/08 24/03/08 25/03/08 26/03/08 26/03/08 28/03/08 31/03/08 01/04/08 02/04/08

5 3 4 1 6 5 3 4 1 6 5 3 4 1 6 5 3 4 1 6 5 3

III III IV IV IV IV IV IV IV IV IV IV IV IV IV IV V V V V V V

75

02/04/08

4

V

76 77 78

04/04/08 07/04/08 08/04/08

1 6 5

V V V

Topic(s) IC 8259 PIC - Architecture Modes & Programming of 8259 IC 8279 PIC - Architecture Modes & Programming of 8279 IC 8251 USART- Architecture Modes & Programming of 8251 Interfacing with 8085 - A/D converter Interfacing with 8085 - A/D converter Interfacing with 8085 - D/A converter Interfacing with 8085 - D/A converter Revision Test 8051 Functional block diagram Instruction format Addressing modes Interrupt structure Interrupts Programming Timers Timer Programming I/O ports I/O Port Programming Serial communication Serial Port Programming Revision Revision Test Data Transfer Instructions Manipulation Instructions Control & I/O instructions Programming 8051 Key board Interfacing LCD Interfacing Closed loop control of servo motor DC Motor Interfacing Stepper motor control Stepper Motor Interfacing

Signature of Faculty

T / R Book

Page(s)

Book T

No. 1

505 - 509

T

1

509 - 514

T

1

450 - 452

T

1

453 - 457

T

1

T

1

T

1

414 - 422

T

1

414 - 422

T

1

404 - 414

T

1

404 - 414

T T T T T T T T T T T T T T T T T T T T T T

1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

T

2

Notes

T T T

2 2 2

507 - 512 498 - 505 498 - 505

Intel Datasheet Intel Datasheet

23 - 34 37 - 62 109 - 134 317 - 339 317 - 339 240 - 260 240 - 260 94 - 106 94 - 106 278 -286 287 - 298

140 - 173 140 - 173 70 - 80 140 - 173 363 - 368 352 - 362

Signature of HOD 4

Sl. No. 79 80 81

Date

Period Unit

09/04/08 09/04/08 11/04/08

3 4 1

V V V

Topic(s) Revision Revision Test

Signature of Faculty

T / R Book Book T T T

No. 2 2 2

Page(s)

Signature of HOD 5