Instruction Set Architecture: Mips Section 2.1-2.5

Instruction Set Architecture MIPS Section 2.1-2.5

Operation of the computer Hardware     

Every computer must be able to perform arithmetic add a,b,c # the sum of b and c is placed in a # of operands = 3 So will can assume that every instruction will have three operands. Simplicity favours regularity.

Compiling to MIPS from HL 

Compile the following code: a=b+c; d=a-e;

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Now try this: f=(g+h)-(i+j);

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What is Java Byte Code

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Operands        

Operands are not variables, registers 32 bit registers, 1 word MIPS has only 32 registers Smaller is faster Why the number is 32? Not 31? $s0,$s1 for variables in Java/C $t0,$t1 for temporary storage Try this again:f=(g+h)-(i+j);

Memory Operands      

Complex data structures like array and structures Registers provide only a small amount of storage Data structures are kept in Memory So we need data transfer instructions – why? Instructions of this kind will provide memory address Less common variables are stored into memory – spilling registers

Memory Organization   

Viewed as a large, single-dimension array, with an address. A memory address is an index into the array "Byte addressing" means that the index points to a byte of memory.

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Memory Addressing 

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Bytes are nice, but most data items use larger "words" For MIPS, a word is 32 bits or 4 bytes. 2 questions for design of ISA: 

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Since one could read a 32-bit word as four loads of bytes from sequential byte addresses or as one load word from a single byte address, How do byte addresses map to word addresses? Can a word be placed on any byte boundary? 7

Addressing Objects: Endianess and Alignment 

Big Endian: address of most significant byte = word address (xx00 = Big End of word) 

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IBM 360/370, Motorola 68k, MIPS, Sparc, HP PA

Little Endian: address of least significant byte = word address (xx00 = Little End of word) 

Intel 80x86, DEC Vax, DEC Alpha (Windows NT)

3

2

1

0 little endian byte 0 lsb

msb 0 big endian byte 0

1

2

3

0

1

2

3

Aligned

Not Alignment: require that objects fall on address that is multiple of their size. Aligned 8

Immediate Operands  

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Programs uses constants. We don’t want to load them from memories every time Newer version of arithmetic add immediate addi $s1,$s2,4 # $s1=$s2+4 Make the common case faster

Load and Store

Compile practice  

g=h+A[8]; A[12]=h+A[8];

MIPS-32 and MIPS-64 

Do the numbers of registers increase?  

Moore’s Law? Depends on ISA?

Representing Instructions  

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All instructions are numbers Numbers are stored as electronic signals Check Binary and Hexadecimal numbers and their conversions The registers are numbers $s0-$s7 16-23 $t0-$t7 8-15

Machine Language 

Instructions, like registers and words of data, are also 32 bits long  

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Example: add $t0, $s1, $s2 registers have numbers, $t0=8, $s1=17, $s2=18

Instruction Format: 000000 10001 10010 01000 00000 100000 op

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rs

rt

rd

shamt funct

Can you guess what the field names stand for? 14

Arithmetic Operation

Add=32 sub 34

Machine Language 

Consider the load-word and store-word instructions,  

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Introduce a new type of instruction format  

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What would the regularity principle have us do? New principle: Good design demands a compromise I-type for data transfer instructions other format was R-type for register

Example: lw $t0, 32($s2) 35

18

8

op

rs

rt

32 16 bit number

Where's the compromise? 16

Loading Immediate Values

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R

op

rs

rt

rd

I

op

rs

rt

16 bit address

shamt

funct

What should be the format of addi? addi is in I format What’s the largest immediate value that can be loaded into a register? But, how do we load larger numbers? 17

I type and R Type

Translation 

A[300]=h+A[300]   

lw $t0,1200($t1) add $t0,$s2,$t0 sw $t0,1200($t1)

Summary - I

So far we’ve learned: 

MIPS — loading words but addressing bytes — arithmetic on registers only

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Instruction

Meaning

add $s1, $s2, $s3 sub $s1, $s2, $s3 lw $s1, 100($s2) sw $s1, 100($s2)

$s1 = $s2 + $s3 $s1 = $s2 – $s3 $s1 = Memory[$s2+100] Memory[$s2+100] = $s1

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Use of Registers  Example:

a = ( b + c) - ( d + e) ; // C statement # $s0 - $s4 : a - e   

add add sub

$t0, $s1, $s2 $t1, $s3, $s4 $s0, $t0, $t1

a = b + A[4];// add an array element to a var // $s3 has address A  

lw $t0, 16($s3) add $s1, $s2, $t0

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Use of Registers : load and store  Example

A[8]= a + A[6] ; lw $t0, 24($s3) add $t0, $s2, $t0 sw $t0, 32($s3)

// A is in $s3, a is in $s2 # $t0 gets A[6] contents # $t0 gets the sum # sum is put in A[8]

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load and store Ex: a = b + A[i]; // A is in $s3, a,b, i in $s4 add add add

$t1, $s4, $s4 $t1, $t1, $t1 $t1, $t1, $s3

// $s1, $s2,

# $t1 = 2 * i # $t1 = 4 * i # $t1 =addr. of A[i]

($s3+(4*i)) lw $t0, 0($t1) # $t0 = A[i] add $s1, $s2, $t0 # a = b + A[i]

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Example: Swap 

Swapping words

temp = v[0] v[0] = v[1]; v[1] = temp;

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swap: lw $t0, lw $t1, sw $t0, sw $t1,

0($s2) 4($s2) 4($s2) 0($s2)

$s2 has the base address of the array v

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Logical Operations

Summary-II