8.
Memory Address Register (MAR)
address and ope ode.
instruction consists of 3 fields-mode,
transfer.
(b) Hand shaking and stroke control mode of data
Microprogram 'Sequencer
Write notes on the folJowing : (a)
20
10
]0
(vii) What will be the instruction formate if the
Temporarary Reg. (TR)
(v) Instruction Reg. (IR) (vi)
Accumulator (AC)
Data Register (DR) (iv)
(ii) Program Counter (PC) (iii)
(i)
and find out their size also:
word contains 16 bits. Define the fOllowing registers
A memory unit has a capacity of 8192 words and each
(b) Write a short note on I/O processor.
7. (a)
Cil
dic1Jtes should
p~8p~ - drnqs J~l~um~p UI:J )' L }O S\rn~W .
..
any, will not be entertaiJ~cd ~lfter the examination .
complete question-paper. CO'11pbints in this regard, if
ensure that they have becn sU:lplied to correct and
Before ilnswering the question-paper
Note: Attempt ;lOy Five questions. All questJo, s c'arry equal marks.
Maximum Marks: 100
TillJ .. e: Three Hours
Computer Organisation
CSE-303-C
COMPUTER SCIENCE
'.
(Fifth Semester)
B. E. EXAMINATION
~'~9/?OO' ~ ~- '- -
Roll No .............................,.,
How many RAM and ROM chips are required?
rcplacement algorithm.
...• -
Micro-programmed and Hardwired control memory
,'fll((II.>lC'cr 'fll"fj' ;>~T?1TO.\
transfer.
5
cfooru:xfo :>!flut UOtmuu/\
(ii) Synchronous and asynchronous serial data
(i)
3. (a) Differentiate between the following :
,
10
10
Differentiate between Virtual memory and Cache memory. 5
(c) What is page replacement? Explain any page
(b)
memones.
Explain the difTerent types of auxiliary
2. (a) Write a short note on memory hierarchy.
CPU,
(iii) Show the connection of memory with
(ii) Draw a memory address map for the system.
(i)
(b) A l'omputer employs RAM chips of 256 x 8 and ROM chips of 1024 x 8. The computer system needs 2 K byte of RAM, 4 K byte of ROM:
o
Interpret the result in each case. J
'.J
, )
In binary using sIgn 2's complemc:: representation. Use seven bit to accommodal: each number together WIth its sign.
(ii) (-35) + (-40)
(+35) + (+40)
Perform the arithmetic operation (i)
Explain Di\IA process in detail.
Explain. ()
1
1
o
1
o 1
o
o
o
following: S s I
In
I
F=A+B
F=B
F=AtI3 F=A
c=U
sand s that generate th, 0
=
1 111
F
= A + ~.;.±,~1
F=B+J
F=A+B+l F=A+l
c
].
(b) Design the arithmetic circuit with tWI selection variables,
5. (a)
(b)
HO\\i
can you overcome it .)' interrupt dr' .. cn data transfer?
disldvantages of programmed I/O d. ta transfer ?
4. (a) Explain pr')srammed I/O transfer mode. W. ,at are the
(