NTDCTV05
TECHNICAL TRAINING MANUAL N5SS (TG-1, C) CHASSIS
COLOR TELEVISION CN27E90, CX32E70 CN32E90, CN35E15 CF35E50, CX35E60 CX35E70, CX35E81 CN35E90, CN35E95
PRINTED IN JAPAN Aug. 1995 So
Contents SECTION I OUTLINE ...................................................................... 6 1. OUTLINE OF N5SS CHASSIS (CN32E90, CN35E90) .................................................................... 7 2. PC BOARD CONFIGURATION ........................................................................................................ 7 3. MAJOR SPECIFICATIONS (NEW FUNCTIONS IN ADDITION TO THOSE OF N5SS) ........ 7 4. MODIFICATIONS ON CHASSIS ..................................................................................................... 7 5. CONSTRUCTION OF CHASSIS ...................................................................................................... 8 6. LOCATION OF CONTROLS ............................................................................................................ 9 7. CN32D90 BLOCK DIAGRAM ......................................................................................................... 13 8. [US, CANADA] SPECIFICATION FOR MODEL's 1995 ............................................................ 14
SECTION II TUNER, IF/MTS/S.PRO MODULE ......................... 16 1. CIRCUIT BLOCK ............................................................................................................................. 17 2. TUNER ................................................................................................................................................ 18 3. IF/MTS/S.PRO MODULE ................................................................................................................. 19 4. PIP TUNER ......................................................................................................................................... 23
SECTION III CHANNEL SELECTION CIRCUIT ........................ 24 1. OUTLINE OF CHANNEL SELECTION CIRCUIT SYSTEM .................................................... 25 2. OPERATION OF CHANNEL SELECTION CIRCUIT ................................................................ 25 3. MICROCOMPUTER ......................................................................................................................... 26 4. MICROCOMPUTER TERMINAL FUNCTION ........................................................................... 27 5. EEPROM (QA02) ............................................................................................................................... 29 6. ON SCREEN FUNCTION ................................................................................................................. 29 7. SYSTEM BLOCK DIAGRAM ......................................................................................................... 30 8. LOCAL KEY DETECTION METHOD .......................................................................................... 31 9. REMOTE CONTROL CODE ASSIGNMENT ............................................................................... 32 10. ENTERING TO SERVICE MODE ................................................................................................ 35 11. TEST SIGNAL SELECTION ......................................................................................................... 35 12. SERVICE ADJUSTMENT .............................................................................................................. 35 13. FAILURE DIAGNOSIS PROCEDURE ......................................................................................... 36 14. TROUBLE SHOOTING CHART .................................................................................................. 38
SECTION IV AUDIO OUTPUT CIRCUIT ..................................... 41 1. OUTLINE ............................................................................................................................................ 42 2. AUDIO OUT IC .................................................................................................................................. 43 2
SECTION V A/V SWITCHING CIRCUIT .................................... 44 1. OUTLINE ............................................................................................................................................ 45 2. IN / OUT TERMINALS ..................................................................................................................... 45 3. CIRCUIT OPERATION .................................................................................................................... 45
SECTION VI VIDEO PROCESSING CIRCUIT ............................ 47 1. OUTLINE ............................................................................................................................................ 48 2. SIGNAL FLOW .................................................................................................................................. 48 3. CIRCUIT OPERATION .................................................................................................................... 48
SECTION VII V/C/D/IC ...................................................................... 52 1. OUTLINE ............................................................................................................................................ 53 2. LARGE SCALE EMPLOYMENT OF BUS CONTROL OF PARAMETER FOR PICTURE CONTROLS ...................................................................................................................................... 53 3. EMPLOYMENT OF CONTAINING EACH VIDEO BAND FILTER INSIDE.......................... 53 4. EMPLOYMENT OF CONTAINING EACH FILTER (FOR S/H) INSIDE................................. 53 5. LOW COST OF IC ............................................................................................................................ 53
SECTION VIII PIP MODULE ............................................................. 55 SECTION IX SYNC SEPARATION, H-AFC, H-OSCILLATOR CIRCUITS .............................. 58 1. SYNC SEPARATION CIRCUIT ...................................................................................................... 59 2. H AFC (Automatic Frequency Control) CIRCUIT ......................................................................... 60 3. H OSCILLATOR CIRCUIT ............................................................................................................. 61
SECTION X VERTICAL OUTPUT CIRCUIT ............................. 63 1. OUTLINE ............................................................................................................................................ 64 2. V OUTPUT CIRCUIT ....................................................................................................................... 65
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SECTION XI HORIZONTAL DEFLECTION CIRCUIT.............. 69 1. OUTLINE ............................................................................................................................................ 70 2. HORIZONTAL DRIVE CIRCUIT ................................................................................................... 70 3. BASIC OPERATION OF HORIZONTAL DRIVE ........................................................................ 71 4. HORIZONTAL OUTPUT CIRCUIT ............................................................................................... 74 5. HIGH VOLTAGE GENERATION CIRCUIT ................................................................................. 79 6. X-RAY PROTECTION CIRCUIT ................................................................................................... 82 7. OVER CURRENT PROTECTION CIRCUIT................................................................................ 83 8. KINK CORRECTION CIRCUIT ..................................................................................................... 84
SECTION XII DEFLECTION DISTORTION CORRECTION CIRCUIT (Side DPC Circuit) .............................. 85 1. DEFLECTION DISTORTION CORRECTION IC (TA8859P) .................................................... 86 2. SIDE DPC ............................................................................................................................................ 87 3. DIODE MODULATOR CIRCUIT ................................................................................................... 88 4. ACTUAL CIRCUIT ........................................................................................................................... 89
SECTION XIII CLOSED CAPTION/EDS CIRCUIT ....................... 92 1. OUTLINE ............................................................................................................................................ 93 2. DATA TRANSMISSION FORMAT ................................................................................................ 93 3. DISPLAY FORMAT ........................................................................................................................... 94 4. CIRCUIT OPERATION .................................................................................................................... 95
SECTION XIV POWER CIRCUIT ..................................................... 98 1. OUTLINE ............................................................................................................................................ 99 2. RECTIFYING CIRCUIT AND STANDBY POWER SUPPLY ................................................... 100 3. MAIN SUPPLY CIRCUIT............................................................................................................... 100 4. OUTLINE OF CURRENT RESONANT TYPE SUPPLY ........................................................... 101 5. FUNDAMENTAL THEORY ........................................................................................................... 101 6. ACTUAL CIRCUIT ......................................................................................................................... 102 7. OTHER POWER CIRCUIT ........................................................................................................... 105 8. PROTECTOR MODULE (Z801) .................................................................................................... 106
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SECTION XV DSP CIRCUIT .......................................................... 109 1. ORIGINS OF DOLBY SURROUND ............................................................................................. 110 2. THE DOLBY MP MATRIX ............................................................................................................ 110 3. THE DOLBY SURROUND DECODER ......................................................................................... 111 4. DSP CIRCUIT ................................................................................................................................... 111 5. DSP (Digital Surround Processor) IC ............................................................................................. 114 6. SURROUND CIRCUIT ................................................................................................................... 116 7. INPUT BALANCE CIRCUIT ......................................................................................................... 116 8. MATRIX CIRCUIT ......................................................................................................................... 117 9. FILTER CIRCUIT (ANTI-ALIAS FILTER)................................................................................. 117 10. DSP CIRCUIT (DELAY) ............................................................................................................... 118 11. 7 kHz LOW PASS FILTER ........................................................................................................... 119 12. DOLBY NR CIRCUIT ................................................................................................................... 120 13. DSP FRONT ADDITION CIRCUIT ............................................................................................ 121 14. BUS CONVERTER ........................................................................................................................ 122 15. NEUTRAL BIAS ............................................................................................................................ 122 16. AUDIO OUTPUT AMPLIFIER (For Rear SP) .......................................................................... 123 17. TROUBLESHOOTING CHART ................................................................................................. 124
SECTION XVI FAILURE DIAGNOSIS PROCEDURES ............... 125 1. H STARTING CIRCUIT FAILURE DIAGNOSIS PROCEDURES........................................... 126 2. DEFLECTION CIRCUIT FAILURE DIAGNOSIS PROCEDURES ......................................... 127 3. LEFT-RIGHT PIN-CUSHION DISTORTION CORRECTION CIRCUIT .............................. 128 4. X-RAY PROTECTION CIRCUIT FAILURE DIAGNOSIS PROCEDURES ........................... 129 5. PROTECTION CIRCUIT DIAGNOSIS PROCEDURE ............................................................. 130 6. VIDEO CIRCUIT DIAGNOSIS PROCEDURES ......................................................................... 131
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SECTION I OUTLINE
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3. MAJOR SPECIFICATIONS (NEW FUNCTIONS IN ADDITION TO THOSE OF N5SS)
1. OUTLINE OF N5SS CHASSIS (CN32E90, CN35E90) The N5SS chassis is a complete bus control type chassis where the deflection circuit is controlled by a newly developed I2C-bus line control system.
(1) EOS (Extended-Data-Service) (2) Center-Ch-Audio-Input provided
2. PC BOARD CONFIGURATION
4. MODIFICATIONS ON CHASSIS (1) Serviceability improved with direct, front access system employed. (2) One touch cabinet securing (CN32E90) to the chassis. (3) Improved serviceability with the bus control system employed for the defection circuits. (4) Improved serviceability with the white balance bus control system employed. (5) Digital comb/CCD miniaturized into a socketable size.
(1) (2) (3) (4)
Signal unit Power/def unit A/V, CRT-D, SP-TERM CCD, comb (CN32E90) Digital comb (CN35E90) (5) D.S.P unit (6) C.C, EDS/R.G.B SW
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5. CONSTRUCTION OF CHASSIS DPC circuit
CCD circuit PIP circuit SIGNAL circuit
EDS, RGB SW circuit
IF/MTS/A-PRO module AUDIO OUT
CRT circuit
REAR AMP circuit
CONVERTER trans
Fig. 1-1
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A/V circuit RF SW
POWER/DEF circuit
V. OUT DPC circuit H.OUT
H.OUT trans
6. LOCATION OF CONTROLS 6-1. TV Set For specific use of each control, consult the corresponding page numbers in brackets.
Front View
POWER indicator
POWER
POWER button Remote sensor
Press to open the door
Behind the door
VIDEO/AUDIO IN jacks
