13__practice_problems__ch_7__registers (1).docx

Question 1: S_ring_Shifter is a shift register in which; the serial output is connected to the serial input if the serial output is 0, and the serial output is first complemented and then connected to the serial input if it is 1. (i) (ii)

Give FF (Flip Flop) level design of the above circuit. Do it for 4-bits. List the sequence of states of 4 bit ring shifter starting from an initial state 0101 till the register get replaced by new values.

Question 2: A_ Shifter is a shift register in which; if Serial Input is 1, it shifts odd numbered cells’ (data) towards right and if Serial Input is 0 it shifts even numbered cells’ (data) towards right. (i) (ii)

Give FF (Flip Flop) level design of the above circuit. Do it for 8-bits. List the sequence of states of 8 bit A_shifter starting from an initial state 00101111 till 3 iterations with serial inputs 1 , 0 , 1 in the same given order.

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