Tomorrows High-quality Socs Require High-quality Embedded Memories Today
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Plenary Speech 2P.4 Tomorrows
High-quality
SoCs Require
High-quality
Embedded
Memories
Today Wednesday, March 20 11:10am-ll:S0am
Ulf Schlichtmann Senior Director, Infineon
Technologies
AG
Embedded memories increasingly dominate SoC designs -whether chip area, performance, power consumption, manufacturing yield or design time are considered. ITRS data indicate that the embedded memory contents of ICs may increase from 20% in 1999 to 90% at the SOnm node by the end of the decade. Therefore, even more than today, the success of tomorrow's SoC design will depend on the availability of high-quality embedded memories. Advanced process technologies pose new challenges for meeting these quality criteria. Some of the challenges are: providing flexible redundancy solutions for embedded SRAMs; designing competitive memories despite ever increasing leakage currents; reducing SRAM susceptibility to soft-error rate (SER). These challenges are bringing about the need for significant innovations in design of embedded memories, much more so than in recent previous process generations. In the presentation, the challenges will be outlined and solutions will be proposed. The focus of the discussion will be on SRAM/ROM, but other technologies such as eDRAM and "IT SRAM" will also be addressed.
About Ulf Schlichtmann As Senior Director for Cells and Memories of Infineon Technologies AG, Ulf Schlichtmann is responsible for all design libraries, from definition through development to silicon verification, rampup and support. In this role, he is charged with ensuring that innovative high-quality design libraries enable product designers to easily utilize the features of today's advanced process technologies. Previously, he directed a major improvement project to increase development productivity through increased reuse. Before that, he held various technical and management positions related to design libraries, design automation and reuse programs. Dr. Schlichtmann holds a Dipl.-Ing. degree in Electrical Engineering and a Ph.D. degree in Design Automation from the Technical University of Munich. He also holds a business degree from University of Hagen. Dr. Schlichtmann has published over 25 technical articles.
225
Proceedings of the International Symposium on Quality Electronic Design (ISQED’02) 0-7695-1561-4/02 $17.00 © 2002 IEEE
Authorized licensed use limited to: University of Central Florida. Downloaded on October 26, 2008 at 00:04 from IEEE Xplore. Restrictions apply.
High-quality
SoCs Require
High-quality
Embedded
Memories
Today Wednesday, March 20 11:10am-ll:S0am
Ulf Schlichtmann Senior Director, Infineon
Technologies
AG
Embedded memories increasingly dominate SoC designs -whether chip area, performance, power consumption, manufacturing yield or design time are considered. ITRS data indicate that the embedded memory contents of ICs may increase from 20% in 1999 to 90% at the SOnm node by the end of the decade. Therefore, even more than today, the success of tomorrow's SoC design will depend on the availability of high-quality embedded memories. Advanced process technologies pose new challenges for meeting these quality criteria. Some of the challenges are: providing flexible redundancy solutions for embedded SRAMs; designing competitive memories despite ever increasing leakage currents; reducing SRAM susceptibility to soft-error rate (SER). These challenges are bringing about the need for significant innovations in design of embedded memories, much more so than in recent previous process generations. In the presentation, the challenges will be outlined and solutions will be proposed. The focus of the discussion will be on SRAM/ROM, but other technologies such as eDRAM and "IT SRAM" will also be addressed.
About Ulf Schlichtmann As Senior Director for Cells and Memories of Infineon Technologies AG, Ulf Schlichtmann is responsible for all design libraries, from definition through development to silicon verification, rampup and support. In this role, he is charged with ensuring that innovative high-quality design libraries enable product designers to easily utilize the features of today's advanced process technologies. Previously, he directed a major improvement project to increase development productivity through increased reuse. Before that, he held various technical and management positions related to design libraries, design automation and reuse programs. Dr. Schlichtmann holds a Dipl.-Ing. degree in Electrical Engineering and a Ph.D. degree in Design Automation from the Technical University of Munich. He also holds a business degree from University of Hagen. Dr. Schlichtmann has published over 25 technical articles.
225
Proceedings of the International Symposium on Quality Electronic Design (ISQED’02) 0-7695-1561-4/02 $17.00 © 2002 IEEE
Authorized licensed use limited to: University of Central Florida. Downloaded on October 26, 2008 at 00:04 from IEEE Xplore. Restrictions apply.
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