Tl084cn Amplificador Operacional
This document was uploaded by user and they confirmed that they have the permission to share it. If you are author or own the copyright of this book, please report to us by using this DMCA report form. Report DMCA
Overview
Download & View Tl084cn Amplificador Operacional as PDF for free.
More details
- Words: 7,064
- Pages: 31
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
D Low Power Consumption D Wide Common-Mode and Differential
D D D D
Voltage Ranges
D Low Input Bias and Offset Currents D Output Short-Circuit Protection D Low Total Harmonic
High Input Impedance . . . JFET-Input Stage Latch-Up-Free Operation High Slew Rate . . . 13 V/µs Typ Common-Mode Input Voltage Range Includes VCC+
Distortion . . . 0.003% Typ
description/ordering information The TL08x JFET-input operational amplifier family is designed to offer a wider selection than any previously developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset-voltage temperature coefficient. Offset adjustment and external compensation options are available within the TL08x family. The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from −40°C to 85°C. The Q-suffix devices are characterized for operation from −40°C to 125°C. The M-suffix devices are characterized for operation over the full military temperature range of −55°C to 125°C. ORDERING INFORMATION TJ
VIOmax AT 255C PDIP (P) PDIP (N)
SOIC (D) 0°C to 70°C
ORDERABLE PART NUMBER
PACKAGE†
15 mV SOP (PS) SOP (NS)
TSSOP (PW)
TOP-SIDE MARKING
Tube of 50
TL081CP
TL081CP
Tube of 50
TL082CP
TL082CP
Tube of 25
TL084CN
TL084CN
Tube of 75
TL081CD
Reel of 2500
TL081CDR
Tube of 75
TL082CD
Reel of 2500
TL082CDR
Tube of 50
TL084CD
Reel of 2500
TL084CDR
Reel of 2000
TL081CPSR
T081
Reel of 2000
TL082CPSR
T082
Reel of 2000
TL084CNSR
TL084
Tube of 150
TL082CPW
Reel of 2000
TL082CPWR
Tube of 90
TL084CPW
Reel of 2000
TL084CPWR
TL081C TL082C TL084C
T082 T084
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2004, Texas Instruments Incorporated
! " #$ %! " &$'(# ! ) !%* )$#!" # ! "&%## ! " &% !+% !% " %, " "! $ %!" "! ) ) - !.* )$#! & #%""/ ) %" ! %#%"" (. #($)% !%"!/ (( & %!% "*
& )$#!" # &( ! ! 0101 (( & %!% " % !%"!%) $(%"" !+% -"% !%)* (( !+% & )$#!" & )$#! & #%""/ ) %" ! %#%"" (. #($)% !%"!/ (( & %!% "*
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
description/ordering information (continued) ORDERING INFORMATION TJ
VIOmax AT 255C
PACKAGE†
TL081ACP
TL081ACP
Tube of 50
TL082ACP
TL082ACP
Tube of 25
TL084ACN
TL084ACN
Tube of 75
TL081ACD
Reel of 2500
TL081ACDR
Tube of 75
TL082ACD
Reel of 2500
TL082ACDR
Tube of 50
TL084ACD
Reel of 2500
TL084ACDR
SOP (PS)
Reel of 2000
TL082ACPSR
T082A
SOP (NS)
Reel of 2000
TL084ACNSR
TL084A
Tube of 50
TL081BCP
TL081BCP
Tube of 50
TL082BCP
TL082BCP
Tube of 25
TL084BCN
TL084BCN
Tube of 75
TL081BCD
Reel of 2500
TL081BCDR
Tube of 75
TL082BCD
Reel of 2500
TL082BCDR
Tube of 50
TL084BCD
Reel of 2500
TL084BCDR
Tube of 50
TL081IP
TL081IP
Tube of 50
TL082IP
TL082IP
Tube of 25
TL084IN
TL081IN
Tube of 75
TL081ID
Reel of 2500
TL081IDR
Tube of 75
TL082ID
Reel of 2500
TL082IDR
Tube of 50
TL084ID
Reel of 2500
TL084IDR
Reel of 2000
TL082IPWR
Tube of 50
TL084QD
Reel of 2500
TL084QDR
CDIP (J)
Tube of 25
TL084MJ
TL084MJ
LCCC (FK)
Reel of 55
TL084FK
TL084FK
CDIP (JG)
Tube of 50
TL082MJG
TL082MJG
PDIP (N)
0°C to 70°C
SOIC (D)
PDIP (P) PDIP (N)
3 mV SOIC (D)
PDIP (P) PDIP (N)
−40°C to 85°C
6 mV SOIC (D)
TSSOP (PW) −40°C to 125°C
9 mV 9 mV
−55°C to 125°C 6 mV
TOP-SIDE MARKING
Tube of 50 PDIP (P)
6 mV
ORDERABLE PART NUMBER
SOIC (D)
081AC 082AC TL084AC
081BC 082BC TL084BC
TL081I TL082I TL084I Z082 TL084QD
LCCC (FK) Tube of 55 TL082MFK TL082MFK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TL081, TL081A, TL081B D, P, OR PS PACKAGE (TOP VIEW)
OFFSET N1 IN − IN + VCC −
1
8
2
7
3
6
4
5
TL084, TL084A, TL084B D, J, N, NS, OR PW PACKAGE (TOP VIEW)
TL082, TL082A, TL082B D, JG, P, PS, OR PW PACKAGE (TOP VIEW)
NC VCC + OUT OFFSET N2
1OUT 1IN − 1IN + VCC −
1
8
2
7
3
6
4
5
VCC + 2OUT 2IN − 2IN +
1OUT 1IN − 1IN + VCC + 2IN + 2IN − 2OUT
NC − No internal connection
14
2
13
3
12
4
11
5
10
6
9
7
8
4OUT 4IN − 4IN + VCC − 3IN + 3IN − 3OUT
TL084M . . . FK PACKAGE (TOP VIEW)
1IN − 1OUT NC 4OUT 4IN −
NC 1OUT NC VCC+ NC
TL082M . . . FK PACKAGE (TOP VIEW)
4
3 2 1 20 19 18
5
17
6
16
7
15
8
14 9 10 11 12 13
NC 2OUT NC 2IN − NC
1IN + NC VCC + NC 2IN +
4
3 2 1 20 19 18
5
17
6
16
7
15
8
14 9 10 11 12 13
4IN + NC VCC − NC 3IN +
2IN − 2OUT NC 3OUT 3IN −
NC VCC − NC 2IN + NC
NC 1IN − NC 1IN + NC
1
NC − No internal connection
NC − No internal connection
symbols TL081
TL082 (EACH AMPLIFIER) TL084 (EACH AMPLIFIER)
OFFSET N1 IN +
+
IN −
−
OUT
IN +
+
IN −
−
OUT
OFFSET N2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
schematic (each amplifier) VCC +
IN + 64 Ω
IN −
OUT 128 Ω 64 Ω C1
1080 Ω
1080 Ω VCC −
OFFSET N2
OFFSET N1
TL081 Only Component values shown are nominal.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† TL08_C TL08_AC TL08_BC
TL08_I
TL084Q
TL08_M
UNIT
Supply voltage, VCC + (see Note 1)
18
18
18
18
V
Supply voltage VCC − (see Note 1)
−18
−18
−18
−18
V
Differential input voltage, VID (see Note 2)
± 30
± 30
± 30
± 30
V V
± 15
± 15
± 15
± 15
Unlimited
Unlimited
Unlimited
Unlimited
0 to 70
− 40 to 85
D package (8-pin)
97
97
D package (14-pin)
86
86
N package (14-pin)
76
76
NS package (14-pin)
80
P package (8-pin)
85
85
PS package (8-pin)
95
95
PW package (8-pin)
149
Input voltage, VI (see Notes 1 and 3) Duration of output short circuit (see Note 4) Continuous total power dissipation
See Dissipation Rating Table
Operating free-air temperature range, TA
Package thermal impedance, θJA (see Notes 5 and 6)
PW package (14-pin) Operating virtual junction temperature
113
113
150
150
− 40 to 125
− 55 to 125
°C
°C/W
150
150
°C
Case temperature for 60 seconds, TC
FK package
260
°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds
J or JG package
300
°C
Storage temperature range, Tstg − 65 to 150 − 65 to 150 − 65 to 150 − 65 to 150 °C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC + and VCC − . 2. Differential voltages are at IN+ with respect to IN −. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. 4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. 5. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 6. The package thermal impedance is calculated in accordance with JESD 51-7. DISSIPATION RATING TABLE PACKAGE
TA ≤ 25°C POWER RATING
D (14 pin)
680 mW
FK J JG
DERATING FACTOR
DERATE ABOVE TA
TA = 70°C POWER RATING
TA = 85°C POWER RATING
TA = 125°C POWER RATING
7.6 mW/°C
60°C
604 mW
490 mW
186 mW
680 mW
11.0 mW/°C
88°C
680 mW
680 mW
273 mW
680 mW
11.0 mW/° C
88°C
680 mW
680 mW
273 mW
680 mW
8.4 mW/°C
69°C
672 mW
546 mW
210 mW
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
6 VO = 0
VO = 0 VO = 0
Temperature coefficient of input offset voltage
Input offset current ‡
Input bias current ‡
α VIO
IIO
IIB
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
25°C
Common-mode rejection ratio
CMRR
VO = 0,
No load
VCC = ± 15 V to ± 9 V, VO = 0, RS = 50 Ω
VIC = VICRmin, RS = 50 Ω VO = 0,
25°C
25°C
Full range
25°C
Full range
± 12
70
70
15
25
± 10
2
1.4
86
86
80
75
1.4
86
86
3
200
± 12
± 13.5
1012
25
50
± 10
± 12
± 12
± 11
−12 to 15
30
5
18
3
TYP
3
2.8
10
400
MIN
1012
200
± 12
± 13.5
± 11
± 12
−12 to 15
30
200
20
15
MAX
TL081AC TL082AC TL084AC
2.8
7
200
2
100
7.5
6
MAX
80
75
25
50
± 10
± 12
± 12
± 11
MIN
1.4
86
86
1012
3
200
± 12
± 13.5
−12 to 15
30
5
18
2
TYP
TLO81BC TL082BC TL084BC
2.8
7
200
2
100
5
3
MAX
80
75
25
50
± 10
± 12
± 12
± 11
MIN
1.4
86
86
1012
3
200
± 12
± 13.5
−12 to 15
30
5
18
3
TYP
TL081I TL082I TL084I
2.8
20
200
10
100
9
6
MAX
mA
dB
dB
Ω
MHz
V/mV
V
V
nA
pA
nA
pA
µV/°C
mV
UNIT
VO1/ VO2 Crosstalk attenuation AVD = 100 25°C 120 120 120 120 dB † All characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. Full range for TA is 0°C to 70°C for TL08_C, TL08_AC, TL08_BC and − 40°C to 85°C for TL08_I. ‡ Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 17. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.
ICC
Supply-voltage rejection ratio (∆ VCC± /∆ VIO) Supply current (per amplifier)
25°C
Input resistance
ri
kSVR
25°C
Unity-gain bandwidth
B1
VO = ± 10 V,
VO = ± 10 V, RL ≥ 2 kΩ
Large-signal differential voltage amplification
AVD
RL ≥ 2 kΩ
RL ≥ 10 kΩ
VOM
25°C
Maximum peak output voltage swing
25°C
Full range
25°C
Full range
5
25°C
3
TYP
18
MIN
TL081C TL082C TL084C
Full range
Full range
Common-mode input voltage range
RL ≥ 2 kΩ
RS = 50 Ω
RS = 50 Ω
25°C
VICR RL = 10 kΩ
VO = 0
Input offset voltage
TEST CONDITIONS
VIO
PARAMETER
TA†
electrical characteristics, VCC± = ±15 V (unless otherwise noted)
222 2 2 2 2 32 2 SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
electrical characteristics, VCC ± = ± 15 V (unless otherwise noted) PARAMETER
TEST CONDITIONS†
TA
TL081M, TL082M
TL084Q, TL084M
MIN
MIN
25°C
TYP
MAX
3
6
VIO
Input offset voltage
VO = 0,
RS = 50 Ω
Full range
αVIO
Temperature coefficient of input offset voltage
VO = 0
RS = 50 Ω
Full range
18
Input offset current‡
25°C
5
IIO
VO = 0
125°C
IIB
Input bias current‡
VO = 0
125°C
VICR
Common-mode input voltage range
VOM
Maximum peak output voltage swing
AVD B1 ri CMRR
kSVR ICC
Large-signal differential voltage amplification
RL ≥ 10 kΩ
100
5
200
30
50 ± 11
− 12 to 15
± 11
− 12 to 15
25°C
± 12
± 13.5
± 12
± 13.5
± 12
± 10
± 12
200
25
200
25°C
25
VO = ± 10 V,
RL ≥ 2 kΩ
Full range
15
100
pA
20
nA
200
pA
50
nA V
V
± 12
RL ≥ 2 kΩ
mV
µV/°C
± 12
± 10
VO = ± 10 V,
UNIT
9
18
20 30
MAX 15
25°C
Full range
RL ≥ 2 kΩ
3
9
25°C
RL = 10 kΩ
TYP
V/mV
Unity-gain bandwidth
25°C
Input resistance
25°C
15 3 1012
3 1012
MHz Ω
Common-mode rejection ratio
VIC = VICRmin, VO = 0, RS = 50 Ω
25°C
80
86
80
86
dB
Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current (per amplifier)
VCC = ± 15 V to ± 9 V, VO = 0, RS = 50 Ω
25°C
80
86
80
86
dB
VO = 0,
25°C
No load
1.4
2.8
1.4
2.8
mA
VO1/ VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB † All characteristics are measured under open-loop conditions, with zero common-mode input voltage, unless otherwise specified. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 17. Pulse techniques must be used that maintain the junction temperatures as close to the ambient temperature as possible.
operating characteristics, VCC± = ± 15 V, TA = 25°C (unless otherwise noted) PARAMETER
TEST CONDITIONS VI = 10 V,
RL = 2 kΩ,
CL = 100 pF,
VI = 10 V, TA = − 55 55°C C to 125 125°C, C,
RL = 2 kΩ, See Figure 1
CL = 100 pF,
Overshoot factor
VI = 20 mV,
RL = 2 kΩ,
CL = 100 pF,
Vn
Equivalent input noise voltage
RS = 20 Ω
In
Equivalent input noise current
RS = 20 Ω,
f = 1 kHz
THD
Total harmonic distortion
VIrms = 6 V, f = 1 kHz
AVD = 1,
SR
Slew rate at unity gain
tr
Rise time
See Figure 1
TYP
8∗
13
See Figure 1
f = 10 Hz to 10 kHz
RL ≥ 2 kΩ,
MAX
UNIT V/µs
5∗
f = 1 kHz
RS ≤ 1 kΩ,
MIN
0.05
µs
20
%
18
nV/√Hz
4
µV
0.01
pA/√Hz
0.003
%
∗On products compliant to MIL-PRF-38535, this parameter is not production tested.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
operating characteristics, VCC± = ± 15 V, TA = 25°C PARAMETER
TEST CONDITIONS
SR
Slew rate at unity gain
tr
Rise time
VI = 10 V,
RL = 2 kΩ,
Overshoot factor
VI = 20 mV,
RL = 2 kΩ,
Vn
Equivalent input noise voltage
RS = 20 Ω
In
Equivalent input noise current
RS = 20 Ω,
f = 1 kHz
THD
Total harmonic distortion
VIrms = 6 V, f = 1 kHz
AVD = 1,
MIN
CL = 100 pF, CL = 100 pF,
See Figure 1
8
See Figure 1
f = 1 kHz f = 10 Hz to 10 kHz
TYP
MAX
UNIT V/ µs
13 0.05
µs
20
%
18
nV/√Hz µV
4
RS ≤ 1 kΩ,
RL ≥ 2 kΩ,
0.01
pA/√Hz
0.003
%
PARAMETER MEASUREMENT INFORMATION
10 kΩ − 1 kΩ −
OUT VI
+
VI
OUT CL = 100 pF
RL = 2 kΩ
+ CL = 100 pF
RL
Figure 1
Figure 2
100 kΩ TL081
−
IN −
C2
OUT +
IN +
C1 500 pF
N2 N1
−
IN −
100 kΩ
N1 OUT
+
1.5 kΩ VCC −
Figure 3
8
Figure 4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS Table of Graphs FIGURE
VOM
AVD
Maximum peak output voltage
vs Frequency vs Free-air temperature vs Load resistance vs Supply voltage
5, 6, 7 8 9 10
Large-signal differential voltage amplification
vs Free-air temperature vs Frequency
11 12
Differential voltage amplification
vs Frequency with feed-forward compensation
13
PD
Total power dissipation
vs Free-air temperature
14
ICC
Supply current
vs Free-air temperature vs Supply voltage
15 16
IIB
Input bias current
vs Free-air temperature
17
Large-signal pulse response
vs Time
18
VO CMRR
Output voltage
vs Elapsed time
19
Common-mode rejection ratio
vs Free-air temperature
20
Vn THD
Equivalent input noise voltage
vs Frequency
21
Total harmonic distortion
vs Frequency
22
MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY
MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY ± 15
VCC ± = ± 15 V
RL = 10 kΩ TA = 25°C See Figure 2
± 12.5
± 10
VCC ± = ± 10 V
± 7.5
±5
VCC ± = ± 5 V
± 2.5
0 100
VOM − Maximum Peak Output Voltage − V
VOM − Maximum Peak Output Voltage − V
± 15
RL = 2 kΩ TA = 25°C See Figure 2
VCC ± = ± 15 V
± 12.5 ± 10
VCC ± = ± 10 V ± 7.5 ±5 VCC ± = ± 5 V ± 2.5
0 1k
10 k
100 k
1M
10 M
100
f − Frequency − Hz
1k
10 k
100 k
1M
10 M
f − Frequency − Hz
Figure 5
Figure 6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS† MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY
MAXIMUM PEAK OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
± 12.5
TA = 25°C
± 10 TA = − 55°C ± 7.5
±5
TA = 125°C
± 2.5
0 10 k
ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ
± 15 VCC ± = ± 15 V RL = 2 kΩ See Figure 2
VOM − Maximum Peak Output Voltage − V
VOM − Maximum Peak Output Voltage − V
± 15
40 k 100 k
400 k
1M
4M
RL = 10 kW
± 12.5
RL = 2 kW
± 10
± 7.5
±5
± 2.5
VCC ± = ± 15 V See Figure 2
0 − 75 − 50
10 M
− 25
Figure 7
75
100
± 10
± 7.5
±5
± 2.5
RL = 10 kΩ TA = 25°C
± 12.5
± 10
± 7.5
±5
± 2.5
0 0.2
0.4
0.7
1
2
4
7
10
0
2
4
6
8
10
12
14
| VCC ± | − Supply Voltage − V
RL − Load Resistance − kΩ
Figure 10
Figure 9
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
10
125
± 15 VCC ± = ± 15 V TA = 25°C See Figure 2
VOM − Maximum Peak Output Voltage − V
VOM − Maximum Peak Output Voltage − V
50
MAXIMUM PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE
± 15
0 0.1
25
Figure 8
MAXIMUM PEAK OUTPUT VOLTAGE vs LOAD RESISTANCE
± 12.5
0
TA − Free-Air Temperature − °C
f − Frequency − Hz
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
16
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS† LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE 1000 700 AVD − Large-Signal Differential Voltage Amplification − V/mV
400 200 100 70 40 20 10 7 4
VCC ± = ± 15 V VO = ± 10 V RL = 2 kΩ
2 1 −75
−50
−25
0
25
50
75
100
125
TA − Free-Air Temperature − °C
Figure 11 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREQUENCY 106 VCC ± = ± 5 V to ± 15 V RL = 10 kΩ TA = 25°C
104
Differential Voltage Amplification (left scale)
103
102
0°
45 °
Phase Shift
AVD − Large-Signal Differential Voltage Amplification − V/mV
105
90 ° Phase Shift (right scale)
101
135 °
1 1
10
100
1k
10 k
100 k
1M
180 ° 10 M
f − Frequency − Hz
Figure 12 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS† DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREQUENCY WITH FEED-FORWARD COMPENSATION
TOTAL POWER DISSIPATION vs FREE-AIR TEMPERATURE 250
VCC ± = ± 15 V C2 = 3 pF TA = 25°C See Figure 3
105
104
103
102
10
VCC ± = ± 15 V No Signal No Load
225 PD − Total Power Dissipation − mW
AVD − Differential Voltage Amplification − V/mV
106
200 175
TL084, TL085
150 125 100
TL082, TL083
75 TL081
50 25
1 100
1k
10 k
100 k
1M
0 −75
10 M
−50
−25
f − Frequency With Feed-Forward Compensation − Hz
SUPPLY CURRENT PER AMPLIFIER vs FREE-AIR TEMPERATURE
50
75
100
125
SUPPLY CURRENT vs SUPPLY VOLTAGE
2.0
2.0 VCC ± = ± 15 V No Signal No Load
1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2
TA = 25°C No Signal No Load
1.8 I CC ± − Supply Current − mA
I CC ± − Supply Current − mA
25
Figure 14
Figure 13
0 −75
0
TA − Free-Air Temperature − °C
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2
−50
−25
0
25
50
75
100
125
0 0
2
TA − Free-Air Temperature − °C
4
6
8
10
12
14
| VCC ± | − Supply Voltage − V
Figure 16
Figure 15
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
16
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS† INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE
VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 6
100
VCC ± = ± 15 V RL = 2 k Ω CL = 100 pF TA = 25°C
Input and Output Voltages − V
I IB − Input Bias Current − nA
V CC ± = ± 15 V
10
1
0.1
4 Output 2
0
−2 Input −4
0.01 − 50
−6 − 25
0
25
50
75
100
125
0
0.5
TA − Free-Air Temperature − °C
CMRR − Common-Mode Rejection Ratio − dB
89
VO − Output Voltage − mV
24 20 VCC ± = ± 15 V RL = 2 k Ω CL = 100 pF TA = 25°C See Figure 1
4 0 −4 0
0.2
0.4
2.5
3
3.5
COMMON-MODE REJECTION RATIO vs FREE-AIR TEMPERATURE
28
8
2
Figure 18
OUTPUT VOLTAGE vs ELAPSED TIME
12
1.5
t − Time − µ s
Figure 17
16
1
0.6
0.8
1.0
1.2
VCC ± = ± 15 V RL = 10 kΩ
88
87
86
85
84
83 − 75
− 50
t − Elapsed Time − µ s
− 25
0
25
50
75
100
125
TA − Free-Air Temperature − °C
Figure 20
Figure 19
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS† EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY
TOTAL HARMONIC DISTORTION vs FREQUENCY 1
VCC ± = ± 15 V AVD = 10 RS = 20 Ω TA = 25°C
40
30
20
10
0.1 0.04
0.01 0.004
0.001
0 40
10
100
400 1 k
4 k 10 k
VCC ± = ± 15 V AVD = 1 VI(RMS) = 6 V TA = 25°C
0.4 THD − Total Harmonic Distortion − %
Vn − Equilvalent Input Noise Voltage − nV/ Hz
50
40 k 100 k
10
400
1k
4k
10 k
40 k 100 k
f − Frequency − Hz
f − Frequency − Hz
Figure 22
Figure 21
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
APPLICATION INFORMATION RF = 100 kΩ VCC + − Output
− TL081 +
CF = 3.3 µF
Input
R1
R2
C3
TL081 +
15 V 3.3 kΩ
Output VCC −
1 kΩ −15 V
R1 = R2 = 2(R3) = 1.5 MΩ
R3 3.3 kΩ f=
C1 9.1 kΩ
1 2π RF CF
Figure 23
14
C2
C1 = C2 = C3 = 110 pF 2 1 fo = = 1 kHz 2π R1 C1
Figure 24
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
APPLICATION INFORMATION VCC + 1 MΩ
− TL084
VCC +
Output A
+
+ 1 µF
TL084
VCC +
−
Input
− TL084 100 kΩ 100 kΩ 100 µF
Output B
+
100 kΩ
VCC + VCC +
100 kΩ
− TL084
Output C
+
Figure 25. Audio-Distribution Amplifier 6 sin ωt
1N4148 − 15 V
18 pF 18 pF
1 kΩ
18 kΩ (see Note A)
VCC +
1/2 TL082
+
88.4 kΩ
VCC+ −
−
88.4 kΩ
1/2 TL082 VCC −
6 cos ωt
+
18 pF
VCC −
1 kΩ 15 V
1N4148 88.4 kΩ
18 kΩ (see Note A)
NOTE A: These resistor values may be adjusted for a symmetrical output.
Figure 26. 100-KHz Quadrature Oscillator
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
15
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
APPLICATION INFORMATION 16 kΩ
16 kΩ 220 pF
220 pF
VCC + 43 kΩ
43 kΩ
1/4 TL084
VCC + VCC + 43 kΩ
1/4 TL084
1/4 TL084
+
+
+
1.5 kΩ
+
−
1/4 TL084
220 pF
VCC + −
Input
220 pF
30 kΩ
−
43 kΩ
43 kΩ
30 kΩ
1.5 kΩ
VCC −
−
43 kΩ
VCC −
VCC −
VCC −
Output A Output A
Output B
2 kHz/div Second-Order Bandpass Filter fo = 100 kHz, Q = 30, GAIN = 4
2 kHz/div Cascaded Bandpass Filter fo = 100 kHz, Q = 69, GAIN = 16
Figure 27. Positive-Feedback Bandpass Filter
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
Output B
PACKAGE OPTION ADDENDUM www.ti.com
18-Feb-2005
PACKAGING INFORMATION Orderable Device
Status (1)
Package Type
Package Drawing
Pins Package Eco Plan (2) Qty
5962-9851501Q2A
ACTIVE
LCCC
FK
20
1
None
5962-9851501QPA
ACTIVE
CDIP
JG
8
1
None
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE Level-NC-NC-NC A42 SNPB
Level-NC-NC-NC
5962-9851503Q2A
ACTIVE
LCCC
FK
20
1
None
5962-9851503QCA
ACTIVE
CDIP
J
14
1
None
A42 SNPB
TL081ACD
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081ACDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081ACJG
OBSOLETE
CDIP
JG
8
None
Call TI
TL081ACP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL081BCD
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081BCDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081BCP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL081CD
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081CDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081CP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL081CPSR
ACTIVE
SO
PS
8
2000
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081CPWLE
OBSOLETE
TSSOP
PW
8
None
Call TI
TL081ID
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081IDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081IP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL081MFKB
OBSOLETE
LCCC
FK
20
None
Call TI
Call TI
TL081MJG
OBSOLETE
CDIP
JG
8
None
Call TI
Call TI
TL081MJGB
OBSOLETE
CDIP
JG
8
None
Call TI
Call TI
TL082ACD
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082ACDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082ACP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL082ACPSR
ACTIVE
SO
PS
8
2000
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL082BCD
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082BCDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082BCP
ACTIVE
PDIP
P
8
50
Pb-Free
CU NIPDAU
Level-NC-NC-NC
Addendum-Page 1
POST-PLATE Level-NC-NC-NC Level-NC-NC-NC
Call TI
Call TI
PACKAGE OPTION ADDENDUM www.ti.com
18-Feb-2005
Orderable Device
Status (1)
Package Type
Package Drawing
Pins Package Eco Plan (2) Qty
TL082CD
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082CDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082CJG
OBSOLETE
CDIP
JG
8
None
Call TI
TL082CP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL082CPSR
ACTIVE
SO
PS
8
2000
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL082CPW
ACTIVE
TSSOP
PW
8
150
Pb-Free (RoHS)
CU NIPDAU
Level-1-250C-UNLIM
TL082CPWLE
OBSOLETE
TSSOP
PW
8
None
Call TI
TL082CPWR
ACTIVE
TSSOP
PW
8
2000
Pb-Free (RoHS)
CU NIPDAU
Level-1-250C-UNLIM
TL082ID
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082IDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082IJG
OBSOLETE
CDIP
JG
8
None
Call TI
TL082IP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL082IPWR
ACTIVE
TSSOP
PW
8
2000
Pb-Free (RoHS)
CU NIPDAU
Level-1-250C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(RoHS)
TL082MFK
OBSOLETE
LCCC
FK
20
TL082MFKB
ACTIVE
LCCC
FK
20
1
None None
Call TI
Call TI
Call TI
Call TI
Call TI
POST-PLATE Level-NC-NC-NC
TL082MJG
ACTIVE
CDIP
JG
8
1
None
A42 SNPB
Level-NC-NC-NC
TL082MJGB
ACTIVE
CDIP
JG
8
1
None
A42 SNPB
Level-NC-NC-NC
TL084ACD
ACTIVE
SOIC
D
14
50
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084ACDR
ACTIVE
SOIC
D
14
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084ACN
ACTIVE
PDIP
N
14
25
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL084ACNSR
ACTIVE
SO
NS
14
2000
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL084BCD
ACTIVE
SOIC
D
14
50
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084BCDR
ACTIVE
SOIC
D
14
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084BCN
ACTIVE
PDIP
N
14
25
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL084CD
ACTIVE
SOIC
D
14
50
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084CDR
ACTIVE
SOIC
D
14
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084CJ
OBSOLETE
CDIP
J
14
None
Call TI
TL084CN
ACTIVE
PDIP
N
14
Pb-Free (RoHS)
CU NIPDAU
TL084CNSLE
OBSOLETE
SO
NS
14
None
Call TI
25
Addendum-Page 2
Call TI Level-NC-NC-NC Call TI
PACKAGE OPTION ADDENDUM www.ti.com
18-Feb-2005
Orderable Device
Status (1)
Package Type
Package Drawing
Pins Package Eco Plan (2) Qty
Lead/Ball Finish
MSL Peak Temp (3)
TL084CNSR
ACTIVE
SO
NS
14
2000
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL084CPW
ACTIVE
TSSOP
PW
14
90
Pb-Free (RoHS)
CU NIPDAU
Level-1-250C-UNLIM
TL084CPWLE
OBSOLETE
TSSOP
PW
14
TL084CPWR
ACTIVE
TSSOP
PW
None
Call TI
14
2000
Pb-Free (RoHS)
CU NIPDAU
Level-1-250C-UNLIM
TL084ID
ACTIVE
SOIC
D
14
50
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084IDR
ACTIVE
SOIC
D
14
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084IJ
OBSOLETE
CDIP
J
14
None
Call TI
TL084IN
ACTIVE
PDIP
N
14
25
Pb-Free (RoHS)
CU NIPDAU
Call TI
Call TI Level-NC-NC-NC
TL084MFK
ACTIVE
LCCC
FK
20
1
None
POST-PLATE Level-NC-NC-NC
TL084MFKB
ACTIVE
LCCC
FK
20
1
None
POST-PLATE Level-NC-NC-NC
TL084MJ
ACTIVE
CDIP
J
14
1
None
A42 SNPB
Level-NC-NC-NC
TL084MJB
ACTIVE
CDIP
J
14
1
None
A42 SNPB
Level-NC-NC-NC
TL084QD
ACTIVE
SOIC
D
14
50
None
CU NIPDAU
Level-1-220C-UNLIM
TL084QDR
ACTIVE
SOIC
D
14
2500
None
CU NIPDAU
Level-1-220C-UNLIM
(1)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8
5
0.280 (7,11) 0.245 (6,22)
1
0.063 (1,60) 0.015 (0,38)
4 0.065 (1,65) 0.045 (1,14)
0.310 (7,87) 0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN
0.023 (0,58) 0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36) 0.008 (0,20)
4040107/C 08/96 NOTES: A. B. C. D. E.
All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF TERMINALS **
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342 (8,69)
0.358 (9,09)
0.307 (7,80)
0.358 (9,09)
28
0.442 (11,23)
0.458 (11,63)
0.406 (10,31)
0.458 (11,63)
21
9
22
8
44
0.640 (16,26)
0.660 (16,76)
0.495 (12,58)
0.560 (14,22)
23
7
52
0.739 (18,78)
0.761 (19,32)
0.495 (12,58)
0.560 (14,22)
24
6 68
0.938 (23,83)
0.962 (24,43)
0.850 (21,6)
0.858 (21,8)
84
1.141 (28,99)
1.165 (29,59)
1.047 (26,6)
1.063 (27,0)
B SQ A SQ
25
5
26
27
28
1
2
3
4 0.080 (2,03) 0.064 (1,63)
0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25)
0.055 (1,40) 0.045 (1,14)
0.045 (1,14) 0.035 (0,89)
0.045 (1,14) 0.035 (0,89)
0.028 (0,71) 0.022 (0,54) 0.050 (1,27)
4040140 / D 10/96 NOTES: A. B. C. D. E.
All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60) 0.355 (9,02) 8
5
0.260 (6,60) 0.240 (6,10)
1
4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38) Gage Plane
0.200 (5,08) MAX Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54) 0.021 (0,53) 0.015 (0,38)
0.430 (10,92) MAX
0.010 (0,25) M
4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30 0,19
0,65 14
0,10 M
8
0,15 NOM 4,50 4,30
6,60 6,20 Gage Plane 0,25
1
7 0°– 8° A
0,75 0,50
Seating Plane 0,15 0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97 NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products
Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2005, Texas Instruments Incorporated
This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.
D Low Power Consumption D Wide Common-Mode and Differential
D D D D
Voltage Ranges
D Low Input Bias and Offset Currents D Output Short-Circuit Protection D Low Total Harmonic
High Input Impedance . . . JFET-Input Stage Latch-Up-Free Operation High Slew Rate . . . 13 V/µs Typ Common-Mode Input Voltage Range Includes VCC+
Distortion . . . 0.003% Typ
description/ordering information The TL08x JFET-input operational amplifier family is designed to offer a wider selection than any previously developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset-voltage temperature coefficient. Offset adjustment and external compensation options are available within the TL08x family. The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from −40°C to 85°C. The Q-suffix devices are characterized for operation from −40°C to 125°C. The M-suffix devices are characterized for operation over the full military temperature range of −55°C to 125°C. ORDERING INFORMATION TJ
VIOmax AT 255C PDIP (P) PDIP (N)
SOIC (D) 0°C to 70°C
ORDERABLE PART NUMBER
PACKAGE†
15 mV SOP (PS) SOP (NS)
TSSOP (PW)
TOP-SIDE MARKING
Tube of 50
TL081CP
TL081CP
Tube of 50
TL082CP
TL082CP
Tube of 25
TL084CN
TL084CN
Tube of 75
TL081CD
Reel of 2500
TL081CDR
Tube of 75
TL082CD
Reel of 2500
TL082CDR
Tube of 50
TL084CD
Reel of 2500
TL084CDR
Reel of 2000
TL081CPSR
T081
Reel of 2000
TL082CPSR
T082
Reel of 2000
TL084CNSR
TL084
Tube of 150
TL082CPW
Reel of 2000
TL082CPWR
Tube of 90
TL084CPW
Reel of 2000
TL084CPWR
TL081C TL082C TL084C
T082 T084
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2004, Texas Instruments Incorporated
! " #$ %! " &$'(# ! ) !%* )$#!" # ! "&%## ! " &% !+% !% " %, " "! $ %!" "! ) ) - !.* )$#! & #%""/ ) %" ! %#%"" (. #($)% !%"!/ (( & %!% "*
& )$#!" # &( ! ! 0101 (( & %!% " % !%"!%) $(%"" !+% -"% !%)* (( !+% & )$#!" & )$#! & #%""/ ) %" ! %#%"" (. #($)% !%"!/ (( & %!% "*
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
description/ordering information (continued) ORDERING INFORMATION TJ
VIOmax AT 255C
PACKAGE†
TL081ACP
TL081ACP
Tube of 50
TL082ACP
TL082ACP
Tube of 25
TL084ACN
TL084ACN
Tube of 75
TL081ACD
Reel of 2500
TL081ACDR
Tube of 75
TL082ACD
Reel of 2500
TL082ACDR
Tube of 50
TL084ACD
Reel of 2500
TL084ACDR
SOP (PS)
Reel of 2000
TL082ACPSR
T082A
SOP (NS)
Reel of 2000
TL084ACNSR
TL084A
Tube of 50
TL081BCP
TL081BCP
Tube of 50
TL082BCP
TL082BCP
Tube of 25
TL084BCN
TL084BCN
Tube of 75
TL081BCD
Reel of 2500
TL081BCDR
Tube of 75
TL082BCD
Reel of 2500
TL082BCDR
Tube of 50
TL084BCD
Reel of 2500
TL084BCDR
Tube of 50
TL081IP
TL081IP
Tube of 50
TL082IP
TL082IP
Tube of 25
TL084IN
TL081IN
Tube of 75
TL081ID
Reel of 2500
TL081IDR
Tube of 75
TL082ID
Reel of 2500
TL082IDR
Tube of 50
TL084ID
Reel of 2500
TL084IDR
Reel of 2000
TL082IPWR
Tube of 50
TL084QD
Reel of 2500
TL084QDR
CDIP (J)
Tube of 25
TL084MJ
TL084MJ
LCCC (FK)
Reel of 55
TL084FK
TL084FK
CDIP (JG)
Tube of 50
TL082MJG
TL082MJG
PDIP (N)
0°C to 70°C
SOIC (D)
PDIP (P) PDIP (N)
3 mV SOIC (D)
PDIP (P) PDIP (N)
−40°C to 85°C
6 mV SOIC (D)
TSSOP (PW) −40°C to 125°C
9 mV 9 mV
−55°C to 125°C 6 mV
TOP-SIDE MARKING
Tube of 50 PDIP (P)
6 mV
ORDERABLE PART NUMBER
SOIC (D)
081AC 082AC TL084AC
081BC 082BC TL084BC
TL081I TL082I TL084I Z082 TL084QD
LCCC (FK) Tube of 55 TL082MFK TL082MFK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TL081, TL081A, TL081B D, P, OR PS PACKAGE (TOP VIEW)
OFFSET N1 IN − IN + VCC −
1
8
2
7
3
6
4
5
TL084, TL084A, TL084B D, J, N, NS, OR PW PACKAGE (TOP VIEW)
TL082, TL082A, TL082B D, JG, P, PS, OR PW PACKAGE (TOP VIEW)
NC VCC + OUT OFFSET N2
1OUT 1IN − 1IN + VCC −
1
8
2
7
3
6
4
5
VCC + 2OUT 2IN − 2IN +
1OUT 1IN − 1IN + VCC + 2IN + 2IN − 2OUT
NC − No internal connection
14
2
13
3
12
4
11
5
10
6
9
7
8
4OUT 4IN − 4IN + VCC − 3IN + 3IN − 3OUT
TL084M . . . FK PACKAGE (TOP VIEW)
1IN − 1OUT NC 4OUT 4IN −
NC 1OUT NC VCC+ NC
TL082M . . . FK PACKAGE (TOP VIEW)
4
3 2 1 20 19 18
5
17
6
16
7
15
8
14 9 10 11 12 13
NC 2OUT NC 2IN − NC
1IN + NC VCC + NC 2IN +
4
3 2 1 20 19 18
5
17
6
16
7
15
8
14 9 10 11 12 13
4IN + NC VCC − NC 3IN +
2IN − 2OUT NC 3OUT 3IN −
NC VCC − NC 2IN + NC
NC 1IN − NC 1IN + NC
1
NC − No internal connection
NC − No internal connection
symbols TL081
TL082 (EACH AMPLIFIER) TL084 (EACH AMPLIFIER)
OFFSET N1 IN +
+
IN −
−
OUT
IN +
+
IN −
−
OUT
OFFSET N2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
schematic (each amplifier) VCC +
IN + 64 Ω
IN −
OUT 128 Ω 64 Ω C1
1080 Ω
1080 Ω VCC −
OFFSET N2
OFFSET N1
TL081 Only Component values shown are nominal.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† TL08_C TL08_AC TL08_BC
TL08_I
TL084Q
TL08_M
UNIT
Supply voltage, VCC + (see Note 1)
18
18
18
18
V
Supply voltage VCC − (see Note 1)
−18
−18
−18
−18
V
Differential input voltage, VID (see Note 2)
± 30
± 30
± 30
± 30
V V
± 15
± 15
± 15
± 15
Unlimited
Unlimited
Unlimited
Unlimited
0 to 70
− 40 to 85
D package (8-pin)
97
97
D package (14-pin)
86
86
N package (14-pin)
76
76
NS package (14-pin)
80
P package (8-pin)
85
85
PS package (8-pin)
95
95
PW package (8-pin)
149
Input voltage, VI (see Notes 1 and 3) Duration of output short circuit (see Note 4) Continuous total power dissipation
See Dissipation Rating Table
Operating free-air temperature range, TA
Package thermal impedance, θJA (see Notes 5 and 6)
PW package (14-pin) Operating virtual junction temperature
113
113
150
150
− 40 to 125
− 55 to 125
°C
°C/W
150
150
°C
Case temperature for 60 seconds, TC
FK package
260
°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds
J or JG package
300
°C
Storage temperature range, Tstg − 65 to 150 − 65 to 150 − 65 to 150 − 65 to 150 °C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC + and VCC − . 2. Differential voltages are at IN+ with respect to IN −. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. 4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. 5. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 6. The package thermal impedance is calculated in accordance with JESD 51-7. DISSIPATION RATING TABLE PACKAGE
TA ≤ 25°C POWER RATING
D (14 pin)
680 mW
FK J JG
DERATING FACTOR
DERATE ABOVE TA
TA = 70°C POWER RATING
TA = 85°C POWER RATING
TA = 125°C POWER RATING
7.6 mW/°C
60°C
604 mW
490 mW
186 mW
680 mW
11.0 mW/°C
88°C
680 mW
680 mW
273 mW
680 mW
11.0 mW/° C
88°C
680 mW
680 mW
273 mW
680 mW
8.4 mW/°C
69°C
672 mW
546 mW
210 mW
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
6 VO = 0
VO = 0 VO = 0
Temperature coefficient of input offset voltage
Input offset current ‡
Input bias current ‡
α VIO
IIO
IIB
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
25°C
Common-mode rejection ratio
CMRR
VO = 0,
No load
VCC = ± 15 V to ± 9 V, VO = 0, RS = 50 Ω
VIC = VICRmin, RS = 50 Ω VO = 0,
25°C
25°C
Full range
25°C
Full range
± 12
70
70
15
25
± 10
2
1.4
86
86
80
75
1.4
86
86
3
200
± 12
± 13.5
1012
25
50
± 10
± 12
± 12
± 11
−12 to 15
30
5
18
3
TYP
3
2.8
10
400
MIN
1012
200
± 12
± 13.5
± 11
± 12
−12 to 15
30
200
20
15
MAX
TL081AC TL082AC TL084AC
2.8
7
200
2
100
7.5
6
MAX
80
75
25
50
± 10
± 12
± 12
± 11
MIN
1.4
86
86
1012
3
200
± 12
± 13.5
−12 to 15
30
5
18
2
TYP
TLO81BC TL082BC TL084BC
2.8
7
200
2
100
5
3
MAX
80
75
25
50
± 10
± 12
± 12
± 11
MIN
1.4
86
86
1012
3
200
± 12
± 13.5
−12 to 15
30
5
18
3
TYP
TL081I TL082I TL084I
2.8
20
200
10
100
9
6
MAX
mA
dB
dB
Ω
MHz
V/mV
V
V
nA
pA
nA
pA
µV/°C
mV
UNIT
VO1/ VO2 Crosstalk attenuation AVD = 100 25°C 120 120 120 120 dB † All characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. Full range for TA is 0°C to 70°C for TL08_C, TL08_AC, TL08_BC and − 40°C to 85°C for TL08_I. ‡ Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 17. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.
ICC
Supply-voltage rejection ratio (∆ VCC± /∆ VIO) Supply current (per amplifier)
25°C
Input resistance
ri
kSVR
25°C
Unity-gain bandwidth
B1
VO = ± 10 V,
VO = ± 10 V, RL ≥ 2 kΩ
Large-signal differential voltage amplification
AVD
RL ≥ 2 kΩ
RL ≥ 10 kΩ
VOM
25°C
Maximum peak output voltage swing
25°C
Full range
25°C
Full range
5
25°C
3
TYP
18
MIN
TL081C TL082C TL084C
Full range
Full range
Common-mode input voltage range
RL ≥ 2 kΩ
RS = 50 Ω
RS = 50 Ω
25°C
VICR RL = 10 kΩ
VO = 0
Input offset voltage
TEST CONDITIONS
VIO
PARAMETER
TA†
electrical characteristics, VCC± = ±15 V (unless otherwise noted)
222 2 2 2 2 32 2 SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
electrical characteristics, VCC ± = ± 15 V (unless otherwise noted) PARAMETER
TEST CONDITIONS†
TA
TL081M, TL082M
TL084Q, TL084M
MIN
MIN
25°C
TYP
MAX
3
6
VIO
Input offset voltage
VO = 0,
RS = 50 Ω
Full range
αVIO
Temperature coefficient of input offset voltage
VO = 0
RS = 50 Ω
Full range
18
Input offset current‡
25°C
5
IIO
VO = 0
125°C
IIB
Input bias current‡
VO = 0
125°C
VICR
Common-mode input voltage range
VOM
Maximum peak output voltage swing
AVD B1 ri CMRR
kSVR ICC
Large-signal differential voltage amplification
RL ≥ 10 kΩ
100
5
200
30
50 ± 11
− 12 to 15
± 11
− 12 to 15
25°C
± 12
± 13.5
± 12
± 13.5
± 12
± 10
± 12
200
25
200
25°C
25
VO = ± 10 V,
RL ≥ 2 kΩ
Full range
15
100
pA
20
nA
200
pA
50
nA V
V
± 12
RL ≥ 2 kΩ
mV
µV/°C
± 12
± 10
VO = ± 10 V,
UNIT
9
18
20 30
MAX 15
25°C
Full range
RL ≥ 2 kΩ
3
9
25°C
RL = 10 kΩ
TYP
V/mV
Unity-gain bandwidth
25°C
Input resistance
25°C
15 3 1012
3 1012
MHz Ω
Common-mode rejection ratio
VIC = VICRmin, VO = 0, RS = 50 Ω
25°C
80
86
80
86
dB
Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current (per amplifier)
VCC = ± 15 V to ± 9 V, VO = 0, RS = 50 Ω
25°C
80
86
80
86
dB
VO = 0,
25°C
No load
1.4
2.8
1.4
2.8
mA
VO1/ VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB † All characteristics are measured under open-loop conditions, with zero common-mode input voltage, unless otherwise specified. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 17. Pulse techniques must be used that maintain the junction temperatures as close to the ambient temperature as possible.
operating characteristics, VCC± = ± 15 V, TA = 25°C (unless otherwise noted) PARAMETER
TEST CONDITIONS VI = 10 V,
RL = 2 kΩ,
CL = 100 pF,
VI = 10 V, TA = − 55 55°C C to 125 125°C, C,
RL = 2 kΩ, See Figure 1
CL = 100 pF,
Overshoot factor
VI = 20 mV,
RL = 2 kΩ,
CL = 100 pF,
Vn
Equivalent input noise voltage
RS = 20 Ω
In
Equivalent input noise current
RS = 20 Ω,
f = 1 kHz
THD
Total harmonic distortion
VIrms = 6 V, f = 1 kHz
AVD = 1,
SR
Slew rate at unity gain
tr
Rise time
See Figure 1
TYP
8∗
13
See Figure 1
f = 10 Hz to 10 kHz
RL ≥ 2 kΩ,
MAX
UNIT V/µs
5∗
f = 1 kHz
RS ≤ 1 kΩ,
MIN
0.05
µs
20
%
18
nV/√Hz
4
µV
0.01
pA/√Hz
0.003
%
∗On products compliant to MIL-PRF-38535, this parameter is not production tested.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
operating characteristics, VCC± = ± 15 V, TA = 25°C PARAMETER
TEST CONDITIONS
SR
Slew rate at unity gain
tr
Rise time
VI = 10 V,
RL = 2 kΩ,
Overshoot factor
VI = 20 mV,
RL = 2 kΩ,
Vn
Equivalent input noise voltage
RS = 20 Ω
In
Equivalent input noise current
RS = 20 Ω,
f = 1 kHz
THD
Total harmonic distortion
VIrms = 6 V, f = 1 kHz
AVD = 1,
MIN
CL = 100 pF, CL = 100 pF,
See Figure 1
8
See Figure 1
f = 1 kHz f = 10 Hz to 10 kHz
TYP
MAX
UNIT V/ µs
13 0.05
µs
20
%
18
nV/√Hz µV
4
RS ≤ 1 kΩ,
RL ≥ 2 kΩ,
0.01
pA/√Hz
0.003
%
PARAMETER MEASUREMENT INFORMATION
10 kΩ − 1 kΩ −
OUT VI
+
VI
OUT CL = 100 pF
RL = 2 kΩ
+ CL = 100 pF
RL
Figure 1
Figure 2
100 kΩ TL081
−
IN −
C2
OUT +
IN +
C1 500 pF
N2 N1
−
IN −
100 kΩ
N1 OUT
+
1.5 kΩ VCC −
Figure 3
8
Figure 4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS Table of Graphs FIGURE
VOM
AVD
Maximum peak output voltage
vs Frequency vs Free-air temperature vs Load resistance vs Supply voltage
5, 6, 7 8 9 10
Large-signal differential voltage amplification
vs Free-air temperature vs Frequency
11 12
Differential voltage amplification
vs Frequency with feed-forward compensation
13
PD
Total power dissipation
vs Free-air temperature
14
ICC
Supply current
vs Free-air temperature vs Supply voltage
15 16
IIB
Input bias current
vs Free-air temperature
17
Large-signal pulse response
vs Time
18
VO CMRR
Output voltage
vs Elapsed time
19
Common-mode rejection ratio
vs Free-air temperature
20
Vn THD
Equivalent input noise voltage
vs Frequency
21
Total harmonic distortion
vs Frequency
22
MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY
MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY ± 15
VCC ± = ± 15 V
RL = 10 kΩ TA = 25°C See Figure 2
± 12.5
± 10
VCC ± = ± 10 V
± 7.5
±5
VCC ± = ± 5 V
± 2.5
0 100
VOM − Maximum Peak Output Voltage − V
VOM − Maximum Peak Output Voltage − V
± 15
RL = 2 kΩ TA = 25°C See Figure 2
VCC ± = ± 15 V
± 12.5 ± 10
VCC ± = ± 10 V ± 7.5 ±5 VCC ± = ± 5 V ± 2.5
0 1k
10 k
100 k
1M
10 M
100
f − Frequency − Hz
1k
10 k
100 k
1M
10 M
f − Frequency − Hz
Figure 5
Figure 6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS† MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY
MAXIMUM PEAK OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
± 12.5
TA = 25°C
± 10 TA = − 55°C ± 7.5
±5
TA = 125°C
± 2.5
0 10 k
ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ
± 15 VCC ± = ± 15 V RL = 2 kΩ See Figure 2
VOM − Maximum Peak Output Voltage − V
VOM − Maximum Peak Output Voltage − V
± 15
40 k 100 k
400 k
1M
4M
RL = 10 kW
± 12.5
RL = 2 kW
± 10
± 7.5
±5
± 2.5
VCC ± = ± 15 V See Figure 2
0 − 75 − 50
10 M
− 25
Figure 7
75
100
± 10
± 7.5
±5
± 2.5
RL = 10 kΩ TA = 25°C
± 12.5
± 10
± 7.5
±5
± 2.5
0 0.2
0.4
0.7
1
2
4
7
10
0
2
4
6
8
10
12
14
| VCC ± | − Supply Voltage − V
RL − Load Resistance − kΩ
Figure 10
Figure 9
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
10
125
± 15 VCC ± = ± 15 V TA = 25°C See Figure 2
VOM − Maximum Peak Output Voltage − V
VOM − Maximum Peak Output Voltage − V
50
MAXIMUM PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE
± 15
0 0.1
25
Figure 8
MAXIMUM PEAK OUTPUT VOLTAGE vs LOAD RESISTANCE
± 12.5
0
TA − Free-Air Temperature − °C
f − Frequency − Hz
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
16
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS† LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE 1000 700 AVD − Large-Signal Differential Voltage Amplification − V/mV
400 200 100 70 40 20 10 7 4
VCC ± = ± 15 V VO = ± 10 V RL = 2 kΩ
2 1 −75
−50
−25
0
25
50
75
100
125
TA − Free-Air Temperature − °C
Figure 11 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREQUENCY 106 VCC ± = ± 5 V to ± 15 V RL = 10 kΩ TA = 25°C
104
Differential Voltage Amplification (left scale)
103
102
0°
45 °
Phase Shift
AVD − Large-Signal Differential Voltage Amplification − V/mV
105
90 ° Phase Shift (right scale)
101
135 °
1 1
10
100
1k
10 k
100 k
1M
180 ° 10 M
f − Frequency − Hz
Figure 12 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS† DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREQUENCY WITH FEED-FORWARD COMPENSATION
TOTAL POWER DISSIPATION vs FREE-AIR TEMPERATURE 250
VCC ± = ± 15 V C2 = 3 pF TA = 25°C See Figure 3
105
104
103
102
10
VCC ± = ± 15 V No Signal No Load
225 PD − Total Power Dissipation − mW
AVD − Differential Voltage Amplification − V/mV
106
200 175
TL084, TL085
150 125 100
TL082, TL083
75 TL081
50 25
1 100
1k
10 k
100 k
1M
0 −75
10 M
−50
−25
f − Frequency With Feed-Forward Compensation − Hz
SUPPLY CURRENT PER AMPLIFIER vs FREE-AIR TEMPERATURE
50
75
100
125
SUPPLY CURRENT vs SUPPLY VOLTAGE
2.0
2.0 VCC ± = ± 15 V No Signal No Load
1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2
TA = 25°C No Signal No Load
1.8 I CC ± − Supply Current − mA
I CC ± − Supply Current − mA
25
Figure 14
Figure 13
0 −75
0
TA − Free-Air Temperature − °C
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2
−50
−25
0
25
50
75
100
125
0 0
2
TA − Free-Air Temperature − °C
4
6
8
10
12
14
| VCC ± | − Supply Voltage − V
Figure 16
Figure 15
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
16
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS† INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE
VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 6
100
VCC ± = ± 15 V RL = 2 k Ω CL = 100 pF TA = 25°C
Input and Output Voltages − V
I IB − Input Bias Current − nA
V CC ± = ± 15 V
10
1
0.1
4 Output 2
0
−2 Input −4
0.01 − 50
−6 − 25
0
25
50
75
100
125
0
0.5
TA − Free-Air Temperature − °C
CMRR − Common-Mode Rejection Ratio − dB
89
VO − Output Voltage − mV
24 20 VCC ± = ± 15 V RL = 2 k Ω CL = 100 pF TA = 25°C See Figure 1
4 0 −4 0
0.2
0.4
2.5
3
3.5
COMMON-MODE REJECTION RATIO vs FREE-AIR TEMPERATURE
28
8
2
Figure 18
OUTPUT VOLTAGE vs ELAPSED TIME
12
1.5
t − Time − µ s
Figure 17
16
1
0.6
0.8
1.0
1.2
VCC ± = ± 15 V RL = 10 kΩ
88
87
86
85
84
83 − 75
− 50
t − Elapsed Time − µ s
− 25
0
25
50
75
100
125
TA − Free-Air Temperature − °C
Figure 20
Figure 19
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS† EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY
TOTAL HARMONIC DISTORTION vs FREQUENCY 1
VCC ± = ± 15 V AVD = 10 RS = 20 Ω TA = 25°C
40
30
20
10
0.1 0.04
0.01 0.004
0.001
0 40
10
100
400 1 k
4 k 10 k
VCC ± = ± 15 V AVD = 1 VI(RMS) = 6 V TA = 25°C
0.4 THD − Total Harmonic Distortion − %
Vn − Equilvalent Input Noise Voltage − nV/ Hz
50
40 k 100 k
10
400
1k
4k
10 k
40 k 100 k
f − Frequency − Hz
f − Frequency − Hz
Figure 22
Figure 21
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
APPLICATION INFORMATION RF = 100 kΩ VCC + − Output
− TL081 +
CF = 3.3 µF
Input
R1
R2
C3
TL081 +
15 V 3.3 kΩ
Output VCC −
1 kΩ −15 V
R1 = R2 = 2(R3) = 1.5 MΩ
R3 3.3 kΩ f=
C1 9.1 kΩ
1 2π RF CF
Figure 23
14
C2
C1 = C2 = C3 = 110 pF 2 1 fo = = 1 kHz 2π R1 C1
Figure 24
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
APPLICATION INFORMATION VCC + 1 MΩ
− TL084
VCC +
Output A
+
+ 1 µF
TL084
VCC +
−
Input
− TL084 100 kΩ 100 kΩ 100 µF
Output B
+
100 kΩ
VCC + VCC +
100 kΩ
− TL084
Output C
+
Figure 25. Audio-Distribution Amplifier 6 sin ωt
1N4148 − 15 V
18 pF 18 pF
1 kΩ
18 kΩ (see Note A)
VCC +
1/2 TL082
+
88.4 kΩ
VCC+ −
−
88.4 kΩ
1/2 TL082 VCC −
6 cos ωt
+
18 pF
VCC −
1 kΩ 15 V
1N4148 88.4 kΩ
18 kΩ (see Note A)
NOTE A: These resistor values may be adjusted for a symmetrical output.
Figure 26. 100-KHz Quadrature Oscillator
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
15
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004
APPLICATION INFORMATION 16 kΩ
16 kΩ 220 pF
220 pF
VCC + 43 kΩ
43 kΩ
1/4 TL084
VCC + VCC + 43 kΩ
1/4 TL084
1/4 TL084
+
+
+
1.5 kΩ
+
−
1/4 TL084
220 pF
VCC + −
Input
220 pF
30 kΩ
−
43 kΩ
43 kΩ
30 kΩ
1.5 kΩ
VCC −
−
43 kΩ
VCC −
VCC −
VCC −
Output A Output A
Output B
2 kHz/div Second-Order Bandpass Filter fo = 100 kHz, Q = 30, GAIN = 4
2 kHz/div Cascaded Bandpass Filter fo = 100 kHz, Q = 69, GAIN = 16
Figure 27. Positive-Feedback Bandpass Filter
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
Output B
PACKAGE OPTION ADDENDUM www.ti.com
18-Feb-2005
PACKAGING INFORMATION Orderable Device
Status (1)
Package Type
Package Drawing
Pins Package Eco Plan (2) Qty
5962-9851501Q2A
ACTIVE
LCCC
FK
20
1
None
5962-9851501QPA
ACTIVE
CDIP
JG
8
1
None
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE Level-NC-NC-NC A42 SNPB
Level-NC-NC-NC
5962-9851503Q2A
ACTIVE
LCCC
FK
20
1
None
5962-9851503QCA
ACTIVE
CDIP
J
14
1
None
A42 SNPB
TL081ACD
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081ACDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081ACJG
OBSOLETE
CDIP
JG
8
None
Call TI
TL081ACP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL081BCD
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081BCDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081BCP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL081CD
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081CDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081CP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL081CPSR
ACTIVE
SO
PS
8
2000
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081CPWLE
OBSOLETE
TSSOP
PW
8
None
Call TI
TL081ID
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081IDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL081IP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL081MFKB
OBSOLETE
LCCC
FK
20
None
Call TI
Call TI
TL081MJG
OBSOLETE
CDIP
JG
8
None
Call TI
Call TI
TL081MJGB
OBSOLETE
CDIP
JG
8
None
Call TI
Call TI
TL082ACD
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082ACDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082ACP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL082ACPSR
ACTIVE
SO
PS
8
2000
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL082BCD
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082BCDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082BCP
ACTIVE
PDIP
P
8
50
Pb-Free
CU NIPDAU
Level-NC-NC-NC
Addendum-Page 1
POST-PLATE Level-NC-NC-NC Level-NC-NC-NC
Call TI
Call TI
PACKAGE OPTION ADDENDUM www.ti.com
18-Feb-2005
Orderable Device
Status (1)
Package Type
Package Drawing
Pins Package Eco Plan (2) Qty
TL082CD
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082CDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082CJG
OBSOLETE
CDIP
JG
8
None
Call TI
TL082CP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL082CPSR
ACTIVE
SO
PS
8
2000
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL082CPW
ACTIVE
TSSOP
PW
8
150
Pb-Free (RoHS)
CU NIPDAU
Level-1-250C-UNLIM
TL082CPWLE
OBSOLETE
TSSOP
PW
8
None
Call TI
TL082CPWR
ACTIVE
TSSOP
PW
8
2000
Pb-Free (RoHS)
CU NIPDAU
Level-1-250C-UNLIM
TL082ID
ACTIVE
SOIC
D
8
75
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082IDR
ACTIVE
SOIC
D
8
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL082IJG
OBSOLETE
CDIP
JG
8
None
Call TI
TL082IP
ACTIVE
PDIP
P
8
50
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL082IPWR
ACTIVE
TSSOP
PW
8
2000
Pb-Free (RoHS)
CU NIPDAU
Level-1-250C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(RoHS)
TL082MFK
OBSOLETE
LCCC
FK
20
TL082MFKB
ACTIVE
LCCC
FK
20
1
None None
Call TI
Call TI
Call TI
Call TI
Call TI
POST-PLATE Level-NC-NC-NC
TL082MJG
ACTIVE
CDIP
JG
8
1
None
A42 SNPB
Level-NC-NC-NC
TL082MJGB
ACTIVE
CDIP
JG
8
1
None
A42 SNPB
Level-NC-NC-NC
TL084ACD
ACTIVE
SOIC
D
14
50
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084ACDR
ACTIVE
SOIC
D
14
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084ACN
ACTIVE
PDIP
N
14
25
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL084ACNSR
ACTIVE
SO
NS
14
2000
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL084BCD
ACTIVE
SOIC
D
14
50
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084BCDR
ACTIVE
SOIC
D
14
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084BCN
ACTIVE
PDIP
N
14
25
Pb-Free (RoHS)
CU NIPDAU
Level-NC-NC-NC
TL084CD
ACTIVE
SOIC
D
14
50
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084CDR
ACTIVE
SOIC
D
14
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084CJ
OBSOLETE
CDIP
J
14
None
Call TI
TL084CN
ACTIVE
PDIP
N
14
Pb-Free (RoHS)
CU NIPDAU
TL084CNSLE
OBSOLETE
SO
NS
14
None
Call TI
25
Addendum-Page 2
Call TI Level-NC-NC-NC Call TI
PACKAGE OPTION ADDENDUM www.ti.com
18-Feb-2005
Orderable Device
Status (1)
Package Type
Package Drawing
Pins Package Eco Plan (2) Qty
Lead/Ball Finish
MSL Peak Temp (3)
TL084CNSR
ACTIVE
SO
NS
14
2000
Pb-Free (RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
TL084CPW
ACTIVE
TSSOP
PW
14
90
Pb-Free (RoHS)
CU NIPDAU
Level-1-250C-UNLIM
TL084CPWLE
OBSOLETE
TSSOP
PW
14
TL084CPWR
ACTIVE
TSSOP
PW
None
Call TI
14
2000
Pb-Free (RoHS)
CU NIPDAU
Level-1-250C-UNLIM
TL084ID
ACTIVE
SOIC
D
14
50
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084IDR
ACTIVE
SOIC
D
14
2500
Pb-Free (RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL084IJ
OBSOLETE
CDIP
J
14
None
Call TI
TL084IN
ACTIVE
PDIP
N
14
25
Pb-Free (RoHS)
CU NIPDAU
Call TI
Call TI Level-NC-NC-NC
TL084MFK
ACTIVE
LCCC
FK
20
1
None
POST-PLATE Level-NC-NC-NC
TL084MFKB
ACTIVE
LCCC
FK
20
1
None
POST-PLATE Level-NC-NC-NC
TL084MJ
ACTIVE
CDIP
J
14
1
None
A42 SNPB
Level-NC-NC-NC
TL084MJB
ACTIVE
CDIP
J
14
1
None
A42 SNPB
Level-NC-NC-NC
TL084QD
ACTIVE
SOIC
D
14
50
None
CU NIPDAU
Level-1-220C-UNLIM
TL084QDR
ACTIVE
SOIC
D
14
2500
None
CU NIPDAU
Level-1-220C-UNLIM
(1)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8
5
0.280 (7,11) 0.245 (6,22)
1
0.063 (1,60) 0.015 (0,38)
4 0.065 (1,65) 0.045 (1,14)
0.310 (7,87) 0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN
0.023 (0,58) 0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36) 0.008 (0,20)
4040107/C 08/96 NOTES: A. B. C. D. E.
All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF TERMINALS **
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342 (8,69)
0.358 (9,09)
0.307 (7,80)
0.358 (9,09)
28
0.442 (11,23)
0.458 (11,63)
0.406 (10,31)
0.458 (11,63)
21
9
22
8
44
0.640 (16,26)
0.660 (16,76)
0.495 (12,58)
0.560 (14,22)
23
7
52
0.739 (18,78)
0.761 (19,32)
0.495 (12,58)
0.560 (14,22)
24
6 68
0.938 (23,83)
0.962 (24,43)
0.850 (21,6)
0.858 (21,8)
84
1.141 (28,99)
1.165 (29,59)
1.047 (26,6)
1.063 (27,0)
B SQ A SQ
25
5
26
27
28
1
2
3
4 0.080 (2,03) 0.064 (1,63)
0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25)
0.055 (1,40) 0.045 (1,14)
0.045 (1,14) 0.035 (0,89)
0.045 (1,14) 0.035 (0,89)
0.028 (0,71) 0.022 (0,54) 0.050 (1,27)
4040140 / D 10/96 NOTES: A. B. C. D. E.
All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60) 0.355 (9,02) 8
5
0.260 (6,60) 0.240 (6,10)
1
4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38) Gage Plane
0.200 (5,08) MAX Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54) 0.021 (0,53) 0.015 (0,38)
0.430 (10,92) MAX
0.010 (0,25) M
4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30 0,19
0,65 14
0,10 M
8
0,15 NOM 4,50 4,30
6,60 6,20 Gage Plane 0,25
1
7 0°– 8° A
0,75 0,50
Seating Plane 0,15 0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97 NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products
Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2005, Texas Instruments Incorporated
This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.
Related Documents
Tl084cn Amplificador Operacional
June 2020 2
Amplificador Operacional
November 2019 22
Amplificador Diferencial Y Operacional
October 2019 15
