Ps800servicemanual.pdf

TP9 TP8

7

+

U16A

R172

INV 3

HIGH KV DETECTOR AND LATCH (U31, U32A, U33A)

HV ON DETECTOR CIRCUIT (U30C U30D, Q6, ETC)

JW3 125kV 150kV

“OR” LOGIC

JUMPER POSITION: 125kV GENERATORS JUMPER “125kV” 150 kV GENERATORS JUMPER “150kV”

R25

1

J10-7

J1-7

3+ J1-26 R25, R44

ANODE OVERVOLTAGE SIGNAL TO MD-0760, PG 2

D93

CATHODE OVERVOLTAGE SIGNAL TO MD-0760, PG 2

INVERTER 1 FAULT LATCH & LOGIC INVERTER (U39B, U35F)

INVERTER 1 FAULT DETECTOR (T3, U36, D83, ETC)

INVERTER 2 FAULT LATCH & LOGIC INVERTER (U39C, U35E)

INVERTER 2 FAULT DETECTOR (T4, U37, D84, ETC)

INVERTER 3 FAULT LATCH & LOGIC INVERTER (U39D, U35D)

INVERTER 3 FAULT DETECTOR (T5, U38, D85, ETC)

J14-1 J14-3

J15-1

INV J15-3

J16-1 J16-3

4 +5V

1

R71

ERROR AMPLIFIERS INCLUDES U13B, U21A

R70

U13A

-

R106 D49

-

D35

R107

65+

+ +

U13B

R43

U21A

R175

7

VCO INCLUDES U19, U20, U23, U25, U27, Q10

U21B

R108

+12V

D92

TP17 TP19

D48 2-

J10-26

J9-8

R50

U12B

R132

1

6 5

INV 1

R46 R26, R45

U14A

+

D87-D89, U35C

D86

3+

7

D82

INV 2

11

kV D63

-

R69

+12V

D81

R208

10

+12V

D80

D69

U33E

TP26

+12V

J9-5 J9-7

R54

R220

RESET COMMAND FROM MD-0761, PG 2

3

2

5

U16B

R23

HV ON SIGNAL TO MD-0767, PG 1

TP2

6

U24A 2 1

U26A 3

2

7

DRIVE P CONTINUED

U26B

U24B 5 4

R171

RN2B

-

R48

R52 R89

R37

J1-31

2 3

R180

J10-12

J9-6

R49

R215

-

1

2 3

U12A

R221

3

RN4B

R24

J1-12

HIGH KV / INVERTER FAULT TO GENERATOR READY DETECTOR CIRCUIT ON CONTROL BOARD, SEE MD-0761, PG 2 +12V

A/D VERTER

6

4

5

D66 D70

Ir

R62

3 2

D27-D30

U15

CURRENT SENSE R65

+

R64

7

R66

HIGH RESONANT CURRENT LATCH & LOGIC INVERTER (U32D, U33D)

R63

D/A VERTER

J10-31

+

U15A

U37

U22

RN2A

R67

R72

+

2

R91

R210

R31

-

1

-

1

+

R209

5

U15B

RN4A

R68

R42

R26

R35

+

6 R36

-

R41

TP6 TP8 7

R53

2

2

T1

T2

DRIVE ENABLE COMMAND FROM MD-0761, PAGE 2

-12V

GENERATOR CPU BOARD

CONTROL BOARD

J13-4

J13-1

H.T. PRIMARY CURRENT SENSE FROM PAGE 2

DRAWN

G. SANWALD CHECKED S. BLAKE

DATE 18 MAY 2000 18 MAY 2000

E1: 560 / 650 VDC (+)

J2-1 J2-3

J10-1

J1-1

J10-2

J1-2

J10-3

J1-3

J10-4

J1-4

* USED ON R&F GENERATORS ONLY TO J14-1 TO J14-3

K1 *

REFER TO MD-0786 FOR K1 DRIVE CIRCUITS

INVERTER FAULT SIGNAL, TO PAGE 1

MOSFET SWITCHES

MOSFET SWITCHES

E3

MOSFET SWITCHES

MOSFET SWITCHES

* E4

INVERTER BOARD #1

E2: 560 / 650 VDC (-)

E1: 560 / 650 VDC (+)

J2-1 J2-3

GATE DRIVE CIRCUIT OR MOSFET INVERTER NCLUDES Q19 TO Q26)

J11-1

J1-1

J11-2

J1-2

J11-3

J1-3

J11-4

J1-4

TO J15-1 TO J15-3

INVERTER FAULT SIGNAL, TO PAGE 1

MOSFET SWITCHES

MOSFET SWITCHES

E3

MOSFET SWITCHES

MOSFET SWITCHES E4

INVERTER BOARD #2

E2: 560 / 650 VDC (-)

E1: 560 / 650 VDC (+)

J2-1 J2-3

J12-1 J12-2

J12-3 J12-4

S

J1-1

POWER MODE SELECT BOARD (REFER TO MD-0786)

J1-2

TO J16-1 TO J16-3

INVERTER FAULT SIGNAL, TO PAGE 1

MOSFET SWITCHES

MOSFET SWITCHES

E3 J1-3 J1-4

MOSFET SWITCHES

MOSFET SWITCHES E4

CONTROL BOARD

INVERTER BOARD #3

E2: 560 / 650 VDC (-)

INDICO 100 GENERATORS USE ONE, TWO, OR THREE INVERTER MODULES DEPENDING ON GENERATOR OUTPUT POWER

RESONANT BOARD H.T. PRIMARY CURRENT SENSE, TO PAGE 1

J1-1

J1-4

TO J13-1 TO J13-4

DATE DRAWN G. SANWALD 18 MAY 2000 CHECKED 18 MAY 2000 S. BLAKE

HV ANODE BOARD

J1 ANODE S

C

L

TO J9-8 KV FEEDBACK SIGNAL TO PAGE 1

TO J9-7 TO J9-5 TO J9-6

J3-8

HV MULT ASSY + (ANODE)

J3-7 J3-5 J3-6

E9

HV MULT ASSY(CATHODE)

E10

FROM PAGE 2 C

L S

TANK LID BOARD

RESONANT BOARD

HV CATHODE BOARD

J2 CATHODE

PART OF H.V. OIL TANK ** ONE TUBE H.T. OUTPUTS ARE SHOWN. TWO TUBE TANKS WILL HAVE A SECOND PAIR OF H.T. OUTPUTS DATE DRAWN G. SANWALD 18 MAY 2000 CHECKED 18 MAY 2000 S. BLAKE

E NCE

REMARKS kV REFERENCE OUTPUT, GENERATED BY THE CPU. SCALING IS 1 VOLT OUT = 15 kV OF GENERATOR OUTPUT. kV FEEDBACK TO THE CPU. SCALING IS 1V = 20 KV OF GENERATOR OUTPUT. HV ON SIGNAL. THIS IS “HIGH” (APPROXIMATELY 5 VDC) WHEN HIGH VOLTAGE IS ON, “LOW” (APPROXIMATELY 0 VDC) WHEN HIGH VOLTAGE IS OFF.

THE VOLTAGE AT TP17 AND TP19 SHOULD BE A 50% DUTY CYCLE SQUARE WAVE, RANGING IN FREQUENCY FROM APPROXIMATELY 80 kHz TO APPROXIMATELY 250 kHz, DEPENDING ON GENERATOR OUTPUT POWER. SEE FIGURE 1.

12 VDC 0 VDC

FIGURE 1

DRAWN

G. SANWALD CHECKED S. BLAKE

DATE 18 MAY 2000 18 MAY 2000

+5V

J2-8

RN7C

JW1

5.5 A 6.5 A 1 3 2

J2-7

FIL

BUFFER & CURRENT LIMIT CIRCUIT

J2-9

DS13

JW1 SELECTS MAXIMUM FILAMENT CURRENT 5.5 OR 6.5 AMPS

DS14

ERROR AMPLIFIER & DRIVER CIRCUIT

+12V RED

TP2

TO 2.1 V CURRENT SINK

U24

OPTO-COUPLER “ON” = NO FILAMENT FAULT

BUFFER 5

RN7E

+5V

2

J10-23

BUFFER

1

4

2

RN4D R137

J10-5

J1-5

J10-24

J1-24

Q15

3

RN2G

R136

1

TP3

Q14

J2-6 JW1

J2-2

J3-8

J3-10

J2-10

J3-7 TP2

5

TP1

-

7

R24

J10-9

J1-9

J3-6

J10-28

J1-28

J3-5

RN11E U27

JW5 JUMPER POSITION: INDICO GENERATORS JUMPER PINS 1-2 DO NOT USE JUMPER POSITION 2-3

DS25

SMALL TO 2.1 V CURRENT SINK

2

3

2

RN6E

+5V

U24

J2-6

U19, U16 BUFFER AND DRIVER

DATA LATCH

J10-17

J1-17

J10-36

J1-36

OPTO-COUPLER “ON” = LARGE FOCUS SELECTED “LG/SM REQUEST” DETECTOR CKT RN1A (U11C, Q2, ETC) 5 1

JW1

J3-11

TO J3-6, J3-5, J3-9, J3-10 ON CONTROL BOARD

BUFFER 5

FIL CURRENT FEEDBACK SIGNAL (SM) TO PAGE 2

1

U10 2

J2-4 J2-3 J2-2

FIL CURRENT FEEDBACK SIGNAL (LG) TO PAGE 2 4

J10-27

J1-27

ERROR AMPLIFIER & DRIVER CIRCUIT

TP1

RN2E

J1-8

BUFFER & CURRENT LIMIT CIRCUIT

J2-9

JW1 SELECTS MAXIMUM FILAMENT CURRENT 5.5 OR 6.5 AMPS

J2-10 +12V

J10-8

J5-1

3

4

2

RN1B

5.5 A 6.5 A 1 3 2

J2-5

4

U1 OPTO-COUPLER “ON” = SMALL FOCUS SELECTED

J8

INDICO 100 GENERATORS WITH STANDARD SINGLE FILAMENT BOARD (TYPICALLY USED IN RAD ONLY GENERATORS) USE THE FILAMENT BOARD CONFIGURATION SHOWN BELOW

JW5 1

J5-2

INDICO 100 GENERATORS WITH OPTIONAL TWO FILAMENT BOARDS (TYPICALLY USED IN R&F GENERATORS) USE THE FILAMENT BOARD CONFIGURATION SHOWN ABOVE

+5V

DS24

J2-1

T1 RMS CONVERTER CIRCUIT

FILAMENT SUPPLY BOARD (LARGE)

+

U14B

LARGE

C22 BUFFER / AMPLIFIER & FILAMENT CURRENT COMPARATOR

J2-2 FILAMENT CURRENT FEEDBACK SIGNAL (LG) TO PAGE 2

R11 6

ERROR AMPLIFIER & DRIVER CIRCUIT

J2-10

R17

D/A VERTER

J5-3

3

J3-9

TP1

1

J4

JW1 SELECTS MAXIMUM FILAMENT CURRENT 5.5 OR 6.5 AMPS

BUFFER & CURRENT LIMIT CIRCUIT

J2-9

TP21

U14D

5.5 A 6.5 A 1 3 2

J2-5

J3-2

R7

14

J5-4

RMS CONVERTER CIRCUIT

FILAMENT SUPPLY BOARD (SMALL)

HV / MA FAULT FROM MD-0761, PAGE 2

R5

R10

U22

J2-3

T1

J3-10

RN4C

OPTO-COUPLER “ON” = NO HV / MA FAULT

12 +

J1-23

U8

TO 2.1 V CURRENT SINK

U24

5

C22 BUFFER / AMPLIFIER & FILAMENT CURRENT COMPARATOR

J2-4 FILAMENT CURRENT FEEDBACK SIGNAL (SM) TO PAGE 2 +12V

RED

D/A VERTER

TP1

HV

GRN

3

J2-10

FILAMENT FAULT TO MD-0761, PAGE 2

J1-4

1

4

DS12

13 -

J10-4

U7

DS11

U18

RN2H

GRN

RN4A R75

J2-1

C22

T1 BUFFER / AMPLIFIER & FILAMENT CURRENT COMPARATOR

RMS CONVERTER CIRCUIT

TP2

J2-11

Q3

J5-3 J5-4

+12V K1 K1

J5-1 J5-2

FILAMENT SUPPLY BOARD (UNIVERSAL) GENERATOR CPU BOARD

O PAGE 4 FOR LOGIC LEVELS, TC, REFERENCED BY

CONTROL BOARD

DUE TO SPACE RESTRICTIONS, THIS PAGE SHOWS ONLY THE MAJOR FILAMENT BLOCKS. REFER TO PAGE 3 FOR A MORE DETAILED FUNCTIONAL DIAGRAM OF THE FILAMENT SUPPLY BOARD.

DRAWN

G. SANWALD CHECKED S. BLAKE

DATE 12 MAY 2000 12 MAY 2000

RGE

J5-1

J4-1

J5-2

J4-2

FROM J2-4

FILAMENT CURRENT FEEDBACK SIGNAL (LG) FROM PAGE 1

FROM J2-2

FROM J2-3

J3-4

J2-3

J3-3

J2-11

SM FILA CONTI

J2 ** CATHODE C

S L

5

E1

FILAMENT CURRENT FEEDBACK SIGNAL (SM) FROM PAGE 1

FROM J2-1

J3-2

J1-13

J3-1

J1-32

LG FILA CONTI

8 J4-4

6-

7

R4

J1-11

U30B

R3

J1-30

5+

-

9

6

TP6 TP7

+ U9

7

C

L

HIGH MA FAULT TO GENERATOR READY DETECTOR CIRCUIT ON CONTROL BOARD, SEE MD-0761, PAGE 2

+12V

TP2 TP3

J3-1

RN6C, RN6D

J3-2

6-

E18

J2-1

R14

J2-9

FLUOR CONTI

10

R15

U33E

ANODE I

D65

D95

R38

U6B

D72 HIGH ANODE CURRENT LATCH & LOGIC INVERTER (U32C, U33C)

ANODE OVERCURRENT DETECTOR (U18, RN9E-H, ETC.)

7

5+ RN6A, RN6B

J9-2

ANODE OVERVOLTAGE SIGNAL FROM MD-0759, PG 1

R19

R8

J9-1

R212

R179

R9

R7

R34

RAD CONTI

11

S

HV ANODE BOARD

3

R36

2

R164

R213

H.T.TANK

R33, R32 J1 ANODE

R165

R216

SUPPLY RD

R5

R163

CATHODE H.T. BOARD

R6

J5-4

TP4 TP5

R16

J4-3

R17

MALL

J5-3

mA TEST JACK

RESET COMMAND FROM MD-0761, PG 2

+ E17

R177

+12V

CATHODE OVERVOLTAGE SIGNAL FROM MD-0759, PG 1

R39 RN6G, RN6H

J9-4

2-

R18

J3-4

J3-3

RN6F, RN6E

1

U6A

D96

HIGH CATHODE CURRENT LATCH & LOGIC INVERTER (U32B, U33B)

CATHODE

D64

C

S J2 CATHODE

R40

L

J9-3

3+

CATHODE OVERCURRENT DETECTOR (U17, RN9A-D, ETC.)

D71

H.T.TANK HV CATHODE BOARD

TANK LID BOARD

PART OF HV OIL TANK

CONTROL BOARD

DATE DRAWN G. SANWALD 12 MAY 2000 CHECKED 12 MAY 2000 S. BLAKE

R57

U1A

RN8D

2

6.5 A

1

5.5 A

+35V

-12V

RN9D

65

J3-3

R63

7

+

D6

RN8C

R62

U30B RN9C

11

RN3G J2-8

RN2A

6-

7

5+ J2-7

6

RN2B

R64

RN1A

J2-5

RN1B

Q6

TP3

U3

RN4H

Q12

+

U4B

RN3F

R67

J2-6

RN5G

U1B

TP23 TP22

PWM REGULATOR

RN8B 23

J10-13

Q13 Q7

R59

1

+

U30A RN8A

RN9A

RN3H

RN9B

R60

J10-32

J2-9

3 U37

11

TP4

TP2

+12V RN5D

A/D CONVERTER

R38

R39

K1

K1 IS FITTED ON “UNIVERSAL” (LARGE/SMALL) FILAMENT BOARDS. J8 IS FITTED ON LARGE FILAMENT BOARDS, AND J4 IS FITTED ON SMALL FILAMENT BOARDS.

RN1D 910 +

J10-11

8

-

12 +

R34

RN2C

J8 J4

13

U15C

K1

J2-11

R29 14 U15D R23

J10-30

RN2D

-35V

10

TP1

J2-10

C22

TP10

TP7

12

J2-4

RN2C

J2-3

RN2D

TP11 TP14 R50

J2-2

RN1C

J2-1

RN1D

D12, 13 D27, 28

U7

Q1 U4A 1.7 V Ref

U2A -

+

T1

RMS CONVERTER

-

+

RN4C RN5C

-

23+

J3-1

1

+

U2B U23A

RN5D

R79

R21

R88

J3-9

FILAMENT CURRENT SENSE, RMS CONVERTER, AND FILAMENT FEEDBACK

R87

EEDBACK AGE 2

-

R45

EEDBACK PAGE 2

+

RN1C

EEDBACK AGE 2

ERROR AMPLIFIER, PWM REGULATOR, AND FILAMENT CURRENT DRIVERS

3

R61

J3-11

SET MAX CURRENT JW1

TP25 TP24

RN4D

EEDBACK AGE 2

MAXIMUM FILAMENT CURRENT LIMIT CIRCUIT

6

GENERATOR CPU BOARD

DATA BUS D0..D7

FILAMENT SUPPLY BOARD

DATE DRAWN G. SANWALD 12 MAY 2000 CHECKED 12 MAY 2000 S. BLAKE

E NCE

REMARKS FILAMENT REFERENCE OUTPUTS, GENERATED BY THE CPU. SCALING IS 1 VOLT OUT = 1 AMP OF FILAMENT CURRENT. “HIGH” (APPROXIMATELY 5 VDC) = LARGE FOCUS SELECTED, “LOW” (APPROXIMATELY 0 VDC) = SMALL FOCUS SELECTED. THIS SIGNAL IS USED IN SINGLE FILAMENT SUPPLY GENERATORS ONLY. “HIGH” (APPROXIMATELY 12 VDC) = FILAMENT FAULT (FILAMENT CURRENT < 2 A). “LOW” (APPROXIMATELY 0 VDC) = NO FILAMENT FAULT. “HIGH” (APPROXIMATELY 12 VDC) = LARGE FOCUS SELECTED, “LOW” (APPROXIMATELY 0 VDC) SMALL FOCUS SELECTED. PRIMARY FILAMENT CURRENT AT THESE POINTS MAY BE CONFIRMED USING A CURRENT PROBE ON ONE OF THE OUTPUT LEADS ON THE SMALL OR LARGE PAIR OF OUTPUTS. THE VOLTAGE AT THESE TEST POINTS WILL BE APPROXIMATELY 1 VDC = 1 AMP OF FILAMENT CURRENT.

THESE TEST POINTS ALLOW MEASUREMENT OF A VOLTAGE PROPORTIONAL TO ANODE CURRENT. THE SCALING IS 0.4 VDC = 100 mA. SHORT EXPOSURE TIMES MUST BE CONSIDERED AND APPRO MEASUREMENT TECHNIQUES MUST BE USED. THESE TEST POINTS ARE SCALED 1 VDC = 100 mA OF X-RAY CURRENT. THESE TEST POINTS ARE SCALED 1 VDC = 2.5 mA OF X-RAY CURRENT (R&F GENERATORS ONLY). FILAMENT FEEDBACK CURRENT TEST POINT. THIS IS SCALED 1 VDC = 1 AMP OF FILAMENT CURRENT. PWM OUTPUT. THE WAVEFORM WILL BE AS PER FIGURE 1 FOR LOW AND HIGH FILAMENT CURRENT DEMAND.

Approx 25 usec (40 kHz) +12 V LOW FILAMENT DEMAND

0V

FIGURE 1

+12 V HIGH FILAMENT DEMAND

0V

DATE DRAWN G. SANWALD 12 MAY 2000 CHECKED 12 MAY 2000 S. BLAKE

T H

PREP

-RAY

COM

+24V

2

4

1

5

U22 5

2

4

2

4

U32

U44

REFER TO PAGE 4 FOR LOGIC LEVELS, NOTES, ETC, REFERENCED BY HEXAGONAL SYMBOL:

1

LAST IMAGE HOLD CIRCUIT (U39, C30, ETC.)

REMOTE FLUORO EXPOSURE INPUT TP4

TP5

TP6

J4-6 J4-7

J5-8

J4-8

R19

1

R102

BUFFER AND ADDRESS DECODER

5

U15 R25

+24V 2

4

1

5

2

4

ADDRESS DECODER, DATA LATCH, AND DRIVER

1

5

U18, U25

2

4

U38

J4-9

U37 R18

DATA BUS D0..D7

5

1

U24

U25 4

2

5

1

2

DS41

TO 2.1 V CURRENT SINK

1

5

2

4

U46

R72

R J12-5

J6-5 RN14D

5

U25, U12, U7

BUFFER AND ADDRESS DECODER

J12-7

J6-7

RN14B

J6-4

RN14E

4 J12-4

5

KV CO REFER TO

+24V 4

DS42

1

U26 4

J6-6

4

U18, U25 +24V

CPU

5

J12-6

2

R20

R24

J5-7

J5-9

U18

EXP SWT

4

2

R70

+5V

R121

R120

+5V

U30

+5V

SEE NOTE 1 J5-6

+5V

J9-8

EXPOSURE ENABLE COMMAND TO J10-35 (PAGE 2)

+12V

BUFFER AND ADDRESS DECODER (U18, U25)

5

R119

R118

R113

1

EXPOSURE ENABLE COMMAND FROM MD-0767, PAGE 1

ADDRESS DECODER, DATA LATCH, AND DRIVER

4

1

J6-17

U25, U12, U7

U42 2

J12-17

3

R92

5

5

R82

1

1

R39, R57

NOTE: THE PORTION OF THE REMOTE FLUORO EXPOSURE, REMOTE EXPOSURE, AND REMOTE TOMO SELECT INPUTS SHOWN WITHIN THE DASHED OUTLINES IS DETAILED ON MD-0763, PAGE 1

RN19B

+24V

1.

2

4 J13-7

3

2

JW15

1

SEE NOTE 1

J9-3

MA CO REFER T

R77 J9-4

J13-9

1

5

2

4

1

5

2

4

U25, U12, U7

U43 J13-3 REMOTE EXPOSURE INPUT

J13-1

R76

J13-5

J3-18

CONSOLE BOARD

NSOLE BOARD & OARD ASSEMBLY ON THIS PAGE IS N THE 31 X 42 CM NLY. REFER TO PAGE 23 X 56 CM CONSOLE AD-ONLY CONSOLE,

J3-19

ADDRESS DECODER, DATA LATCH, AND DRIVER BUFFER AND ADDRESS DECODER (U18, U25)

J12-5

J6-5

RN14D

4

U41

J3-20 +24V

4

P1-18

3

2

JW2

1

SEE NOTE 1

RN14A

J9-24

P1-19

PREP

R23 J9-25

1

5

X-RAY P1-20

KEYBOARD ASSEMBLY

2

4

REMOTE TOMO SELECT INPUT

1

5

R21

2

4

ADDRESS DECODER, DATA LATCH, AND DRIVER BUFFER AND ADDRESS DECODER (U18, U25) U10

J6-8

U25, U12, U7

U8

J12-8

4

GENERATOR CPU BOARD DATE DRAWN G. SANWALD 26 APR 2000 CHECKED

X

TUBE 1 / TUBE 2 MISMATCH & THERMOSTAT OPEN SIGNAL FROM MD-0787

13 J1-4

R174 D19

+5V GRN

6

DS31 RED TO 2.1 V CURRENT SINK

RN11C

DS30

DS27 GRN

7 U27

DS26

14

X-RAY J1-14

DS28

9

5

2

4

RN5E

RESET COMMAND TO MD-0759, PAGE 1 & MD-0760, PAGE 2

J10-14

J1-33

RN2A

J3-9

J9-7

J3-7

ENABLE COMMAND TO MD-0764

H.T. TANK

+12V

15

J10-33 U19, U16

D21

TP18 J10-15

J1-15

“PREP ENABLED” DETECTOR CKT (U11B, U10C, ETC)

RN1C 5

1 J10-34

11 12

J1-34

RN4B “GENERATOR READY” DETECTOR CIRCUIT (U10A, Q6, D37, ETC)

J10-16

J

D25

4

2

RN1D

PREP COMMAND TO MD-0764 & MD-0765 D24

U2

18

J1

R133

Q12

J10-35

+/- 12V/SS FAULT FROM MD-0788, PAGE 3 (CONTROL BOARD) J1-16

RN1H 1

5

“X-RAY REQUEST” DETECTOR CKT (U11D, RN7, ETC)

FILAMENT FAULT FROM MD-0760, PAGE 1 STATOR FAULT FROM MD-0764 & MD-0765

U5 J1-35

RN1F

2

4

HIGH KV / INVERTER FAULT FROM MD-0759, PAGE & HIGH MA FAULT FROM MD-0760, PAGE 2

16

HV / MA FAULT TO MD-0760, PAGE 1

TP12 RN1G 1

5

2

4

U3 RN1E

GENERATOR CPU BOARD

J9-9

10

BUFFER AND DRIVER

EXPOSURE ENABLE COMMAND FROM PAGE 1

12

U4

RED

DATA LATCH

1

“KV ENABLED” DETECTOR CKT (U11A, RN8, ETC)

RN2B

8

TO 2.1 V CURRENT SINK

U33F 13

TP10

YEL

PREP

R173

RN2F

KV EN

+12V

J8-4

+5V RN11D

RN11B

+5V

AUXILIARY BOARD

“X-RAY REQUEST” DETECTOR CKT (U10D, RN7, ETC)

TP14 LOGIC “OR / NOR” CIRCUITS (U10B, U14, Q4, Q13, D91, ETC)

17 DRIVE ENABLE COMMAND TO MD-0759, PAGE 1

CONTROL BOARD

DATE DRAWN G. SANWALD 26 APR 2000 CHECKED S. BLAKE 26 APR 00

X

H

+5V

P/S READY

DS17

OPTO-COUPLER “ON” = GENERATOR READY

FROM PAGE 2

J1-3

J10-3

J1-22

J10-22

J5-6

TO 2.1 V CURRENT SINK

J5-7 U24

J5-8

BUFFER 5

1

1

5

2

4

U14

U6 4

2

R9

RED

R8

GRN

19

1

DS18 R10

RN7D

+5V

1

5

2

4

1

5

2

4

U10

U12

J5-9

U3 BUFFER DATA BUS D0..D7

CONTROL BOARD

5

GENERATOR CPU BOARD

5

1

U21

1

4

4

2

5

1

4

2

U11

U13 2

DATA BUS D0..D7

1 TP12

+5V

TB1-1

TP13 J8-4

+5V

J8-5

R66

R67

J8-3

J4-7 J4-8 J4-9

TO GENERATOR INTERFACE BOARD (PG 1)

FOOT SWITCH

PREP

U17

HAND SWITCH

X-RAY

TB1-2

TB1-3

TB1-4

CPU

COM 5 DATA BUS D0..D7

PREP X-RAY

1

U9

5

1

4

2

TB1-5

J6-6

CONSOLE CPU BOARD

J6-8

J6-10

U10 4

2

P1-18

J2-18

J3-6

P1-19

J2-19

J3-8

P1-20

J2-20

J3-10

J3-3

PREP

J3-1

X-RAY COM

J3-5

J7-3

CONSOLE CPU BOARD

J7-2

J7-1

KEYBOARD ASSEMBLY

DISPLAY BOARD

CIRCUITS DASHED LI ON THE CONS

P1-3

P1-2

PREP X-RAY

DRAWN

P1-1

KEYBOARD ASSEMBLY

CIRCUITS SHOWN WITHIN

G. SANWALD CHECKED S. BLAKE

DATE 26 APR 2000 26 APR 00

X

PREP

J5-6

J3-7

P1-7

J5-7

J2-8

P1-5

J5-5

J2-9

J4-7

J4-8

X-RAY

TO GENERATOR INTERFACE BOARD (PG 1)

J4-9

KEYPAD ASSEMBLY PREP HAND SWITCH

SHOWN WITHIN LINES ARE USED TOUCH SCREEN SOLE ONLY.

E NCE

P1-6

X-RAY COM

J3-3 J3-1 J3-5

TOUCH SCREEN INTERFACE BOARD

REMARKS

“LOW” (APPROXIMATELY 1 VDC) AT THESE POINTS INDICATES FOOT SWITCH INPUT CLOSED, PREP SWITCH PRESSED, OR X-RAY SWITCH PRESSED RESPECTIVELY. “HIGH” (APPROXIMATELY 24 VDC OPEN CIRCUIT (I.E. NOT PRESSED) FOOT SWITCH, OR PREP SWITCH, OR X-RAY SWITCH. FOR RAD-ONLY CONSOLE, “LOW” INDICATES PREP SWITCH PRESSED, OR X-RAY SWITCH PRESSED, RESPE

“LOW” (APPROXIMATELY 1 VDC) = AN X-RAY EXPOSURE HAS BEEN REQUESTED VIA ONE OF SEVERAL EXPOSURE INPUTS. “HIGH” (APPROXIMATELY 24 VDC) = NO X-RAY EXPOSURE HAS BEEN REQU EXPOSURE ENABLE LINE. “LOW” (APPROXIMATELY 0 VDC) INDICATES AN X-RAY EXPOSURE REQUEST, “HIGH” (APPROXIMATELY 5 VDC) = NO X-RAY EXPOSURE HAS BEEN REQUESTED.

THE CATHODE OF THE ASSOCIATED LED IS HELD “LOW” UNDER CPU CONTROL DURING AN X-RAY EXPOSURE REQUEST ONLY. NO MEANINGFUL MEASUREMENTS CAN BE MADE ON THIS LINE AS TH DATA LINE. THE REQUIRED DATA IS LATCHED BY THE REGISTER CIRCUIT(S) AT THE APPROPRIATE TIME.

THE OUTPUT OF THE ASSOCIATED LED IS LATCHED BY A REGISTER. THIS IS THEN READ BY THE DATA BUS AT THE APPROPRIATE TIME. AS THIS IS A DATA LINE, NO MEANINGFUL MEASUREMENTS CA MADE AT THIS CONNECTION. DS30 LIT = KV ENABLE REQUEST SENT. THIS IS NECESSARY TO MAKE AN X-RAY EXPOSURE. DS31 LIT = KV ENABLE NOT REQUESTED. DS27 LIT = PREP REQUEST SENT. DS28 LIT = PREP NOT REQUESTED. DS26 LIT = X-RAY EXPOSURE IN PROCESS. “HIGH” (APPROXIMATELY 5 VDC) = KV ENABLED, “LOW” (APPROXIMATELY 0 VDC) = KV NOT ENABLED. “HIGH” (APPROXIMATELY 5 VDC) = PREP REQUESTED. “LOW” (APPROXIMATELY 0 VDC) = PREP NOT REQUESTED. “HIGH” (APPROXIMATELY 5 VDC) = X-RAY REQUESTED. “LOW” (APPROXIMATELY 0 VDC) = X-RAY NOT REQUESTED. “LOW” = X-RAY EXPOSURE REQUESTED AS PER # 3. THIS LINE MUST BE “LOW” IN ORDER FOR THE X-RAY EXPOSURE LED’S ON THE CONTROL BOARD TO BE ENERGIZED (SEE # 16). “LOW” = (APPROXIMATELY 0 VDC) = TUBE 1 / TUBE 2 MISMATCH OR THERMOSTAT OPEN FAULT. “HIGH” (APPROXIMATELY 12 VDC) = NO FAULT. “HIGH” (APPROXIMATELY 12 VDC) = KV ENABLED, “LOW” (APPROXIMATELY 0 VDC) = KV NOT ENABLED. “HIGH” (APPROXIMATELY 12 VDC) = PREP REQUESTED, “LOW” (APPROXIMATELY 0 VDC) = PREP NOT REQUESTED. “HIGH” (APPROXIMATELY 12 VDC) = X-RAY REQUESTED, “LOW” (APPROXIMATELY 0 VDC) = X-RAY NOT REQUESTED. “HIGH” (APPROXIMATELY 5 VDC) = OUTPUT DRIVE ENABLED, “LOW” (APPROXIMATELY 0 VDC) = OUTPUT DRIVE DISABLED.

ALL INPUTS TO THE “GENERATOR READY DETECTOR CIRCUIT” MUST BE AT THE CORRECT LOGIC LEVEL IN ORDER TO BE ABLE TO MAKE AN X-RAY EXPOSURE. THIS MEANS ALL FOUR FAULT INPUTS MUST BE CLEARED, AND THE KV ENABLE AND PREP COMMANDS MUST BE PRESENT.

DS17 LIT INDICATES GENERATOR READY TO MAKE AN EXPOSURE. THIS REQUIRES THAT ALL CONDITIONS PER # 18 BE SATISFIED. DS18 LIT INDICATES A “GENERATOR READY DETECTOR CIRCUIT” I NOT SATISFIED TO ENABLE AN X-RAY EXPOSURE.

DRAWN

G. SANWALD CHECKED S. BLAKE

DATE 26 APR 2000 26 APR 00

X

24 V DC R E T UR N

T2

F5

D3 + 24 V DC

S3

Q1

Q2

R 15

24 V DC S UP P LY F OR S Y S T E M ON/OF F . S E E MD-0788, P AG E 4

L OC K OUT

NOR MA L

D4

S1 OF F

K3

D16 K2

P 1-3

J 3-3

J 5-10

R 13

Q3 J 4-10

X 42 C M ONS OL E

DS 1

S2 ON K1

3 ON

P 1-2

J 3-2

J 5-11

J 4-11

P 1-1

J 3-1

J 5-12

J 4-12

OF F

J W1

N

3

C ONS OLE B OAR D

K E Y B OAR D AS S E MB LY

P 1-3

J 2-3

J 3-9

J 6-9

J 5-10

J 4-10

1

P 1-2

J 2-2

J 3-7

J 6-7

J 5-11

J 4-11

2

P 1-1

J 2-1

J 3-5

J 6-5

J 5-12

J 4-12

R E F E R TO DC B P OWE R DIS T R IB MD-0788, P AG

2

1

J UMP E R P OS IT ION: T O E NE R G IZE K 1 ONLY WHE N T HE C ONS OLE IS S WIT C HE D ON J UMP E R J W1 P INS 1-2 T O E NE R G IZE K 1 AT ALL T IME S T HAT T HE G E NE R AT OR AC MAINS IS ON J UMP E R J W1 P INS 2-3 (K 1 S WIT C HE S T HE 110 & 220 V AC S UP P LIE S T O T HE R OOM INT E R F AC E B OAR D)

OF F

K E Y B OAR D AS S E MB LY

A D-ONL Y ONS OL E

DIS P LAY B OAR D

ON

C ONS OLE C P U B OAR D

P 1-16

J 7-16

J 8-7

J 4-10

P 1-15

J 7-15

J 8-6

J 4-11

P 1-17

J 7-17

J 8-3

J 4-12

OF F

C ONS OLE B OAR D

K E Y B OAR D AS S E MB LY

G E NE R AT OR INT E R FAC E B OAR D

US E DR AWING DC B US & P OWE R DIS T R IB UT ION, MD-0788, IN C ONJ UNC T ION WIT H T HIS DOC UME NT

SCREEN ONS OL E

ON

P 1-2

J 5-2

J 2-10

J 4-10

P 1-3

J 5-3

J 2-11

J 4-11

P 1-4

J 5-4

J 2-12

J 4-12

OF F

K E Y PAD AS S E MB LY

T OUC H S C R E E N INT E R F AC E B OAR D

DR AWN G . S ANWALD C HE C K E D_________ DE S .\MF G .\AUT H.

DAT E 02 J UN 2000 _________

S

NOTE REFERENCE

REMARKS

1

MOMENTARILY PRESSING ON CONNECTS THIS LINE TO “24 VDC RETURN”. THIS LATCHES RELAY DRIVERS ON THE GENERATOR INTERFACE BOARD, ENERGIZING K2 AND K3, AND POSSIBLY K1 (DEPENDING ON JW1 SETTING). SEE NOTE ADJACENT TO JW1 ON THIS DOCUMENT.

2

MOMENTARILY PRESSING OFF CONNECTS THIS LINE TO “24 VDC RETURN”. THIS UNLATCHES RELAY DRIVERS ON THE GENERATOR INTERFACE BOARD, DE-ENERGIZING K2 AND K3, AND POSSIBLY K1 (DEPENDING ON JW1 SETTING).

3

DS1 LIT INDICATES THE PRESENCE OF THE 24 VDC SUPPLY SHOWN. THIS 24 VDC SUPPLY WILL BE PRESENT IF THE GENERATOR IS CONNECTED TO A LIVE AC MAINS SUPPLY.

DATE DRAWN G. SANWALD 02 JUN 2000 CHECKED_________ _________

E ER T

Y TS

OR K

NOTE * TB1-5

J2-15

J9-15

4 TB1-4

J2-16

J9-16

TB2-5

J2-13

J9-13

3

2

+24V

NOTE * +24V

TB2-4

J2-14

J9-14

TB2-7

J2-11

J9-11

4

TB2-6

J2-12

3

2

R66

J9-24

TB3-4

J2-25

J9-25

1

JW10

1

5

2

4

2

JW9

1 1

5

2

4

JW7

1

5 U7, U12, U18, U19, U25

U21 R54

4

2

U31 R56

+24V

U29 R67

J2-24

3

R55

J9-12

TB3-5

4

NOTE *

R53

1

NOTE * 4

3

2

1

JW2

MO

RE

OR CK

AL H2

AL H1

SEE MD-0761

TB3-7

J2-22

J9-22

TB3-6

J2-23

J9-23

E RE

J6-1

U10

D1

J12-2

J6-2

D2

J12-3

J6-3

D3

J12-4

J6-4

D4

J12-5

J6-5

D5

J12-6

J6-6

D6

J12-7

J6-7

D7

J12-8

J6-8

R21 TB4-4

J2-21

+24V

J9-21

5

1

+24V

U14

TB4-5

NOTE *

+24V R29 J2-20

TB4-6

R38

4

2

5

1

4

U13

J9-20 R34

R36

3

R32

TB4-8

J2-19

T2 FROM MD-0787

J9-19 R33

2

+24V

4

2

TB4-7

JW3

1

5

2

4

BUFFER, DRIVER AND ADDRESS DECODER CIRCUITS

U9 R22

U16

1

R37

TB4-9 T1 FROM MD-0787 TB5-12

J2-17

J9-17

TB5-11

J2-18

J9-18

TB6-4

J2-9

J9-9

TB6-3

J2-10

J9-10

+24V

NOTE * +24V

4

NOTE *

3

2

R35

4

3

2

1

JW8

1

JW6

1

5

2

4

U20 TB6-5

J2-8

J9-8

TB6-6

J2-7

J9-7

TB6-8

J2-5

J9-5

TB6-7

J2-6

J9-6

+24V

R68

**

RO

TE P

J12-1

U8

OT

TY

D0

R23

U30, U42, U44 R70

R71

1

5

2

4

R52

U27 R69

DATA BUS DO..D7

+24V

NOTE * TB6-10

J2-3

J9-3

TB6-9

J2-4

J9-4

4

TP14

+24V

NOTE * 4

J2-1 J2-2

3

2

JW15

1

J9-1 J9-2

R77

R76

3

1

JW14

1

5

2

4

2

R75 U28 R74

** U41, U43

ROOM INTERFACE BOARD

THIS PAGE SHOWS THE ROOM INTERFACE INPUTS. ROOM INTERFACE OUTPUTS ARE SHOWN ON PAGE 2

** ADDITIONAL CIRCUITS ARE USED IN THE AREAS INDICATED **. THESE CIRCUITS ARE NOT

GENERATOR INTERFACE BOARD

* 24 VDC EXTERNAL INPUT POSITION FOR JW2, JW3, JW6, JW7, JW8, JW9, JW10, JW14, JW15 SHOWN.

GENERATOR CPU BOARD

* DRY CONTACT INPUT POSITION FOR JW2, JW3, JW6, JW7, JW8, JW9, JW10, JW14, JW15 SHOWN. JUMPER

DRAWN G. SANWALD CHECKED S. BLAKE

DATE 13 APR 2000 14 APR 2000

MD-0788, PAGE 4, ON GENERATOR INTERFACE BOARD

+24V

+24V C2

U6, U7, U11, U12 U24, U25, U34

DRIVE 1

J9-40

J2-40

J9-39

J2-39

J9-30

J2-30

TB1-2

JW12

R2 K1

TB1-1

C1

K1

JW1

1

2

3

4

5

6

7

8

DRY * LIVE * J9-29

DRIVE 2

TB1-11

JW9

R1 K2

TB1-12

J2-29 K2

TB11 J9-28

DRIVE 3 J6-1

J12-1

J2-28

K6 K3

D0

K3 K4

J9-27

DRIVE 4 J6-2

J12-2

J12-3

K1 K4

D1 J9-34

DRIVE 5 J6-3

J2-27

K2

1

2

3

4

5

6

7

8

DRY * LIVE *

2 3

C3

4

TB2-2

JW11

R3 K3

5

TB2-1

C4

J2-34

220 VAC K5

D2

JW2

1

JW3

1

2

3

4

TB10

5

6

7

8

TB2-11

JW10

R4 K4

DRY * LIVE *

TB2-12

1 J9-32

DRIVE 6 J6-4

J6-5

J12-4

J12-5

J2-32

D3

D4

ADDRESS DECODERS, BUFFER, REGISTER, AND DRIVER CIRCUITS

TB3-1

2 K6

3

JW4

J9-31

DRIVE 7

3

4

5

J2-31

6

7

8

TB3-11

5

TB3-12 JW14

C6 J2-35

TB9 K8

D5

R6

1

J9-36

DRIVE 9 J12-7

J2-36

3 K9

D6

JW5

1

2

3

4

J6-8

J12-8

5

6

7

8

TB4-1

K10

24 VDC

TB8 J9-38

DRIVE 11

J2-38

1 K11

2 3

J9-33

DRIVE 12

J2-33

J9-26

DRIVE 1 TO DRIVE 13 = “LOW” ENERGIZES THE RELAYS

TB4-2

NOTE THE FOLLOWING IF USING JW1, JW2, JW3, JW4, OR JW5 IN THE LIVE CONTACT POSITION:

+24V

TB5-2

A JUMPER WIRE MUST BE CONNECTED TO TB11 PIN 1, 2, 3, 4 OR 5 AS APPROPRIATE FROM TB8, TB9, OR TB10 IN ORDER TO SUPPLY 24 VDC, 110 VAC, OR 220 VAC FROM THE SELECTED OUTPUT

JW6

1

2

3

4

K9

TB5-3 LIVE 24 VDC **

K10

TB5-7 TB5-6

5

TB5-5

J2-26 K13

TB5-4

DRY **

4 K12

DRIVE 13

TB4-3

K7

J2-37

D7

TB4-12

DRY * LIVE *

4 5

J9-37

DRIVE 10

K8

JW13

2 J6-7

TB4-11

C5

K6 R5

J9-35

TB3-2

DRY * LIVE *

K7

DRIVE 8 J12-6

2

4

110 VAC

J6-6

1

K5

TB5-8

K12

TB7 1

K11

+24V

2

TB5-10 TB5-9

3

K13

JW7

4

1

2

3

TB5-1

4 +24V

DRY **

5

TB6-1

LIVE 24 VDC ** JW8

1

2

3

4

TB6-2 TB6-11

DRY **

TOR CPU BOARD

GENERATOR INTERFACE BOARD

THIS PAGE SHOWS THE ROOM INTERFACE OUTPUTS. ROOM INTERFACE INPUTS ARE SHOWN ON PAGE 1

LIVE 24 VDC **

ROOM INTERFACE BOARD

*

LIVE CONTACT

LIVE CONTACT

**

LIVE CONTACT 24VDC

DRY CONTACT

TB6-12

LIVE CONTACT 24VDC

DRY CONTACT

DATE DRAWN G. SANWALD 13 APR 2000 CHECKED 14 APR 2000 S. BLAKE

TO PAGE 2 FOR LOGIC LEVELS, ETC, REFERENCED BY ONAL SYMBOL:

+12V

TUBE

SHIF

J3-3

MAIN

R1

J3-9

J1-1 K2

+12V

C3

J1-20

R121

D RN4E R138

J6-10

Q18

J5-10

2

D7

R29

J4-9

J4-9

J3-8

J2-8

R30

Q3

COM

K4

+12V

1

TUBE

K1 STATOR FAULT TO GENERATOR READY DETECTOR CIRCUIT ON CONTROL BOARD, SEE MD-0761

J3-7

SHIF

J3-5

MAIN

K3 TP1

COMMON FROM J1-4. REFER TO LOW SPEED STARTER BOARD ON MD-0788, PAGE 1

JUMPER POSITION: INDICO 100 GENERATORS JUMPER “1.5S” FOR 1.5 SEC BOOST, NO JUMPERS FOR 2.5 SEC BOOST. REFER TO CH. 2 OF SERVICE MANUAL. DO NOT USE JUMPER POSITION “.15S” JW1

1.5S

120 / 240 VAC FROM J1-1. REFER TO LOW SPEED STARTER BOARD ON MD-0788, PAGE 1

TP3 R36

4

BOOST AND RUN LOGIC CIRCUIT (U1, U10, U18 Q2, Q12, ETC.)

.15S

J4-11

J3-7

52 / 73 / 94 VAC FROM J1-3. REFER TO LOW SPEED STARTER BOARD ON MD-0788, PAGE 1

6

J8-4

J1-4

R35

J4-12

J3-6

U2

ZERO CROSS CIRCUIT

F2

Q1

U1

ZERO CROSS CIRCUIT

J2-6

+12V D1

8

K1 J4-6

J4-6

J3-10

+12V

J2-10

D15

D2 J2-9

POWER INPUT BOARD CONTROL BOARD

+12V

TP2

J4-12

Q15 D17

Q2

+12V

R46

ENABLE COMMAND FROM MD-0761, PAGE 2

D18

R45

12 VDC / SOFT START FAULT SIGNAL FROM MD-0788, PAGE 3 +12V

F1

J2-7

TP4 TUBE 1 / TUBE 2 MISMATCH & THERMOSTAT OPEN SIGNAL FROM MD-0787

F3

TP3

J4-11

5

7

COM

J3-1

3

J5-8

R5

J6-8

R1

PREP COMMAND FROM MD-0761, PAGE 2

TUBE SELECT SIGNAL FROM J2-9. REFER TO LOW SPEED STARTER BOARD ON MD-0788, PAGE 1

K4

LOW SPEED STARTER BOARD

AUXILIARY BOARD DRAWN

G. SANWALD CHECKED________

DATE 10 MAR 2000 ________

RN7A

+5V

U24

ROTOR

DS20

DS21

GRN

RED

9

TO 2.1 V CURRENT SINK

OPTO-COUPLER “ON” = NO FAULT

BUFFER 5

1

4

2

J10-1

J1-1

J10-20

J1-20

FROM PAGE 1

U5

BUS D7

E NCE

GENERATOR CPU BOARD

CONTROL BOARD

REMARKS

“HIGH” (APPROXIMATELY 6-11 VDC) = NO STATOR FAULT, “LOW” (<APPROXIMATELY 2 VDC) = STATOR FAULT (LOW OR NO STATOR CURRENT). “LOW” (APPROXIMATELY 0 VDC) = NO STATOR FAULT, “HIGH” (APPROXIMATELY 12 VDC) = STATOR FAULT (LOW OR NO STATOR CURRENT). “HIGH” (APPROXIMATELY 10 VDC) = PREP REQUESTED, “LOW” (APPROXIMATELY 1 VDC) = PREP NOT REQUESTED. “LOW” (APPROXIMATELY 0 VDC) = BOOST REQUESTED, “HIGH” (APPROXIMATELY 12 VDC) = BOOST NOT REQUESTED (BOOST REQUESTED FOR APPROXIMATELY 1.5 SEC AFTER PREP INITIATED). “LOW” (APPROXIMATELY 0 VDC) = RUN REQUESTED, “HIGH” (APPROXIMATELY 12 VDC) = RUN NOT REQUESTED (RUN REQUESTED AFTER BOOST COMPLETE, AND FOR DURATION THAT PREP IS PRE “HIGH” (APPROXIMATELY 12 VDC) = LOW SPEED STARTER ENABLED, “LOW” (APPROXIMATELY 0 VDC) = STARTER DISABLED (SEE # 7).

THIS POINT MUST BE “HIGH” (AS PER # 6) TO ENABLE THE LOW SPEED STARTER. THIS REQUIRES THE ENABLE COMMAND TO BE PRESENT (”HIGH”), AND THE TUBE 1 /TUBE 2 MISMATCH &THERMO OPEN SIGNAL TO BE “HIGH”. IF THE 12 VDC / SOFT START FAULT SIGNAL IS LOW (INDICATING A FAULT), J1-4 WILL NOT BE PULLED LOW DUE TO THE DIODE SHOWN CONNECTED TO THIS PIN ON PAG

“LOW” (APPROXIMATELY 0 VDC) ENERGIZES K1 ON THE LOW SPEED STARTER BOARD, ENABLING THE STARTER. “HIGH” (APPROXIMATELY 12 VDC) DE-ENERGIZES K1 ON THE LOW SPEED STARTER AS PER # 6 AND 7, NO ENABLE COMMAND, OR PRESENCE OF A TUBE 1 / TUBE 2 MISMATCH & THERMOSTAT OPEN FAULT, OR A 12 VDC / SOFT START FAULT WILL INHIBIT LOW SPEED STARTER OPE DS20 LIT INDICATES NORMAL STATOR CURRENTS. DS 21 LIT INDICATES STATOR FAULT, OR LOW SPEED STARTER IS IN STANDBY MODE.

DATE DRAWN G. SANWALD 10 MAR 2000 CHECKED________ ________

CS1, U10, U11 +5V

SW2 *

LS TO 2.1 V CURRENT SINK

DATA LATCH

U19, U16

R40 J10-2

J1-2

J10-21

J1-21

2

J4-6

J1-6

J4-8

J1-8

PREP COMMAND FROM MD-0761

R96

CONTACTOR CLOSED SIGNAL FROM MD-0788, PAGE 3

J1-2

J4-4

J1-4

IGBT SWITCH (Q1)

IGBT SWITCH (Q3)

6 1

5

2

4

560 / 650 VDC (-) U13

+12V

T

DUAL SPEED STARTER CPU, BUFFERS, DRIVERS

PREP INITIATED

J1-14

J4-16

J1-16

1

5

2

4

D47

Q5 K2

TB2-2 K6

+12V K5

R32

C22

TUBE 2 SELECT

TUBE 1/TUBE 2 SELECT SIGNAL FROM MD-0788, PAGE 3

K3 K6

DS21

HIGH SPEED PHASE SHIFT CAPACITOR

TB2-1

K1-B

K4

RED

K2-B

J10-1

BUFFER 5

J10-20

J1-20

RN4E

K3 J4-10

J1-10

TB3-2

7 LOW SPEED PHASE SHIFT CAPACITOR

R138

TB3-1

Q18

STATOR FAULT TO GENERATOR READY DETECTOR CIRCUIT ON CONTROL BOARD, SEE MD-0761

GENERATOR CPU BOARD

S

R1

+12V R121

2

TB3-3

J1-1

1

U5 4

C

TU

+12V

OPTO-COUPLER “ON” = NO FAULT

S

K2-A

K1 U14

+5V

TB2-3

K1-A

K5

R42 J4-14

4

TO 2.1 V CURRENT SINK

IGBT SWITCH (Q4)

R41 J4-2

3

RN7A

4

IGBT SWITCH (Q2)

+12V

R94

8

2

DRIVER CIRCUIT AND FAULT CURRENT LATCH (U1-U10, T1-T4, ETC).

HIGH SPEED SELECT

Q7

U24

5

K4

D47

ROTOR

1

U12

+12V

GRN

5

U17, U18 U19, U22, U24

BUFFER AND DRIVER

DS20

560 / 650 VDC (+)

R31

U27

R24

HS

1

DS1 INVERTER FAULT

DS7

DS8

INVERTER FAULT DETECTOR

+5V

RN7G

SW1 *

CONTROL BOARD

DUAL SPEED STARTER BOARD

* REFER TO CHAPTER 2 OF SERVICE MANUAL FOR THE PROCEDURE TO SET DIP SWITCHES SW1 AND SW2

DRAWN

G. SANWALD CHECKED STEVE BLAKE

DATE 30 MAR 2000 30 MAR 2000

C

E NCE

REMARKS

DS8 LIT INDICATES HIGH SPEED SELECTED, DS7 LIT INDICATES LOW SPEED SELECTED. “HIGH” (APPROXIMATELY 5 VDC) = HIGH SPEED SELECTED, “LOW” (APPROXIMATELY 0 VDC) = LOW SPEED SELECTED. “LOW” (APPROXIMATELY 7 VDC) = CONTACTOR CLOSED AND PREP REQUESTED. THIS INITIATES THE BOOST CYCLE. “HIGH” (APPROXIMATELY 12 VDC) = BOOST NOT REQUESTED (PREP COMMAND N RECEIVED, OR CONTACTOR IS NOT CLOSED). “LOW” (APPROXIMATELY 0 VDC) = TUBE 2 SELECTED, “HIGH” (APPROXIMATELY 12 VDC) = TUBE 2 DESELECTED. THIS CONDITION DEFAULTS TO TUBE 1.

DS1 LIT INDICATES AN INVERTER CURRENT FAULT. POSSIBLE CAUSES INCLUDE INCORRECT DIP SWITCH SETTINGS FOR THE TUBE IN USE (SEE ** ON PAGE 1), INCORRECT STATOR IMPEDANCE, OR DEFECTIVE STATOR CABLE. K4 OPEN CIRCUITS THE STATOR COMMON LEAD AT ALL TIMES THAT THE DUAL SPEED STARTER IS IN STANDBY MODE. “LOW” (APPROXIMATELY 0 VDC) = NO STATOR FAULT, “HIGH” (APPROXIMATELY 12 VDC) = STATOR FAULT (LOW OR NO STATOR CURRENT). DS20 LIT INDICATES NORMAL STATOR CURRENTS. DS21 LIT INDICATES STATOR FAULT, OR DUAL SPEED STARTER IS IN STANDBY MODE.

DRAWN

G. SANWALD CHECKED STEVE BLAKE

DATE 30 MAR 2000 30 MAR 2000

DS15

DS19

TXD

RXD R43

U20

UART

+5V

LS1 R46

+5V

U11 RS-232 TRANSMITTER / RECEIVER

U7

RN3E RN3F RN3G RN3H

J11-3

P1-3

J11-7

P1-7

J11-2

P1-2

J11-8

P1-8

RS-232 RECEIVER / DRIVER

MICROCONTROLLER (CPU, EPROM **,

J1-1

J2-1

J1-2

J2-2

J1-3

J2-3

J1-4

J2-4

J1-5

J2-5

J1-6

J2-6

J1-7

J2-7

J1-8

J2-8

J1-9

J2-9

J1-10

J2-10

J1-11

J2-11

J1-12

J2-12

J1-13

J2-13

J1-14

J2-14

ADDRESS DECODERS & LOGIC CIRCUITS) U1, U2, U3, U4

LED DISPLAYS DATA LATCHES (U6-U9)

(7 SEGMENT DISPLAYS & STATUS LEDs) DS1-DS23

DRIVERS (U1-U4, U10)

U5

** U3 IS THE EPROM. BUFFER

DATA & ADDRESS BUS

GENERATOR CPU BOARD

J1-1

P1-1

J1-2

P1-2

J1-3

P1-3

J1-4

P1-4

J1-5

P1-5

J1-6

P1-6

J1-7

P1-7

J1-8

P1-8

J1-9

P1-9

J1-10

P1-10

REMOTE FLUORO DISPLAY BOARD

REMOTE FLUORO CONTROL BOARD

FRONT PA KEYBOA SWITCH

KEYBOARD ASSEMB

REMOTE FLUORO CONTROL UNIT

OUBLESHOOTING CAN BE PERFORMED ON THE REMOTE FLUORO CONTROL ASSEMBLY IN THE FIELD. THE DC RAILS CAN BE CHECKED (REFER TO MD-0788), D AND RXD LEDs ON THE GENERATOR CPU BOARD MAY BE OBSERVED (THESE WILL FLASH ON AND OFF TO INDICATE DATA FLOW). MEANINGFUL MEASUREMENTS MADE ON COMMUNICATIONS, DATA, AND CONTROL LINES.

DRAWN

G. SANWALD CHECKED _________

DATE 02 JUN 2000 _________

R

+24V

+15V

+5V J13-11 J13-13 J13-17 J13-15

-15V

RN14H

D0

RN14G

D1 RN14F

D2

RN14E

D3 RN14D

D4

RN14C

D5 RN14B

D6

RN14A

D7

J6-1

J12-1

J6-2

J12-2

J6-3

J12-3

J6-4

J12-4

J6-5

J12-5

J6-6

J12-6

J6-7

J12-7

J6-8

J12-8

J6-9

J12-9

RN4A RN4C RN4E RN4G

RN3A

J13-1 RN4B

RN3B

RN4D

RN3D

RN4F

RN3F

RN4H

RN3H

RN3C

J13-2 J13-3

RN3E

J13-4 J13-5

RN3G

J13-6 J13-7 J13-8

J13-10

WRITE ENABLE

J6-11

J12-11

READ ENABLE

J6-13

J12-13

J13-12

RESET

J6-20

J12-20

J13-16

J6-15

J12-15

J7-20

J11-20

R91

ADDRESS LATCH ENABLE

HV ON SIGNAL FROM MD-0759, PAGE 1

4 5

6

DS40

U45B

1 2

3

U28 CPU

2

J13-18 J13-19

EXPOSURE ENABLE COMMAND TO MD-0761, PAGE 1

J13-14

“DIGITAL IMAGING” ABS TO MD-0758

J13-20

CONTINUED ON PAGES 2 TO 6

J13-22

3

SYNC R97 5

1

4

2

U45A

3

R84

RN19D

+5V

R115

J7-15

2

J11-15

JW22

1

U51 JW3

1

LINE SYNC FROM MD-0788, PAGE 4

JUMPER POSITION: INTERNAL (LINE SYNC) JUMPER PINS 1-2 EXTERNAL (DIGITAL IMAGING SYNC) JUMPER PINS 2-3

JUMPER POSITION: INVERTED SYNC JUMPER PINS 1-2 NON-INVERTED SYNC JUMPER PINS 2-3

J13-9 J13-21 J13-23

DATA, ADDRESS, AND CONTROL BUS

GENERATOR CPU BOARD

GENERATOR INTERFACE BOARD

DRAWN

G. SANWALD CHECKED KVR

DATE 16 MAY 2000 17 MAY 2000

+5V

+15V

+24V

J1-11 J1-13 J1-17 J1-15

TP1 -15V

TP2

U7 R2

+24V

J2-20

MUX

R3

J2-21

R11

J1-20 +24V J1-14

5

2

4

R1

1

U16

DS4

DS6

EXON

J1-1

U4

PFL

DS7

DS8

HCF

F1

PREP

U6

J2-1 +24V

DS9

DS10

GEN READY

TOMO

R17

2

+24V

+24V R16

4

U10

1

+24V R15

1

+24V R14

6

5 JW1

+24V

R12

J1-19

U3B

+24V

R10

2 4 5

+24V

R13

3

J2-7

J1-2 J1-3 J1-5 J1-6 J1-7 J1-8

1

5

2

4

U14

J2-3

J1-4

ADDRESS DECODER CIRCUITS (U1, U2, U3A, U6A)

DATA LATCH

J2-4

DRIVER

J2-5 J2-6 J2-22

J1-10 J1-12

+24V

J1-16

+24V U8

BUFFER

5

1

4

2

J1-9

R7

R6

J1-18

J2-9 DS1 U13

J1-21

OFL +24V +24V

SW1 5

1

4

2

BUFFER

R8

U9

R5

J1-23

J2-23 DS2 U12

STOP EXP.

J2-2

+24V

5

1

J2-12

DS3 U11

4

J2-10

R9

R4

+24V

O.EXP

2 J2-11

DIGITAL I/O BOARD

THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 733752. DATE DRAWN G. SANWALD 16 MAY 2000 CHECKED KVR 17 MAY 2000

+24VR +5V

+15V

+24VR

+24VR

+24V

J3-25 J1-11

J3-27 J3-29

J1-13 J1-17

J3-31

D6

F1

J3-33

J1-15

D5

R10

J3-35

-15V

D3 12 U10D 11 13

J1-19

R9

Q1 U17 MONOSTABLE TIMER D4 U14

U16

DATA LATCH

DRIVER

J1-1 J1-2 J1-3 J1-4 J1-5 J1-6

+24V

ADDRESS DECODER CIRCUITS (U1, U2, U9, U10C)

J1-7

R15

J1-8

+24VR

J1-10 U13

J1-12

R13

U15

J3-34

Q2

J3-32

J1-16

J3-30

J1-18

D1 DATA LATCH

J3-28

DRIVER

J3-26 J3-36

+24V +24VR

+24VR

+24VR

+24VR R14

U12

R12 Q3

J1-9

BUFFER

5

J1-21

1

R1

U3

J1-23

1

U4 4

U11

5

R2

1

4

2

J3-47

U5 4

2

5

R3

2

D2 J3-41 J3-39

SW1

J3-37 J3-38 BUFFER

J3-40 J3-42 J3-44 5

1

U6

R4

5

1

U7 4

2

R5

5

1

4

2

R6

J3-46

U8 4

+24VR

2

J3-45

R16

J3-43

J3-48

J1-22 J1-20

DIGITAL I/O BOARD

THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 733947, 735921. DATE DRAWN G. SANWALD 16 MAY 2000 CHECKED KVR 17 MAY 2000

+24V

+5V

+15V

J1-11

U12

J1-13

+5 V REGULATOR

J1-17

F1

+5V(A)

+24V

J2-14

J2-21

+15V

J2-8

J1-1 J1-2

1

5

2

4

U4

J1-4

U6

J1-7 J1-8

J2-22

1

5

2

4

DS4

J1-5 J1-6

+15V

U7

J1-3

U10

R2 ADDRESS DECODER CIRCUITS (U1, U2, U3A, U5A)

DATA LATCH

DS3

DRIVER

R1

J1-10

J2-11 J2-13

+24V

J1-12 R9

J1-16

DS2

R8

J1-18

1

4

2

R6

5

J2-15 J2-4

R7

J1-14

J2-5

U16

5

U8

1

J2-6 U14

J1-9 J1-21

4

2

5

1

J2-16

BUFFER

J1-23

J2-18 U15

+5V(A) U9

SW1

5

4

1

2

J2-17 J2-19

U11 +24V

BUFFER 5

1

4

2

4

2

DS5 R3 J2-9

U13 DS1 R4

J2-12

R5

DIGITAL I/O BOARD

THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 735406. DRAWN

G. SANWALD CHECKED KVR

DATE 16 MAY 2000 17 MAY 2000

+24V

F1 +5V

+15V

+24V

J2-13 J2-7 J2-8

J1-11

J2-9

J1-13

J2-12

J1-17

J2-5

J2-6

J2-20

+15V 5

1

U6

J1-2

1

5

4

2 R1

J1-4

2

J2-22

+15V U7

DS3

U4

J1-3

J2-24

+15V U10

J1-1

1

5

4

J1-5

R2

J1-6

ADDRESS DECODER CIRCUITS (U1, U2, U3A, U5A)

J1-7 J1-8

DATA LATCH

2

J2-21

+15V U13

DS4

1

5

4

R7

2

J2-23

+15V U14

DS7

DRIVER

1

5

2

4

4

U15

DS8 R8

J1-10

DS9

J1-12

J2-1

R9

J1-16 J1-18

9 10

8

J2-2

12 13

11 U3D

U3C

J2-3

J1-19 J2-4

J2-11

U8

J2-15

J1-9 J1-21

J2-16 BUFFER

J1-23 J2-17

J U9

J2-18

SW1 +24V

J2-19 5

BUFFER

1

J U11

+24V 5

1

4

2

4

2

DS5 R3

J2-10

R4

U12 DS6 R5

J2-25

R6

DIGITAL I/O BOARD

THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 736153 DRAWN

G. SANWALD CHECKED KVR

DATE 16 MAY 2000 17 MAY 2000

+5V +15V +24V

U1

U12 J2-8

J1-11

*

DS38

J1-13

*

J2-21 DS40

DRIVER

J1-17

J2-9

*

DS41

*

J1-15

+24V

J2-22 DS43

*

J2-13

J2-23

J2-1

U9

DS45

*

U11

-15V

DS16

J2-17

*

*

DS20

DRIVER

*

J2-3 DRIVER

DS21

*

J2-15

J1-1

DS22

*

J2-2

J1-2

J3-27

J2-3

J3-9

J2-4

J3-28

J2-5

J3-10

J2-6

J3-29

J2-7

J3-31

J2-8

DS23

*

J2-14

J1-3

J2-2

DS18

J2-4 J2-16

J3-8

DS24

J2-9

J2-1

J1-4

J2-10 U3

J1-5

DS29

DS27

DS33

DS31

DS35

DS37

DS36

DS39

J1-6

*

J1-7

CPLD

*

*

*

*

*

*

*

U10

J1-8

*

J1-12

DS25

*

J1-18 J1-19

DRIVER

*

DRIVER

DS28

*

J1-22

DS30

*

*

J2-14 J2-15 J2-16

J3-2 J3-20

J2-19

J3-1

J2-17 J2-18 J2-19

DS6

DS4

J2-20 DS34

*

+24V

+24V

J3-22

J2-6

J2-7 DS32

J2-12

J3-21

J2-18 DS26

J2-11

J3-4 J3-3

J2-5

J1-10

J3-23

DS11

DS8

*

*

*

DS13

*

DS17

DS14

*

*

DS19

J2-20

*

J2-21

U2

J2-22 J3-5

U17 R77

*

DS1

*

R78 Q1

DS46

DRIVER

DS3

*

DRIVER

R72

J2-23

J3-24

J2-24

J3-6 DS5

*

J3-25 DS7

J3-7

*

D3

J2-25

DS10

*

J3-26 DS12

5

1

4

2

5

1

U15

33

2

J3 -

-1 J2

-2 J2

30 J3 -

32

10 J2 -

J3 -

1

2

1

1

5

4

U6

DS44 5

U

2

1

1

4

U4

DS9 5

U

1

1

5

U

1

1

DS2

R63 D2

U

U

D1 J1-20

4

1 -1 J2

+15V

DS42 5

1

4

2

5

1

U13

DS15 5

1

4

2

U8 R30

-15V J1-14 J1-9 U5

J1-21

U7 4

J1-23

2

R17

U16 4

2

R25

J5-1 24V FROM ROOM INTERFACE

U14 4

2

R69

4

2

J5-3

R68

DIGITAL I/O BOARD

THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 736894

* DUE TO SPACE RESTRICTIONS, SERIES RESISTORS ARE NOT SHOWN FOR THE INDICATED LED’S

DRAWN

G. SANWALD CHECKED KVR

DATE 16 MAY 2000 17 MAY 2000

NOTE REFERENCE K1

1

D36 LIT INDICATES RAD OR PULS MODE. D36 NOT LIT INDICATES C FLUORO MODE.

2

“LOW” (APPROXIMATELY 0 VDC) = RESONANT BOARD ENERGIZED I FLUORO MODE. “HIGH” (APPROX = K1 ON RESONANT BOARD DE-E CONTINUOUS FLUORO MODE.

3

“LOW” (APPROXIMATELY 0 VDC) = MODE SELECT BOARD ENERGIZE LOW POWER RAD MODE (< 20 kW (APPROXIMATELY 12 VDC) = K1 O SELECT BOARD DE-ENERGIZED I RAD MODE (> 20kW APPROX).

R44

+12V

+12V

D36 J2-1

1

M J1-5 (AUXILIARY RD), SEE MD-0788, PAGE 3

RAD MODE

J2-2

R79

THESE CIRCUITS USED ON R&F GENERATORS ONLY

J2-1 K1

J2-2

Q5 R47

2

RESONANT BOARD

+12V

D38 J10-1

D44

J10-2

J3-1

K1

J3-2

THE POWER MODE SELECT BOARD IS USED ON 65 / 80 kW GENERATORS WITH THREE INVERTER BOARDS ONLY

D1

R69

Q4

3

R66

M J1-3 (AUXILIARY RD) SEE MD-0788, PAGE 3

REFER TO MD-0759 PAGE 2

REMARKS

AUXILIARY BOARD ENERGIZING K1 DISABLES DRIVE TO INVERTER BOARD No. 3

INVERTER DRIVE SIGNAL FROM MD-0759

CONTROL BOARD

J12-1

J1-1

J12-2

J1-2

J12-3

J1-3

J12-4

J1-4

K1

POWER MODE SELECT BOARD

J4-1

J1-1

J4-2

J1-2

J4-3

J1-3

J4-4

J1-4

INVERTER DRIVE SIGNAL TO MD-0759

INVERTER BOARD

DRAWN

G. SANWALD CHECKED________

DATE 21 MAR 2000 ________

R PO

4

+12V

D42 R41

JW4

JUMPER POSITION: R&F GENERATORS (WITH THERMAL SWITCH) JUMPER JW4 PINS 1-2 (ON) RAD GENERATORS (NO THERMAL SWITCH) JUMPER JW4 PINS 2-3 (OFF)

ON OFF 3 1 2

R39

+12V

THERMAL CUTOFF OPEN

R40

J2-4

R43

Q10

J2-3

+12V

D26 R6 +12V 1

5

1 / TUBE 2 ID DRIVE TS SEE , PAGE 1

2

4

1

5

2

4

TUBE 1 / TUBE 2 TELLBACK LOGIC CIRCUIT (U9, U10, R84)

R7

Q8 +5V RN7H

U7

TUBE 1 / TUBE 2 MISMATCH & THERMOSTAT OPEN SIGNAL TO MD-0764 AND MD-0761, PAGE 2

5

R8

THERMAL SWITCH ON INVERTER HEATSINK (R&F UNITS ONLY)

INVERTER BOARD U8

TUBE 1 / TUBE 2 RELAY CONTACTS (SHOWN IN TUBE 1 POSITION)

J5-1

J11-1

J4-20

J4-20

J5-2

J11-2

J4-19

J4-19

TUBE 1 / TUBE 2 SELECT COMMAND FROM MD-0788, PAGE 1

R28

TUBE 2 SELECTED

1

TUBE 2 U35

+12V

D39 R38

DS5

TUBE 1 / TUBE 2 SELECT SIGNAL FROM MD-0788, PAGE 3

3

DECODER/ DEMULTIPLEXER J1-2

J8-2

J2-5

J3-5

J1-1

J8-1

J2-13

J3-13

2

1

5

2

4

U3

OPTO COUPLER “ON” = TUBE 2 SELECTED

H.T. TANK

POWER INPUT BOARD

AUXILIARY BOARD

CONTROL BOARD

GENERATOR CPU BOARD

MD-0763 (ROOM INTERFACE) FOR INTERLOCKS ACCESSED VIA THE ROOM INTERFACE BOARD

TE ENCE

TUBE 1 STATOR TERMINAL BLOCK J5-1

REMARKS

THERMAL SWITCH

“LOW” (APPROXIMATELY 0 VDC) = TUBE 2 SELECTED, “HIGH” (APPROXIMATELY 10 VDC) = TUBE 1 SELECTED. “LOW” (APPROXIMATELY 0 VDC) = TUBE 2 SELECTED, “HIGH” (APPROXIMATELY 12 VDC) = TUBE 1 SELECTED.

J5-2

TUBE 2 STATOR TERMINAL BLOCK

DS6 LIT INDICATES TUBE 1 SELECTED. DS5 LIT INDICATES TUBE 2 SELECTED. NEITHER LED LIT INDICATES A MISMATCH BETWEEN THE TUBE THAT HAS BEEN REQUESTED, AND THE TUBE THAT HAS ACTUALLY BEEN SELECTED (SEE # 5). “LOW” (APPROXIMATELY 0 VDC) = INVERTER THERMAL SWITCH CLOSED (OR JUMPERED VIA JW4), “HIGH” (APPROXIMATELY 12 VDC) = INVERTER THERMAL SWITCH OPEN, OR JW4 JUMPER OMITTED ON RAD GENERATORS.

TUBE 1 TH ON MD

J5-3

TUBE 2 TH ON MD

THERMAL SWITCH

J5-4

THE TUBE 1 / TUBE 2 TELLBACK LOGIC CIRCUIT ENSURES THAT THE TUBE ACTUALLY SELECTED MATCHES THE TUBE THAT WAS REQUESTED. FOR EXAMPLE, IF TUBE 2 WAS REQUESTED BY THE CONSOLE BUT TUBE 1 WAS ACTUALLY SELECTED BY THE H.T. TANK, THE LOGIC CIRCUIT WILL INDICATE A FAULT CONDITION.

GENERATOR INTERFA

DRAWN

G. SANWALD CHECKED S. BLAKE

DATE 18 MAY 2000 18 MAY 2000

3 PHASE AC MAINS INPUT

PHASE 2

F5A

PHASE 3

F5C

K1

GROUND

R11

R10

NEUTRAL

~ ~ ~

F2

D3

K1

S.S. OK

JW2 1

1 J4-10

J4-8

J4-8

-

5

4

2

U2 +12VDC OK

D2

K2

DC BUS OK

E2 -

E16

E9

F2

E8

E10

F1

4

5

2

1

380/400/480 VAC

J6-1

3

J6-5

D9

120 VAC

J6-6

J4-13

J4-2

J4-2

73 VAC

K5

D4 J4-13

52 VAC

J2-2 P2-2 J6-7

F1

J5-3

J1-3

J5-4

J1-4

K2 D8

SOFT START FAULT SIGNAL TO AUXILIARY BOARD, PAGE 3

R1, R2 K1

J4-1

J4-1

J4-4

J4-4

4

D5

TP1

5

TUBE 1 / TUBE 2 SELECT COMMAND TO MD-0787

RETURN

J1-1

F4 +12V K1

+12V

+12V

F1

J4-3

J4-3

J3-3

J2-3

J4-14

J3-4

J2-4

J4-15

J4-15

J3-2

J2-2

J4-16

J4-16

J4-18

J4-18 J3-9

J2-9

J4-17

J4-17

K3

TP4 TP1

REFER TO MD-0764

J10-3

J4-5 D6

J1-6

J1-5

J1-3

K3

K4

J11-4

J5-4

F2

J5-6

J11-6 R&F GENERATORS ONLY

J5-4

FAN(S) USED ON FLU ONLY. DEPENDING O ONE, TWO, OR THRE

J10-1

+12V

6 J4-5

COM

LOW SPEED STARTER B K4

FLUORO FAN TIMER / DRIVER CIRCUIT (U11, Q9, ETC)

52 / 73 / 94 F3

+12V

+12V D37 FLUORO FAN ON

120 / 240 VAC F2

+12V

J4-14

D7

R72

T1

208 VAC

N/C

J2-1 P2-1 CNCTR CLOSED

D2

*

94 VAC

R31

SOFT START DRIVER CIRCUIT (U3B, Q6, ETC)

I

IN

240 VAC

+12V

POSITION: GENERATORS 2 R PINS 2-3 GENERATORS 3 R PINS 1-2

J5-3

+ -**

560 VDC

DUAL SPEED STARTER BOARD

DC BUS DISCHARGE CIRCUIT (Q1, D10)

1 U1

+12V

E1 +

INVERTER BOARD

E2 -

+12V

J4-10

E1 +

INVERTER BOARD

R12

2

DC BUS OUT

F1

R48

SOFT START OK PROTECTION CIRCUIT (U1C, Q7, ETC)

3 PHASE INDICO 100 GENERATORS USE ONE INVERTER BOARDS DEPENDING ON GENERAT

E11

DC BUS CHARGED SENSING CIRCUIT (R5-R8, D3)

+12V

JW3 1 POSITION: ENERATORS 2 R PINS 2-3 ENERATORS 3 R PINS 1-2

+ R20

F5B

E23 R18, R19

O PAGE 5 FOR LOGIC LEVELS, TC, REFERENCED BY NAL SYMBOL:

D1

R16, R17

K5

PHASE 1

AUXILIARY BOARD

E21

THREE FAN UNITS ONLY

E17

240V

AND T2 MUST BE TAPPED IN ACCORDANCE WITH THE NOMINAL AC MAINS VOLTAGE. FER TO CHAPTER 2 OF THE GENERATOR SERVICE MANUAL.

IS VOLTAGE IS APPROXIMATELY 560 VDC FOR 400 V GENERATORS, AND APPROXIMATELY 0 VDC FOR 480 V GENERATORS

J8-3

TAPPED * T2FOR(SHOWN 400 VAC MAINS)

200V FROM PAGE 3

***

J8-1 F3

J7-1 J7-3

180V

J7-5 0V 240V 200V

CONTINUED ON PAGE 4

H.T. TANK

TUB S (TW TA

OPTIONAL 400/480 VAC *** 480 VAC GENERATORS ***

230/277 VAC NEUTRAL

OPTIONAL

GROUND

ROOM INTERFACE CHASSIS

3 PHASE POWER INPUT BOARD (REFER TO PAGE 2 FOR 1 PHASE POWER INPUT BOARD)

DRAWN

G. SANWALD CHECKED________

DATE 10 MAR 2000 ________

D

K5

1 PHASE AC MAINS INPUT

F5A

LINE 2

F5B

ONE OR TWO INVERTER MODULES DEP ON GENERATOR OUTPUT POWE

E33 MAINS RECTIFIER

230 VAC

E34

BUS CAPACITORS

R11

R10 K1

P1-4

P1-1

J12-4

J12-1

NO CONNECTION

DC BUS CHARGED SENSING CIRCUIT (R6-R8, R16-R21, D3, ETC)

5

1

4

2

J4-8

380/400/480 VAC TAPS

J6-5

120 VAC

J4-2

J6-6

52 VAC J6-7

K5

J5-4

D8 +12V

+12V

J4-4

J3-3

F4

K1

J4-14

J4-15

J4-15

J4-16

J4-16

J4-18

J4-18

J4-17

J4-17

LOW SPEED STARTER BOARD REFER TO PAGE 1

J3-4

D5

J4-14

RETURN

J5-3

J4-1

J4-3

F1

J2-2 P2-2

K2

J4-3

73 VAC

D2

K2

D4

J4-2

CONTINUED ON PAGE 3

94 VAC

DC BUS OK J2-1 P2-1

J4-13

*T1

208 VAC

U1

+12V

J4-4

J6-1

240 VAC

1

J4-1

E2 -

J4-10

J4-13

E1 +

INVER BOA

J6-3

F1

J4-8

E1 +

INVERTER BOARD

DC BUS ASSEMBLY

F2

J4-10

650 VDC OUT

VOLTAGE DOUBLER CIRCUIT

GROUND

J3-2

R12

LIARY BOARD ER TO PAGE 1

LINE 1

D9

+12VDC OK

J3-9 +12V

D7

J10-3

K3

K4

FAN(S) USED ON FLUORO GENERATORS ONLY. DEPENDING ON THE APPLICATION, ONE OR TWO FANS MAY BE USED

J10-1

+12V K3

6 J4-5

J4-5

D6

ST BE TAPPED IN ACCORDANCE WITH THE NOMINAL VOLTAGE. REFER TO CHAPTER 2 OF THE GENERATOR MANUAL.

J11-4 J11-6

K4

H.T. TANK REFER TO PAGE 1

J8-3 E21

E17

J8-1

240V

TAPPED * T2FOR(SHOWN 240 VAC MAINS)

F3

J7-1 J7-3

200V

OPTIONAL 230 VAC

J7-5

230 VAC

OPTIONAL

GROUND

180V

ROOM INTERFACE CHASSIS 0V 240V 200V

CONTINUED ON PAGE 4

1 PHASE POWER INPUT BOARD DATE DRAWN G. SANWALD 10 MAR 2000 CHECKED________ ________

D

+35V

26 VAC

J7-6

C22

R65

J7-3

C21

R64

0V

R71

F4

D31

+5V

J6-4

J7-4

U34

J6-5

J7-5

+5 V REGULATOR

+/-35V

TP16

F3

FROM PAGE 1, 2

J6-1

15 VAC F1

J7-4

U5,U6

-35V

C24, C25

J7-5 15 VAC F2

TO PAGE 1

-12V

R70

TP1 TP15 J6-2 J6-3

D29

J4-1

J7-1

+12V

+12 VDC REGULATOR

0V

J7-2

-12V

J7-3

D27 +12V

U4

D33

R68

-12 VDC REGULATOR D16

D30

C19

+12V

-12V

TO MD-0786

+12V

+12V

D28

TP5 J7-2

-12V

J1-1

J4-3

J1-3

J4-5

J1-5

J4-7

J1-7

J4-9

J1-9

J4-11

J1-11

J4-12

J1-12

J4-13

J1-13

J4-15

J1-15

J4-17

J1-17

J4-19

J1-19

R32

+12V

D1

+12V

+/- 12V/SS FAULT

5.1V REF J5-3

J5-7

J5-6

J5-4

J1-5

J1-6

J1-3

J6-7

J6-6

J8-3

J8-5

J8-6

J6-4

J6-3

+

9

18

TUBE 1/TUBE 2 SELECT SIGNAL TO MD-0765

FLUORO RAD

+

JUMPER POSITION: RAD GENERATORS JUMPER "RAD" R&F GENERATORS JUMPER "FLUORO"

+12V

U3D

2

12VDC / SOFT START FAULT SIGNAL TO MD-0764, PAGE 1

SOFT START FAULT SIGNAL FROM AUXILIARY BOARD, PAGE 1

R227

R217 1

J1-4

J9-3

J1-3

J9-2

J1-2

J9-5

J1-5

-35V

AUXILIARY BOARD

1

2 U41

-12V -35V

+35V

J1-6

J1-10

J1-29

J1-18

J1-19

J2-14

J2-6

J2-15

J2-7

J1-4

J10-25

J10-6

J10-10

J10-29

J10-18

J10-19

J3-14

J3-6

J3-15

J3-7

+15V

R10

F1

FILAMENT BOARD

J1-25

R11

+12V

J1-6

J1-1

R2

F2

TP2 J9-6

R225

U40

J9-4

-12V

5

4

R228

1 U7

5

R226

4

J1-1

U3A

+12V

R223 5

RN2C

RN2D

+35V J9-1

R27, R32

RN4F

DUAL OPTIO STARTE INDICO

+

R21

R20

2

DUAL SP

U3C

+12V

R22

4

+/- 12V/SS FAULT TO GENERATOR READY DETECTOR CIRCUIT ON CONTROL BOARD, SEE MD-0761

CONTROL BOARD

-12V

+12V

+12V

J6-5

-

JW1

Q1

J5-5

+35V

8 5

D19

AUXILIARY BOARD -

F2

ONE F STAND GENERA FILAMEN

+12V

J1-3

5

+5V

DS34

DS35

GRN

RED

15

TO 2.1 V CURRENT SINK

DATA LATCH, BUFFER, & DRIVER

U27, U19 & U16

4

5

2

1 U17

11

DRIVER

DRIVER

U16

U16 TUBE 1/TUBE 2 SELECT SIGNAL TO MD-0787

DS22

FLUORO

16

*

BIT 0

DATA LATCH & BUFFER

U27, U19 BIT 2

DATA LATCH

-35V

R14

J1-6

FILAMENT BOARD

Q1 DS23

FLUORO TO 2.1 V CURRENT SINK

DS2

LOW

17

U24 BUFFER

TP2

+5V

R9

12

P/S ON -15V

+5V

12

11

R13

10

R33

4

-12V

J1-5

D1

Q4 1

F1

+5V

RN11I

U9 2

J1-2

13

RN11A

10

V NT

J7-1

D32

CONTACTOR CLOSED SIGNAL TO MD-0765

D

26 VAC

+12V

+12V

T1

DS4

HIGH TO 2.1 V CURRENT SINK

*

THE POWER SUPPLY ON COMMAND (P/S ON) WHICH ENERGIZES K1 / K2 ON THE POWER INPUT BOARD IS ISSUED BY THE GENERATOR CPU BOARD AFTER THE +5 VDC RAIL IS DETECTED BY THE CPU. THE DC RAILS, INCLUDING THE +5 VDC RAIL, ARE ESTABLISHED WHEN THE SYSTEM ON COMMAND IS RECEIVED. REFER TO MD-0762.

DATA LATCH

U27

U49

BIT 7

BIT 3

DATE DRAWN G. SANWALD 10 MAR 2000 CHECKED________ ________

D

24 VDC RETURN K3 24 VDC

D3 C10

F3 K2

J1-4

D1

C16

0V F4

J1-7

F2

J1-9

F1

+12V

300 VAC BACKLIGHT POWER SUPPLY (Q7, Q8, T1, C57, ETC)

-12V

TP5

110 VAC

U40

220 VAC

FLUORESCE

J10-4

LINE SYNC TO MD-0767

ZERO CROSS DETECTOR

220 VAC

220 VAC

R4

+24V

R78

J10-1

CONSOLE BOARD (31 X 42 CM CONSOLE)

-15V 110 VAC

-15V

LCD DISPLAY

TP6

K1

19

TP7

-15 V REGULATOR

-24V

+5V

R6

U4

R5

220 VAC

TP9

+12 V REGULATOR

-12 V REGULATOR

18 VAC 110 VAC

F1

TP2

TP3

U3

U2 J1-5

J5-15

TP10

R3

+5 / +16VDC POWER SUPPLY CIRCUIT (U47, Q4, T1, D17, D18, ETC.)

F6 18 VAC

J4-15

CONSOLE BOA ASSEMBLY SHOW LINES USED ON 3 ONLY. REFER 23 X 56 CM CO RAD-ONL

+ 5 / -15VDC POWER SUPPLY & REGULATOR (U28, L1, D9-D13, ETC)

R1 +5V

J1-1

J1-3

J5-13

+5V TP8 TP7

J2-1

J1-1

J2-3

J1-3

J2-6

J1-6

J2-7

J1-7

J2-8

J1-8

J2-9

J1-9

110 VAC +24VDC

R7 DS1

D15

POWER ON

ROOM INTERFACE BOARD

+12V

+12V

K1 +24V

+24V

J10-13 J10-19

K2

J10-11

REFER TO SYSTEM ON, MD-0762

REFER TO MD-0757 (AEC) FOR PINOUTS OF THE DC RAIL CONNECTIONS ON THE AEC BOARD

J10-16 J10-17

-12V

-12V -24V

-24V

K3

AEC BOARD

J13-9

J13-21

J13-23

J13-11

J13-13

J13-17

+5V

J13-3

J3-6

J13-6

J3-1

J13-1

J3-8

J13-8

-15V

TP16

-12V

J13-4

J3-7

J13-7

DS38

DS37

J13-2

J3-4

J11-1

DS33

J11-5

TP20

TP18 TP21

J3-2

+12V

R89 R80

TP4 -15V

+5V

R75

J13-5

-15V +24V

+5V

DS36 J3-5

+15V

+12V

TP19 R85

-12V

+5V

+15V +12V

J13-15

THE DIGITAL I/O BOARD IS OPTIONAL WITH R&F GENERATORS REFER TO MD-0767 (DIGITAL INTERFACE) FOR PINOUTS OF THE DC RAIL CONNECTIONS SHOWN TO THE RIGHT OF THIS TEXT

TP17 R77

R76

-15V

J3-3

-15V

DS39

R90

+12V

GENERATOR INTERFACE BOARD

+15V

+15V

+24V

R86

+15V

R81

+5V

R78

0V

J4-13

REFER TO SYSTEM ON, MD-0762 TP11

TP1

U5 +15 V REGULATOR

R81

F5

J5-14

R2

TP13 TP13 J1-2

J5-12

J4-14

+15V

+24V

18 VAC

J4-12

-12V

GENERATOR CPU BOARD DIGITAL I/O BOARD DATE DRAWN G. SANWALD 10 MAR 2000 CHECKED________ ________

D

+12V

+12V

+5V U8

J11-1

P1-1

J11-5

P1-5

+5 V REGULATOR

D4

+5V +12V

GENERATOR CPU BOARD (FROM PAGE 4)

+5V J1-17

J2-17

J1-18

J2-18

J1-15

J2-15

J1-19

J2-19

J1-20

J2-20

+12V

REMOTE FLUORO DISPLAY BOARD

REMOTE FLUORO CONTROL BOARD

REMOTE FLUORO CONTROL OPTIONAL WITH INDICO 100 R&F GENERATORS

J5-12

+5V

+5V

REFER TO SYSTEM ON, MD-0762

J5-14

FROM GENERATOR INTERFACE BOARD (PAGE 4)

+5V J8-1

TP2

J5-13

F1

J5-15

+ 5 / -20VDC POWER SUPPLY CIRCUIT (U30, Q5, T1, D7, D8, ETC.)

J8-2

J1-2

J8-23

J1-23

U31 -12 V REGULATOR

-12V

J8-24

J1-24

J8-25

J1-25

J8-26

J1-26

CONSOLE DISPLAY BOARD

U32

THESE ITEMS ARE USED ON THE 23 X 56 CM CONSOLE ONLY.

J1-1

300 VAC BACKLIGHT POWER SUPPLY

J10-1

-12V

FLUORESCENT LAMP

J10-5

CONSOLE CPU BOARD (23 x 56 CM CONSOLE)

J16-3

J8-3

LCD DISPLAY ASSEMBLY

+5V

TP3

FROM GENERATOR INTERFACE BOARD (PAGE 4)

TP7 TP2 J16-8

J8-8

F1

+ 5 / -20VDC POWER SUPPLY CIRCUIT (U12, L1, D2, D3-D7, ETC.) TP8

+5V

THESE ITEMS ARE USED ON THE “RAD-ONLY” CONSOLE ONLY.

TP9

-20V

19

300 VAC BACKLIGHT POWER SUPPLY (Q1, Q2, T1, C36, ETC.)

CONSOLE BOARD (RAD-ONLY CONSOLE)

J5-1

FLUORESCENT LAMP

J5-5

LCD DISPLAY ASSEMBLY

DATE DRAWN G. SANWALD 10 MAR 2000 CHECKED________ ________

D

E NCE

REMARKS

THIS VOLTAGE WILL BE APPROXIMATELY 0 VDC WHEN THE DC BUS CAPACITORS ARE NOT CHARGED. THIS WILL RISE TO APPROXIMATELY 6 VDC WHEN THE DC BUS CAPACITORS ARE FULLY CHARG

THE DC BUS CAPACITORS MUST CHARGE WITHIN APPROXIMATELY 0.25 SECONDS OF THE GENERATOR BEING SWITCHED ON. IF THE DC BUS CAPACITORS DO NOT CHARGE NORMALLY, THE SOFT S OK PROTECTION CIRCUIT ENERGIZES RELAY K1 (SEE # 4) AND INHIBITS OPERATION OF THE SOFT START DRIVER CIRCUIT (SEE # 3).

“LOW” (APPROXIMATELY 0 VDC) COMMANDS THE MAIN CONTACTOR K5 ON THE POWER INPUT BOARD TO CLOSE. “HIGH” (APPROXIMATELY 12 VDC) = CONTACTOR OPEN. THIS OUPUT WILL NOT SWI “LOW” IF THE DC BUS CAPACITORS ARE NOT CHARGED (SEE # 1 & 2).

K1 REMAINS DE-ENERGIZED (CONTACTS AS SHOWN) IF NO SOFT-START FAULT IS DETECTED. THEREFORE, K1 AND K2 ON THE POWER INPUT BOARD WILL ENERGIZE WHEN THE GENERATOR IS SW ON. A SOFT-START FAULT ENERGIZES K1 ON THE AUXILIARY BOARD, DE-ENERGIZING K1 ON THE POWER INPUT BOARD. THIS WILL INHIBIT FURTHER DC BUS CHARGING. “LOW” (APPROXIMATELY 0 VDC) = TUBE 2 SELECTED, “HIGH” (APPROXIMATELY 12 VDC) = TUBE 1 SELECTED.

“LOW” (APPROXIMATELY 0 VDC) = FLUORO FAN(S) ON, “HIGH” (APPROXIMATELY 12 VDC) = FLUORO FAN(S) OFF. FAN(S) ARE SWITCHED ON DURING PULSED OR CONTINUOUS FLUORO OPERATION, A REMAIN ON FOR APPROXIMATELY 20 MINUTES AFTER SWITCHING TO RAD MODE. “LOW” INDICATES CONTACTOR CLOSED (SEE # 3). THE CONTACTOR CLOSED SIGNAL OCCURS APPROXIMATELY 10 SECONDS AFTER INITIAL GENERATOR TURN-ON, ASSUMING NORMAL DC BUS CHA “HIGH” (APPROXIMATELY 12 VDC) = RAD / PULSED FLUORO MODE. “LOW” (APPROXIMATELY 0 VDC) = CONTINUOUS FLUORO MODE. USED ON R&F GENERATORS ONLY. “HIGH” (APPROXIMATELY 12 VDC) = PULSED FLUORO / LOW POWER MODE. “LOW” (APPROXIMATELY 0 VDC) = HIGH POWER RAD MODE. NOT USED ON ALL MODELS, REFER TO MD-0786 FOR DETAILS 24 VDC (APPROXIMATELY) ENERGIZES K1 AND / OR K2 ON THE POWER INPUT BOARD, INITIATING THE POWER-ON SEQUENCE. SEE # 4. “HIGH” (APPROXIMATELY 5 VDC) = TUBE 2 SELECTED. “LOW” (APPROXIMATELY 0 VDC) = TUBE 1 SELECTED. “HIGH” (APPROXIMATELY 5 VDC) = RAD / PULSED FLUORO MODE. “LOW” (APPROXIMATELY 0 VDC) = CONTINUOUS FLUORO MODE. USED ON R&F GENERATORS ONLY. “HIGH” (APPROXIMATELY 5 VDC) = PULSED FLUORO / LOW POWER MODE. “LOW” (APPROXIMATELY 0 VDC) = HIGH POWER RAD MODE. NOT USED ON ALL MODELS, REFER TO MD-0786 FOR DETAILS. DS9 LIT = CONTACTOR CLOSED, DS10 LIT = CONTACTOR NOT CLOSED. DS34 LIT = GENERATOR ON COMMAND ISSUED (CONSOLE PASSED ALL SELF TESTS). DS35 LIT = GENERATOR ON COMMAND NOT ISSUED (DURING CONSOLE SELF TESTS, OR IF SELF TESTS FAILED DS22 LIT = FLUORO SELECTED, DS23 LIT = RAD SELECTED. DS2 LIT = PULSED FLUORO / LOW POWER MODE. DS4 LIT = HIGH POWER RAD MODE. SEE # 13. D1 LIT INDICATES + OR - 12 VDC FAULT, OR SOFT START FAULT. THE VOLTAGE WAVEFORM AT THIS TEST POINT IS DEPICTED IN FIGURE 1 BELOW. 18 s 4V -8 V

DRAWN

G. SANWALD CHECKED________

DATE 10 MAR 2000 ________

D