Photo Diode

  • October 2019
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4

3

2

1 REV.

REMARKS

DRAWN

DATE

APPVD

C1 {Value} R2

D

D

TP3 100k +12V TP1 2

4

V+

J1 1

3

V11

TL

U1:A OP470EP TP2

-12V C2 {Value}

C

C

R3 100k 6

J2 7

D1 TL

TR

BL

BL

U1:B OP470EP

5

C3

BR GND

SPOT 9D

{Value} R7

R1 10k

B

+12V

100k

B

9

J3 8

BR

U1:C OP470EP

10

NOTES: 1. ALL RESISTORS IN OHMS, 1/4W, 1% UNLESS OTHERWISE SPECIFIED. 2. ALL CAPACITORS IN MICROFARADS UNLESS OTHERWISE SPECIFIED. 3. FOR FABRICATION DETAILS OF {PCB Name}, SEE JEFFERSON LAB DRAWING XXXXXXXX. 4. FOR ARTWORK OF {PCB Name}. SEE JEFFERSON LAB DRAWING XXXXXXXX. 5. FOR ASSEMBLY OF {PCB Name}, SEE JEFFERSON LAB DRAWING XXXXXXXX.

C4 {Value} R5

DRAWN

DATE

CHECKED

DATE

APPR/ORIGINATOR

DATE

Jefferson Lab

100k 13

A 12

NEWPORT NEWS, VIRGINIA UNITED STATES DEPARTMENT OF ENERGY

J4 14

APPROVED

SIZE

ENGINEER

{Author}

3

TITLE

TR

U1:D OP470EP

USED ON

4

Thomas Jefferson National Accelerator Facility

2

{SHOWN ON}

A

{MAJOR SYSTEM NAME} {SUBSYSTEM NAME} {Title} {DRAWING TYPE}

B

DRAWING NO.

XXXXXB01

CAD I. D. Photo Diode.sch

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