Philips Chassis Ep1.1u Aa Service Manual

Color Television

Chassis

EP1.1U AA For manual LGE PDP panel see: 3122 785 15590 For manual FHP PDP panel see: 3122 785 14580 For manual SDI PDP panel see: 3122 785 14990

F_15400_000.eps 200505

Contents

Page

1. Technical Specifications, Connections, and Chassis Overview 2 2. Safety Instructions, Warnings, and Notes 4 3. Directions for Use 6 4. Mechanical Instructions 7 5. Service Modes, Error Codes, and Fault Finding 13 6. Block Diagrams, Test Point Overviews, and Waveforms Wiring Diagram 42” & 50” 31 Block Diagram Video 32 Block Diagram Control & Clock Signals 34 I2C IC’s Overview 35 Supply Lines Overview 36 7. Circuit Diagrams and PWB Layouts Diagram SSB: DC / DC (B1A) 37 SSB: Supply + RS232 (B1B) 38 SSB: Chanel Decoder (B2A) 39 SSB: Main Tuner (B2B) 40 SSB: MPIF Main: Video Source Selection (B3A) 41 SSB: MPIF Main: Supply (B3B) 42 SSB: MPIF Main: IF & SAW Filter (B3C) 43 SSB: MPIF Main: Audio Source Selection (B3D) 44 SSB: MPIF Main: Audio Amplifier (B3E) 45 SSB: PNX2015: Audio / Video (B4A) 46 SSB: PNX2015: DV I/O Interface (B4B) 47 SSB: PNX2015: Tunnelbus (B4C) 48 SSB: PNX2015: DDR Interface (B4D) 49 SSB: PNX2015: Standby & Control (B4E) 50 SSB: PNX2015: Supply (B4F) 51 SSB: PNX2015: Display Interface (B4G) 52 SSB: Viper: Control (B5A) 53 SSB: Viper: Main Memory (B5B) 54 SSB: Viper: A/V + Tunnelbus (B5C) 55 SSB: Viper: Supply (B5D) 56

Contents

PWB 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73

8. 9.

10. 11.

Page

SSB: Viper: EEPROM (B5E) 57 SSB: Miscellaneous (B5F) 58 SSB: Video DAC (B6) 59 SSB: HDMI: Supply (B7A) 60 SSB: HDMI: I/O + Control (B7B) 61 SSB: Analog I/O (B7C) 62 SSB: UART (B7D) 63 SSB: Audio: Amplifier (B8A) 64 SSB: Audio: Connectors (B8B) 65 SSB: SRP List Part 1 66 SSB: SRP List Part 2 67 Side I/O Panel: (42” & 50”) (D) 74 Control Panel (42” & 50”) (E) 76 LED Panel (42” ME5FL) (J) 78 Front IR / LED Panel (42” & 50” ME6) (J) 80 Alignments 81 Circuit Descriptions, Abbreviation List, and IC Data Sheets 86 Abbreviation List 88 IC Data Sheets 91 Spare Parts List 101 Revision List 101

68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 68-73 75 77 79 80

© Copyright 2006 Philips Consumer Electronics B.V. Eindhoven, The Netherlands. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

Published by WS 0662 Customer Service

Printed in the Netherlands

Subject to modification

EN 3122 785 16300

EN 2

1.

Technical Specifications, Connections, and Chassis Overview

EP1.1U

1. Technical Specifications, Connections, and Chassis Overview Index of this chapter: 1.1 Technical Specifications 1.2 Connection Overview 1.3 Chassis Overview

1.1.4

Miscellaneous Power supply: - Mains voltage (VAC)

: 110 - 240

Notes: • Some models in this chassis range have a different mechanical construction. The information given here is therefore model specific. • Data below can deviate slightly from the actual situation, due to the different set executions. • Specifications are indicative (subject to change).

- Mains frequency (Hz)

: 50/60

Ambient conditions: - Temperature range (°C) - Maximum humidity

: +5 to +40 : 90% R.H.

1.1

Technical Specifications

1.1.1

Vision

Power consumption (values are indicative) - Normal operation (W) : ≈ 400 (42”) : ≈ 480 (50”) - Standby (W) : <1

Display type Screen size Resolution (HxV pixels) Min. contrast ratio Min. light output (cd/m2) Viewing angle (HxV degrees) Tuning system TV Color systems Video playback Cable Tuner bands Supported video formats

Supported computer formats

1.1.2

: : : : : : : : :

Plasma (SDI) 42” (107 cm), 16:9 50” (127 cm), 16:9 1024(*3)x768p (42”) 1366(*3)x768p (50”) 10000:1 1200 (42”) 1300 (52”) 160x160 PLL ATSC NTSC NTSC Unscrambled digital cable - QAM VHF, UHF, S, Hyper 640x480i - 1fH 640x480p - 2fH 1280x720p - 3fH 1920x1080i - 2fH 640x480 @ 60Hz 800x600 @ 60Hz 1024x768 @ 60Hz 1366x768 @ 60Hz

: : : :

AV Stereo BTSC Dolby Digital (AC3) 2 x 15 W

: : : :

JPEG MP3 Slideshow (.alb) USB1.1

1.2

Dimensions (WxHxD in inch)

: 49.2x27.1x4.4 (42”) : 56.1x30.9x4.4 (50”)

Weight, stand included (kg/lbs)

: 40/87.6 (42”) : 57/125.6 (50”)

Connection Overview Note: The following connector color abbreviations are used (acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, and Ye= Yellow.

1.2.1

Side Connections

Sound Sound systems

Maximum power (WRMS) 1.1.3

: : : : : : : : : : : : : :

Multimedia Supported file formats

USB input

G_16300_002.eps 030206

Figure 1-1 Side I/O connections S-Video (Hosiden): Video Y/C - In 1 - Ground Y Gnd 2 - Ground C Gnd 3 - Video Y 1 VPP / 75 ohm 4 - Video C 0.3 VPPP / 75 ohm Cinch: Video CVBS - In, Audio - In Ye - Video CVBS 1 VPP / 75 ohm Wh - Audio L 0.5 VRMS / 10 kohm Rd - Audio R 0.5 VRMS / 10 kohm

H H j j

jq jq jq

Technical Specifications, Connections, and Chassis Overview Mini Jack: Audio Headphone - Out Bk - Headphone 32 - 600 ohm / 10 mW

ot

EP1.1U

1.

EN 3

0.7 VPP / 75 ohm 0.5 VRMS / 10 kohm 0.5 VRMS / 10 kohm

jq jq jq

AV1 Cinch: Video YPbPr - In, Audio - In Gn - Video Y 1 VPP / 75 ohm Bu - Video Pb 0.7 VPP / 75 ohm Rd - Video Pr 0.7 VPP / 75 ohm Wh - Audio L 0.5 VRMS / 10 kohm Rd - Audio R 0.5 VRMS / 10 kohm

jq jq jq jq jq

Rd - Video Pr Wh - Audio L Rd - Audio R

USB1.1

1

2

3

4

E_06532_022.eps 300904

Figure 1-2 USB (type A) HDMI 1 & 2: Digital Video, Digital Audio - In 1 2 3 4 1.2.2

- +5V - Data (-) - Data (+) - Ground

k jk jk H

Gnd

Figure 1-4 HDMI (type A) connector

Figure 1-3 Rear connections (under side) AV3 S-Video (Hosiden): Video Y/C - In 1 - Ground Y Gnd 2 - Ground C Gnd 3 - Video Y 1 VPP / 75 ohm 4 - Video C 0.3 VPPP / 75 ohm

E B

1 2 E_06532_017.eps 250505

Rear Connections (under side)

G_16290_068.eps 300106

1.3

19 18

H H j j

AV3 Cinch: Video CVBS - In, Audio - In Ye - Video CVBS 1 VPP / 75 ohm Wh - Audio L 0.5 VRMS / 10 kohm Rd - Audio R 0.5 VRMS / 10 kohm

jq jq jq

AV2 Cinch: Video YPbPr - In, Audio - In Gn - Video Y 1 VPP / 75 ohm Bu - Video Pb 0.7 VPP / 75 ohm

jq jq

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

- D2+ - Shield - D2- D1+ - Shield - D1- D0+ - Shield - D0- CLK+ - Shield - CLK- n.c. - n.c. - DDC_SCL - DDC_SDA - Ground - +5V - HPD - Ground

Aerial - In - - F-type (US)

j H j j H j j H j j H j

Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel

j jk H j j H

DDC clock DDC data Gnd Hot Plug Detect Gnd

D

Coax, 75 ohm

Chassis Overview

CONTROL BOARD

SIDE I/O PANEL

D

LED PANEL

J

SMALL SIGNAL BOARD G_16300_003.eps 030206

Figure 1-5 PWB/CBA locations (42 and 50-inch models)

EN 4

2.

EP1.1U

Safety Instructions, Warnings, and Notes

2. Safety Instructions, Warnings, and Notes Index of this chapter: 2.1 Safety Instructions 2.2 Warnings 2.3 Notes •

2.1

Safety Instructions Safety regulations require that during a repair: • Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA). • Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: • Route the wire trees correctly and fix them with the mounted cable clamps. • Check the insulation of the Mains/AC Power lead for external damage. • Check the strain relief of the Mains/AC Power cord for proper function. • Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets which have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the "on" position (keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 Mohm and 12 Mohm. 4. Switch "off" the set, and remove the wire between the two pins of the Mains/AC Power plug. • Check the cabinet for defects, to avoid touching of any inner parts by the customer.

2.2

Warnings •

• • •

All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential. Available ESD protection equipment: – Complete kit ESD3 (small tablemat, wristband, connection box, extension cable and earth cable) 4822 310 10671. – Wristband tester 4822 344 13999. Be careful during measurements in the high voltage section. Never replace modules or other components while the unit is switched "on". When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

2.3

Notes

2.3.1

General •

Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the

•

•

2.3.2

Schematic Notes •

•

• • • •

2.3.3

Service Default Mode (see chapter 5) with a color bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3). Where necessary, measure the waveforms and voltages with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols. The semiconductors indicated in the circuit diagram and in the parts lists, are interchangeable per position with the semiconductors in the unit, irrespective of the type indication on these semiconductors. Manufactured under license from Dolby Laboratories. “Dolby”, “Pro Logic” and the “double-D symbol”, are trademarks of Dolby Laboratories.

All resistor values are in ohms and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kohm). Resistor values with no multiplier may be indicated with either an "E" or an "R" (e.g. 220E or 220R indicates 220 ohm). All capacitor values are given in micro-farads (µ= x10-6), nano-farads (n= x10-9), or pico-farads (p= x10-12). Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF). An "asterisk" (*) indicates component usage varies. Refer to the diversity tables for the correct values. The correct component values are listed in the Spare Parts List. Therefore, always check this list when there is any doubt.

Rework on BGA (Ball Grid Array) ICs General Although (LF)BGA assembly yields are very high, there may still be a requirement for component rework. By rework, we mean the process of removing the component from the PWB and replacing it with a new component. If an (LF)BGA is removed from a PWB, the solder balls of the component are deformed drastically so the removed (LF)BGA has to be discarded. Device Removal As is the case with any component that, it is essential when removing an (LF)BGA, the board, tracks, solder lands, or surrounding components are not damaged. To remove an (LF)BGA, the board must be uniformly heated to a temperature close to the reflow soldering temperature. A uniform temperature reduces the chance of warping the PWB. To do this, we recommend that the board is heated until it is certain that all the joints are molten. Then carefully pull the component off the board with a vacuum nozzle. For the appropriate temperature profiles, see the IC data sheet. Area Preparation When the component has been removed, the vacant IC area must be cleaned before replacing the (LF)BGA. Removing an IC often leaves varying amounts of solder on the mounting lands. This excessive solder can be removed with either a solder sucker or solder wick. The remaining flux can be removed with a brush and cleaning agent. After the board is properly cleaned and inspected, apply flux on the solder lands and on the connection balls of the (LF)BGA. Note: Do not apply solder paste, as this has shown to result in problems during re-soldering.

Safety Instructions, Warnings, and Notes Device Replacement The last step in the repair process is to solder the new component on the board. Ideally, the (LF)BGA should be aligned under a microscope or magnifying glass. If this is not possible, try to align the (LF)BGA with any board markers. So as not to damage neighboring components, it may be necessary to reduce some temperatures and times.

•

•

More Information For more information on how to handle BGA devices, visit this URL: www.atyourservice.ce.philips.com (needs subscription, not available for all regions). After login, select “Magazine”, then go to “Repair Downloads”. Here you will find Information on how to deal with BGA-ICs. 2.3.4

•

Lead Free Solder Philips CE is producing lead-free sets (PBF) from 1.1.2005 onwards.

2.3.5

b

Figure 2-2 Lead-free logo Due to lead-free technology some rules have to be respected by the workshop during a repair: • Use only lead-free soldering tin Philips SAC305 with order code 0622 149 00106. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle. • Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able – To reach at least a solder-tip temperature of 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications. • Adjust your solder tool so that a temperature around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will rise drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat. • Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to

avoid mixed regimes. If not to avoid, clean carefully the solder-joint from old tin and re-solder with new tin. Use only original spare-parts listed in the Service-Manuals. Not listed standard material (commodities) has to be purchased at external companies. Special information for lead-free BGA ICs: these ICs will be delivered in so-called "dry-packaging" to protect the IC against moisture. This packaging may only be opened short before it is used (soldered). Otherwise the body of the IC gets "wet" inside and during the heating time the structure of the IC will be destroyed due to high (steam)pressure inside the body. If the packaging was opened before usage, the IC has to be heated up for some hours (around 90°C) for drying (think of ESD-protection!). Do not re-use BGAs at all! For sets produced before 1.1.2005, containing leaded soldering tin and components, all needed spare parts will be available till the end of the service period. For the repair of such sets nothing changes.

Practical Service Precautions •

•

P

EN 5

Caution: For BGA-ICs, you must use the correct temperatureprofile, which is coupled to the 12NC. For an overview of these profiles, visit the website www.atyourservice.ce.philips.com (needs subscription, but is not available for all regions) You will find this and more technical information within the "Magazine", chapter "Repair Downloads". For additional questions please contact your local repair help desk.

E_06532_024.eps 230205

Regardless of the special lead-free logo (which is not always indicated), one must treat all sets from this date onwards according to the rules as described below.

2.

In case of doubt whether the board is lead-free or not (or with mixed technologies), you can use the following method: • Always use the highest temperature to solder, when using SAC305 (see also instructions below). • De-solder thoroughly (clean solder joints to avoid mix of two alloys).

Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 5 and 6 refer to the production year, digits 7 and 8 refer to production week (in example below it is 1991 week 18).

Figure 2-1 Serial number example

EP1.1U

It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard. Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

EN 6

3.

EP1.1U

3. Directions for Use

Directions for Use

You can download this information from the following websites: http://www.philips.com/support http://www.p4c.philips.com As the software upgrade is a new feature, it is explained below.

Mechanical Instructions

EP1.1U

4.

EN 7

4. Mechanical Instructions Index of this chapter: 4.1 Cable Dressing 4.2 Service Positions 4.3 Assy/Panel Removal 4.4 Set Re-assembly Notes:

4.1

•

• •

Several models in this chassis range have a different mechanical construction, the instructions given in this chapter are therefore very model specific. Figures below can deviate slightly from the actual situation, due to the different set executions. Follow the disassemble instructions in described order.

Cable Dressing

G_16300_004.eps 030206

Figure 4-1 Cable dressing (42-inch model)

EN 8

4.

EP1.1U

Mechanical Instructions

G_16300_015.eps 030206

Figure 4-2 Cable dressing (50-inch model)

4.2

Service Positions

4.2.2

Aluminium Stands

For easy servicing of this set, there are a few possibilities created: • Foam bars (created for Service). • Aluminium service stands (created for Service). 4.2.1

Foam Bars

E_06532_019.eps 170504

Figure 4-4 Aluminium stands (drawing of MkI)

E_06532_018.eps 170504

Figure 4-3 Foam bars The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.

The new MkII aluminium stands (not on drawing) with order code 3122 785 90690, can also be used to do measurements, alignments, and duration tests. The stands can be (dis)mounted quick and easy by means of sliding them in/out the "mushrooms". The new stands are backwards compatible with the earlier models. Important: For (older) FTV sets without these "mushrooms", it is obligatory to use the provided screws, otherwise it is possible to damage the monitor inside!.

Mechanical Instructions 4.3

Assy/Panel Removal

4.3.1

Metal Rear Cover

4.3.5

4.

EN 9

Side I/O Panel You will find the Side I/O Panel on the inside of the right Speaker Compartment Cover. After removal of this cover, this panel is accessible. 1. Disconnect the cable(s) from the panel. 2. Remove the T10 mounting screws that hold the assy. 3. Take out the panel [1] from its bracket. When defective, replace the whole unit.

Caution: Disconnect the Mains/AC Power cord before you remove the rear cover! 1. Place the TV set upside down on a table top, using the foam bars (see part "Foam Bars"). Caution: do not put pressure on the display, but let the monitor lean on the speakers or the Front cover. 2. Remove all T10 screws around the edges of the metal rear cover: “parker” screws around the outer rim, “tapping” screws around the connector plate. 3. Remove the four "mushrooms" from the rear cover. 4. Lift the metal rear cover from the set. Make sure that wires and flat foils are not damaged. 4.3.2

EP1.1U

Speaker Compartment Cover After removing the metal rear cover, you gain access to the Speaker Compartment covers. 1. Remove all screws [1] (see Figure “Speaker compartment cover removal”). 2. For removal of the right cover, note that the I/O connection cable has to be removed as well. 3. After removal of all the screws, put a screwdriver between the side of the cover and the front cabinet and slightly push it upwards so you can take the cover out.

1

G_16300_006.eps 030206

1 1

Figure 4-6 Side I/O panel removal 1

4.3.6

LED Panel 1. Disconnect the cable [1] from the panel. 2. Remove the T10 mounting screws [2] that hold the panel. 3. Take out the panel. When defective, replace the whole unit.

1 1 1 1 1

1

1

1

1 G_16300_005.eps 030206

Figure 4-5 Speaker compartment cover removal

2 4.3.3

Control Panel G_16300_007.eps 030206

After removal of the left Speaker Compartment Cover, this panel is accessible. Release the clamps and take out the panel 4.3.4

Speakers Figure 4-7 LED panel removal After removal of the Speaker Compartment Covers, you can access the speakers.

EN 10 4.3.7

4.

Mechanical Instructions

EP1.1U

Small Signal Board (SSB) 1. Remove all SSB bottom shielding fixation screws [1] and [3] at the connector plate (bottom side). See Figure “SSB bottom shielding”. 2. Remove the mains supply unit [2] after having unplugged the earthcable from the SSB top shielding plate. 3. Take out the SSB bottom shielding plate. 4. Remove all SSB top shielding fixation screws [1]. See Figure “SSB top shielding”. 5. Take out the SSB top shielding plate; it hinges at the left side. 6. Remove the fixation screws of the connector plate itself. 7. Unplug all cables on the SSB. 8. Lift the panel from the set.

1

2

1

1

1

1

1

1

1

3

G_16300_008.eps 030206

Figure 4-8 SSB bottom shielding

1

G_16300_009.eps 030206

Figure 4-9 SSB top shielding

Mechanical Instructions 4.3.8

Plasma Display Panel / Glass Plate

EP1.1U

4.

– Cable at LED panel. – Keyboard cable at SSB side. – Audio Amplifier supply cable at the Main Supply board. – Loudspeaker cables (incl. ferrites) at the Audio panel. 4. Lift the metal frame (together with all PWBs) from the display panel (see figure “Frame lift”). 5. After removal of the frame, lift the PDP from the set.

1. Remove the T20 display panel mounting screws [1]. 2. Remove the T10 [2] and the T15 [3] screws from the mounting frame. 3. Unplug all cable(s): – LVDS cable at SSB side (fragile connector!). – SSB supply cables at the Main Supply board. – Mains cable at the Main Supply board. – Side I/O cable at SSB side (fragile connector!).

2

2

1

1

2

EN 11

2 3

G_16300_010.eps 030206

Figure 4-10 Display panel removal (photo from LC4.9 chassis)

F_15400_120.eps 200505

Figure 4-11 Frame lift (photo from LC4.9 chassis)

EN 12 4.3.9

4.

EP1.1U

Mechanical Instructions

PDP Glass Plate In order to remove/exchange the PDP glass plate: 1. Remove the PDP as described earlier. 2. Remove the LED panel [2] as described previously in this chapter. 3. Remove the T10 screws [1] from the mounting frame. See Figure “Glass plate removal (photo from LC4.9 chassis)”. 4. After removal of the frame, you can lift the glass plate from the set.

1

2

G_16300_011.eps 030206

Figure 4-12 Glass plate removal (photo from LC4.9 chassis)

4.4

Set Re-assembly To re-assemble the whole set, execute all processes in reverse order. Notes: • While re-assembling, make sure that all cables are placed and connected in their original position. See figure "Cable dressing". • Pay special attention not to damage the EMC foams on the SSB shields. Ensure that EMC foams are mounted correctly.

Service Modes, Error Codes, and Fault Finding

EP1.1U

5.

EN 13

5. Service Modes, Error Codes, and Fault Finding Index of this chapter: 5.1 Test Points 5.2 Service Modes 5.3 Stepwise Start-up 5.4 Service Tools 5.5 Error Codes 5.6 The Blinking LED Procedure 5.7 Protections 5.8 Fault Finding and Repair Tips 5.9 Software Upgrading

5.1

• • •

Test Points As most signals are digital, it will be almost impossible to measure waveforms with a standard oscilloscope. Therefore, waveforms are not given in this manual. Several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective.

How to Activate SDM Use one of the following methods: • Use the standard RC-transmitter and key in the code “062596”, directly followed by the “MENU” button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it "off", push the “MENU” button again. • Short for a moment the two solder pads [1] on the SSB, with the indication “SDM”. They are located outside the shielding. Activation can be performed in all modes, except when the set has a problem with the Stand-by Processor. See figure “SDM and SDI service pads”.

Perform measurements under the following conditions: • Service Default Mode. • Video: Color bar signal. • Audio: 3 kHz left, 1 kHz right.

5.2

in the channel map and could be different from the one corresponding to the physical channel 3. All picture settings at 50% (brightness, color, contrast). All sound settings at 50%, except volume at 25%. All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer. – Child/parental lock. – Picture mute (blue mute or black mute). – Automatic volume levelling (AVL). – Auto switch "off" (when no video signal was received for 10 minutes). – Skip/blank of non-favorite pre-sets. – Smart modes. – Auto store of personal presets. – Auto user menu time-out.

Service Modes Service Default Mode (SDM) and Service Alignment Mode (SAM) offer several features for the service technician, while the Customer Service Mode (CSM) is used for communication between a Customer Helpdesk and a customer.

2

There is also the option of using ComPair, a hardware interface between a computer (see requirements below) and the TV chassis. It offers the ability of structured troubleshooting, test pattern generation, error code reading, software version readout, and software upgrading.

1 SPI

SDM

Minimum requirements for ComPair: a Pentium processor, Windows 95/98, and a CD-ROM drive (see also paragraph “ComPair”). 5.2.1

Service Default Mode (SDM) G_16300_012.eps 030206

Purpose • To create a pre-defined setting, to get the same measurement results as given in this manual. • To override SW protections (only applicable for protections detected by stand-by processor) and make the TV start up to the step just before protection (a sort of automatic stepwise start up). See paragraph “Stepwise Start Up”. • To start the blinking LED procedure (not valid in protection mode).

Figure 5-1 SDM and SDI service pads After activating this mode, “SDM” will appear in the upper right corner of the screen (if you have picture). How to Navigate When you press the “MENU” button on the RC transmitter, the set will toggle between the SDM and the normal user menu (with the SDM mode still active in the background).

Specifications Table 5-1 SDM default settings

Region

Freq. (MHz)

How to Exit SDM Use one of the following methods: • Switch the set to STAND-BY via the RC-transmitter. • Via a standard customer RC-transmitter: key in “00”sequence.

Default system

Europe, AP-PAL/Multi

475.25

PAL B/G

NAFTA, AP-NTSC, LATAM

61.25 (ch. 3)

NTSC M 5.2.2

•

Tuning frequency 61.25 MHz for NTSC: The TV shall tune to physical channel 3 only if channel 3 is an analog channel or if there is no channel 3 installed in the channel map. If there is a digital channel installed in channel 3, then the frequency to which the set will tune, would be as specified

Service Alignment Mode (SAM) Purpose • To perform (software) alignments. • To change option settings. • To easily identify the used software version.

EN 14 • •

5.

EP1.1U

Service Modes, Error Codes, and Fault Finding

To view operation hours. To display (or clear) the error code buffer.

How to Activate SAM Via a standard RC transmitter: key in the code “062596” directly followed by the “INFO” button. After activating SAM with this method a service warning will appear on the screen, you can continue by pressing the red button on the RC. Contents of SAM: • Hardware Info. – A. VIPER SW Version. Displays the software version of the VIPER software (main software) (example: EP23U-1.2.3.4_12345 = AAAAB_X.Y.W.Z_NNNNN). • AAAA= the chassis name. • B= the region: A= AP, E= EU, L= Latam, U = US. • X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y is the sub version number (a higher number is always compatible with a lower number). The last two digits are used for development reasons only, so they will always be zero in official releases. • NNNNN= last five digits of 12nc code of the software. – B. SBY PROC Version. Displays the software version of the stand-by processor. – C. Production Code. Displays the production code of the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this. • Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched "on/off", 0.5 hours is added to this number. • Errors. (Followed by maximal 10 errors). The most recent error is displayed at the upper left (for an error explanation see paragraph “Error Codes”). • Defective Module. Here the module that generates the error is displayed. If there are multiple errors in the buffer, which are not all generated by a single module, there is probably another defect. It will then display the message “UNKNOWN” here. • Reset Error Buffer. When you press “cursor right” and then the “OK” button, the error buffer is reset. • Alignments. This will activate the “ALIGNMENTS” submenu. • Dealer Options. Extra features for the dealers. • Options. Extra features for Service. • Initialise NVM. When an NVM was corrupted (or replaced) in the former EMG based chassis, the microprocessor replaces the content with default data (to assure that the set can operate). However, all preferences and alignment values are gone now, and option numbers are not correct. Therefore, this was a very drastic way. In this chassis, the procedure is implemented in another way: The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, you can do two things (dependent of the service instructions at that moment): – Save the content of the NVM via ComPair for development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this). – Initialize the NVM (same as in the past, however now it happens conscious). Note: When you have a corrupted NVM, or you have replaced the NVM, there is a high possibility that you will not have picture any more because your display option is not correct. So, before you can initialize your NVM via the SAM, you need to have a picture and therefore you need the correct display option. To adapt this option, use ComPair. The correct HEX values for the options can be found in the table below.

Table 5-2 Display option code overview (all FTV chassis) Display Option

HEX

Display Type

Size

Vertical Resolution

000

00

PDP SDI

42”

768p

001

01

PDP SDI

50”

768p

002

02

PDP FHP

42”

1024i

003

03

LCD LPL

30”

768p

004

04

LCD LPL

37”

768p

005

05

LCD LPL

42”

768p

006

06

SHARP

32”

768p

007

07

PDP SDI V3

42”

480p

008

08

PDP FHP 1024i

37”

1024i

009

09

LCOS XION

-

720p

010

0A

LCD AUO

30”

768p

011

0B

LCD LPL

32”

768p

012

0C

LCD AUO

32”

768p

013

0D

LCD SHARP

37”

768p

014

0E

LCD LPL

42”

1080p

015

0F

PDP SDI

37”

480p

016

10

PDP FHP

37”

1080i

017

11

PDP FHP

42”

1080i

018

12

PDP FHP

55”

768p

019

13

LCOS VENUS

-

720p

020

14

LCOS VENUS

-

1080p

021

15

LCD LPL

26”

768p

022

16

LCD LPL

32”

768p

023

17

LG SD

42”

480p

024

18

PDP SDI V4

42”

480p

025

19

PDP SDI V4

42”

768p

026

1A

PDP FHP A2

42”

1024i

027

1B

PDP SDI HD V4

50”

768p

028

1C

LCD Sharp

37”

1080p

029

1D

LCD AUO

32”

768p

030

1E

LCD Sharp

37”

1080p

031

1F

LCD Sharp

37”

1080p

032

20

LCD LPL

20”

768p

033

21

LCD QDI

23”

768p

034

22

ECO PTV

51”

1080i

035

23

ECO PTV

55”

1080i

036

24

ECO PTV

61”

1080i

037

25

PDP FHP A3

42”

1024i

038

26

DLP

50”

720p

039

27

DLP

60”

720p

040

28

LCD Sharp

32”

768p 768p

041

29

LCD Sharp

32”

042

2A

PDP SDI V4

63”

768p

043

2B

LCD Sharp

37”

768p

044

2C

LCD Sharp

37”

768p

045

2D

LCD LPL

26”

768p

• •

•

Store. All options and alignments are stored when pressing “cursor right” and then the “OK”-button SW Maintenance. – SW Events. Not useful for service purposes. In case of specific software problems, the development department can ask for this info. – HW Events. Not functional at the moment this manual is released, description will be published in an update manual if the function becomes available. Operation hours PDP. Displays the accumulated total of PDP operation hours.

How to Navigate • In SAM, you can select the menu items with the “CURSOR UP/DOWN” key on the RC-transmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the “CURSOR UP/DOWN” key to display the next/previous menu items. • With the “CURSOR LEFT/RIGHT” keys, it is possible to: – (De) activate the selected menu item. – (De) activate the selected submenu.

Service Modes, Error Codes, and Fault Finding How to Exit SAM Use one of the following methods: • Press the “MENU” button on the RC-transmitter. • Switch the set to STAND-BY via the RC-transmitter. Note: As long as SAM is activated, it is not possible to change a channel. This could hamper the White Point alignments because you cannot choose your channel/frequency any more. Workaround: after you have sent the RC code “062596 INFO” you will see the service-warning screen, and in this stage it is still possible to change the channel (so before pressing the “OK” button). 5.2.3

•

• •

Customer Service Mode (CSM) • Purpose When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible.

• •

•

How to Activate CSM Key in the code “123654” via the standard RC transmitter. Note: Activation of the CSM is only possible if there is no (user) menu on the screen!

•

How to Navigate By means of the “CURSOR-DOWN/UP” knob on the RCtransmitter, you can navigate through the menus. Contents of CSM • SW Version (example: EP23U-1.2.3.4_12345). Displays the built-in main software version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet. • SBY Processor Version. Displays the built-in stand-by processor software version. Upgrading this software will be possible via a PC and a ComPair interface (see chapter Software upgrade). • Set Type. This information is very helpful for a helpdesk/ workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee a possibility to do this. • Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee a possibility to do this. • Code 1. Gives the latest five errors of the error buffer. As soon as the built-in diagnose software has detected an error the buffer is adapted. The last occurred error is displayed on the leftmost position. Each error code is displayed as a 2-digit number. When less than 10 errors occur, the rest of the buffer is empty (00). See also paragraph Error Codes for a description. • Code 2. Gives the first five errors of the error buffer. See also paragraph Error Codes for a description. • Headphone Volume. Gives the last status of the headphone volume, as set by the customer. The value can vary from 0 (volume is minimum) to 100 (volume is maximum). Change via”MENU”, “TV”, “SOUND”, “HEADPHONE VOLUME”. • Dolby. Indicates whether the received transmitter transmits Dolby sound (“ON”) or not (“OFF”). Attention: The presence of Dolby can only be tested by the software on

•

•

•

•

•

•

•

EP1.1U

5.

EN 15

the Dolby Signaling bit. If a Dolby transmission is received without a Dolby Signaling bit, this indicator will show “OFF” even though a Dolby transmission is received. Sound Mode. Indicates the by the customer selected sound mode (or automatically chosen mode). Possible values are “STEREO” and “VIRTUAL DOLBY SURROUND”. Change via “MENU”, “TV”, “SOUND”, “SOUND MODE”. It can also have been selected automatically by signaling bits (internal software). Tuner Frequency. Not applicable for US sets. Digital Processing. Indicates the selected digital mode. Possible values are “STANDARD” and “PIXEL PLUS”. Change via “MENU”, “TV”, “PICTURE”, “DIGITAL PROCESSING”. TV System. Gives information about the video system of the selected transmitter. – M: NTSC M signal received – ATSC: ATSC signal received Center Mode. Not applicable. DNR. Gives the selected DNR setting (Dynamic Noise Reduction), “OFF”, “MINIMUM”, “MEDIUM”, or “MAXIMUM”. Change via “MENU”, “TV”, “PICTURE”, “DNR” Noise Figure. Gives the noise ratio for the selected transmitter. This value can vary from 0 (good signal) to 127 (average signal) and to 255 (bad signal). For some software versions, the noise figure will only be valid when “Active Control” is set to “medium” or “maximum” before activating CSM. Source. Indicates which source is used and the video/ audio signal quality of the selected source. (Example: Tuner, Video/NICAM) Source: “TUNER”, “AV1”, “AV2”, “AV3”, “HDMI 1”, “SIDE”. Video signal quality: “VIDEO”, “SVIDEO”, “RGB 1FH”, “YPBPR 1FH 480P”, “YPBPR 1FH 576P”, “YPBPR 1FH 1080I”, “YPBPR 2FH 480P”, “YPBPR 2FH 576P”, “YPBPR 2FH 1080I”, “RGB 2FH 480P”, “RGB 2FH 576P” or “RGB 2FH 1080I”. Audio signal quality: “STEREO”, “SPDIF 1”, “SPDIF 2”, or “SPDIF”. Audio System. Gives information about the audible audio system. Possible values are “Stereo”, ”Mono”, “Mono selected”, “Analog In: No Dig. Audio”, “Dolby Digital 1+1”, “Dolby Digital 1/0”, “Dolby Digital 2/0”, “Dolby Digital 2/1”, “Dolby Digital 2/2”, “Dolby Digital 3/0”, “Dolby Digital 3/1”, “Dolby Digital 3/2”, “Dolby Digital Dual I”, “Dolby Digital Dual II”, “MPEG 1+1”, “MPEG 1/0”, “MPEG 2/0”. This is the same info as you will see when pressing the “INFO” button in normal user mode (item “signal”). In case of ATSC receiving there will be no info displayed. Tuned Bit. Indicates if the selected preset is automatically tuned (via “Automatic Installation” in the setup menu) or via the automatic tuning system of the TV. In this case “Tuned bit” will show “YES”. If the TV was not able to auto-tune to the correct frequency, this item will show “NO”. So if “NO” is displayed, it could indicate that the customer has manually tuned to a frequency which was too far from a correct frequency, that the TV was not able to auto-tune any more. Preset Lock. Indicates if the selected preset has a child lock: “LOCKED” or “UNLOCKED”. Change via “MENU”, “TV”, “CHANNELS”, “CHANNEL LOCK”. Lock After. Indicates at what time the channel lock is set: “OFF” or e.g. “18:45” (lock time). Change “MENU”, “TV”, “CHANNELS”, “LOCK AFTER”. TV Ratings Lock. Indicates the “TV ratings lock” as set by the customer. Change via “MENU”, “TV”, “CHANNELS”, “TV RATINGS LOCK”. Possible values are: “ALL”, “NONE”, “TV-Y”, “TV-Y7”, “TV-G”, “TV-PG”, “TV-14” and “TV-MA”. Movie Ratings Lock. Indicates the “Movie ratings lock” as set by the customer. Change via “MENU”, “TV”, “CHANNELS”, “MOVIE RATINGS LOCK”. Possible values are: “ALL”, “NR”, “G”, “PG”, “PG-13”, “R”, “NC-17” and “X”. V-Chip Tv Status. Indicates the setting of the V-chip as applied by the selected TV channel. Same values can be shown as for “TV RATINGS LOCK”.

EN 16 •

• • •

•

• • • •

5.

EP1.1U

Service Modes, Error Codes, and Fault Finding

V-Chip Movie Status. Indicates the setting of the V-chip as applied by the selected TV channel. Same values can be shown as for “MOVIE RATINGS LOCK”. Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode). Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode). AVL. Indicates the last status of AVL (Automatic Volume Level): “ON” or “OFF”. Change via “MENU”, “TV”, “SOUND”, “AVL”. AVL can not be set in case of digital audio reception (e.g. Dolby Digital or AC3) Delta Volume. Indicates the last status of the delta volume for the selected preset as set by the customer: from “-12” to “+12”. Change via “MENU”, “TV”, “SOUND”, “DELTA VOLUME”. HDMI key validity. Indicates the key’s validity. IEEE key validity. Indicates the key’s validity (n.a.). POD key validity. Indicates the key’s validity (n.a.). Digital Signal Quality. Indicates quality of the received digital signal (0= low).

the Stand-by Processor will enable the 3V3, but will not go to protection now. The TV will stay in this situation until it is reset (Mains/AC Power supply interrupted). The abbreviations “SP” and “MP” in the figures stand for: • SP: protection or error detected by the Stand-by Processor. • MP: protection or error detected by the VIPER Main Processor.

How to Exit CSM Press any key on the RC-transmitter (with exception of the “CHANNEL +/-”, “VOLUME”, “MUTE” and digit (0-9) keys).

5.3

Stepwise Start-up The stepwise start-up method, as known from FTL/FTP sets is not valid any more. The situation for this chassis is as follows: when the TV is in a protection state detected via the Stand-by Processor (and thus blinking an error) and SDM is activated via shortcutting the pins on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic stepwise start-up. In combination with the start-up diagrams below, you can see which supplies are present at a certain moment. Important to know here is, that if e.g. the 3V3 detection fails (and thus error 11 is blinking) and the TV is restarted via SDM,

Off

Mains “off”

Mains “on”

- WakeUp requested - Acquisition needed

Stand-by (Off St-by)

- No data Acquisition required and no POD present - Tact SW pushed

WakeUp requested

Semi Stand-by

Active - St-by requested - Tact SW pushed

- WakeUp requested - Acquisition needed No data Acquisition required and POD present

WakeUp requested

- POD Card removed - Tact SW pushed

GoToProtection GoToProtection

POD* Stand-by GoToProtection

Protection

On * Only applicable for sets with CableCARD

TM

slot (POD) F_15400_095.eps 020206

Figure 5-2 Transition diagram

Service Modes, Error Codes, and Fault Finding

EP1.1U

Stand-by or Protection

Off

5.

EN 17

action holder: MIPS action holder: St-by

Mains is applied

autonomous action Standby Supply starts running. +5V2, 1V2Stb, 3V3Stb and +2V5D become present. In case of PDP 3V3 Vpr to CPU PDP becomes present.

st-by µP resets

All I/O lines have a “high” default state: - Assert the Viper reset. - Sound-Enable and Reset-Audio should remain “high”. - NVM power line is “high”, no NVM communication possible.

Initialise I/O pins of the st-by µP, start keyboard scanning, RC detection, P50 decoding. Wake up reasons are “off”.

If the protection state was left by short circuiting the SDM pins, detection of a protection condition during startup will stall the startup. Protection conditions in a playing set will be ignored. The protection mode will not be entered.

- Switch Sound-Enable and Reset-Audio “high”. They are “low” in the standby mode if the standby mode lasted longer than 2s.

*

In case of FHP PDP: Switch PDPGO “low” CPUGO (inverse of the stby I/O line POD-MODE) and PDPGO are then both “low” and the PDP is in the “low power” mode.

Switching the POD-MODE low in an FHP PDP set makes the CPUGO go “high” and starts the PDP CPU.

Switch “on” all supplies by switching LOW the POD-MODE and the ON-MODE I/O lines.

except in an FHP PDP Cold Boot

*

Wait 50ms and then start polling the detect5V, detect-8V6 and detect-12V every 40ms.

*

*

The availability of the supplies is checked through detect signals (delivered by dedicated detect-IC's) going to the st-by µP. These signals are available for +12V, +8V6, +5V, +1V2 and +2V5. A low to high transition of the signals should occur within a certain time after toggling the standby line. If an observers is detected before the time-out elapses, of course, the process should continue in order to minimize start up time.

+5V, +8V6, +12VS, +12VSW and Vsound are switched on

detect-5V received within 2900 ms after POD-MODE toggle?

Switching the POD-MODE and the “on” mode “low” in an SDI PDP set makes the PDP supplies go to the “on” mode.Within 4 seconds, a valid LVDS must be sent to the display to prevent protection. (valid for V3 version)

*

Switch “low” the NVM power reset line. Add a 2ms delay before trying to address the NVM to allow correct NVM initialization.

No

FHP PDP Set? No

Switching the PDPGO “high” will give a visual artefact and should only be done if really necessary.

Yes Switch PDPGO high: PDP should start: 5V, 8V6 and 12V are activated

Yes

activate +5V supply detection algorithm

Yes

detect-5V received within 2900 ms after PDPGO toggle?

No

+12V error

No

+5V error

SP detect-12VSW received within 2900 ms after POD-mode toggle?

Yes activate +12VSW supply detection algorithm

SP

No need to wait for the 8V6 detection at this point.

*

detect-8V6 received within 6300 ms after POD-mode toggle? Startup shall not wait for this detection and continue startup.

Yes

No Enable the +1V2 supply (ENABLE-1V2)

+8V6 error

activate +8V6 supply detection algorithm

SP

return

Start polling the detect-1V2 every 40ms

To part B

To part B

* Only applicable for sets with CableCARD

TM

slot (POD)

Figure 5-3 “Off” to “Semi Stand-by” flowchart (part 1)

F_15400_096a.eps 020206

EN 18

5.

Service Modes, Error Codes, and Fault Finding

EP1.1U

From part A

From part B action holder: MIPS action holder: St-by autonomous action

detect-1V2 received within 250ms?

No

+1.2V error

Yes

SP

Enable the supply for +2.5V and +3.3V (ENABLE-3V3) No separate enable and detect is present for the +2V5 supply in the Baby Jaguar. No

Start polling the detect-3V3 every 40ms

detect-3V3 received within 250 ms?

No

+3.3V error

Yes

SP

Activate supply detection algorithms for +1V2 and +3V3

SUPPLY-FAULT I/O line is High?

No

Supply fault error

Yes

SP

Enable the supply fault detection interrupt

Set I²C slave address of Standby µP to (A0h)

Detect EJTAG debug probe (pulling pin of the probe interface to ground by inserting EJTAG probe)

EJTAG probe connected ?

Yes

No

No

Cold boot?

Yes

Release viper reset Feed warm boot script(2)

Release viper reset Feed initializing boot script (3) disable alive mechanism

Release viper reset Feed cold boot script(1) Release PNX2015 reset 100ms after Viper reset is released Release PNX2015 reset 100ms after Viper reset is released

Bootscript ready in 1250 ms?

No

Yes Set I²C slave address of Standby µP to (64h)

RPC start (comm. protocol)

Flash to RAM image transfer succeeded within 30s?

No

Code = 5 Yes

Switch Viper in reset

To part C

To part C

Code = 53

No

Viper SW initialization succeeded within 20s?

To part C

To part C

F_15400_096b.eps 260505

Figure 5-4 “Off” to “Semi Stand-by” flowchart (part 2)

Service Modes, Error Codes, and Fault Finding

From part B

EP1.1U

From part B

5.

EN 19

From part B action holder: MIPS

Wait 10ms

Yes

action holder: St-by Enable Alive check mechanism

autonomous action

Switch the NVM reset line HIGH. MIPS reads the wake up reason from standby µP.

Disable all supply related protections and switch off the +2V5, +3V3 DC/DC converter.

Wait until Viper starts to communicate

Wait for the +8V6 to be detected if not yet present. (if it does not come, the standby µP will enter a protection mode, this is not a dead end here)

Wait 5ms

switch off the remaining DC/DC converters

3-th try?

Switch POD-MODE and ON-MODE I/O line “high”.

*

SDI PDP Set?

* Yes

Yes

Switch “on” the LVDS output of the PNX2015 with a correct clock frequency within 4s after switching the POD and “on” mode to prevent PDP display supply protection.

*

PWR-OK-PDP received within 10s after POD and “on” mode toggle ?

Yes

Log Code as error code

No

Log display error and enter protection mode

Init SDI PDP These LVDS items are SDI V3 display only !!

SP

No

FHP PDP Set?

SP Switch LVDS back off if end state is not the active state.

Yes

Send STBYEN = 1 PFCON = 1 VCCON = 1 to PDP display (I²C)

Switch PDPGO “low”

Init FHP PDP No

Start 4 seconds preheating timer in case of a LPL scanning backlight LCD set.

AVIP needs to be started before the MPIF in order to have a good clock distribution. AVIP default power-up mode is Standby. The Viper instructs AVIP via I²C to enable all the PLLs and clocks and hence enter to Full Power mode.

Initialize PNX2015 HD subsystem

MPIFs should be initialized MPIF should deliver 4 observers: POR= 0; normal operation MSUP = 1: Main supply is present ASUP = 1; audio supply is present ROK = 1; reference frequency is present (coming from AVIP)

All observers present with correct state?

No

Log appropriate Observer error

Yes Initialize tuners and HDMI

Initialize source selection

Initialize video processing ICs - Spider (if available)

Initialize Columbus Initialize 3D Combfilter Initialize AutoTV

Do not enter semi-standby state in case of an LPL scanning backlight LCD set before 4 s preheating timer has elapsed.

Semi-Stand-by

* Only applicable for sets with CableCARD

TM

slot (POD)

Figure 5-5 “Off” to “Semi Stand-by” flowchart (part 3)

F_15400_096c.eps 020206

EN 20

5.

EP1.1U

Service Modes, Error Codes, and Fault Finding

42" / 50" SDI V4 Semi Stand-by

action holder: MIPS action holder: St-by autonomous action

RGB video blanking and audio mute.

Initialize audio and video processing ICs and functions.

Wait untill QVCP generates a valid LVDS output clock

Switch “on” LVDS transmitter (PNX2015) (if not already on).

Switch the SDI Picture Flag “low” to enable picture. 1.5 seconds later, the display will unblank automatically and show the LVDS content.

Enable anti-aging (if applicable).

Switch “off” RGB blanking after valid, stable video.

Switch Audio-Reset and sound enable “low” and demute.

Active Figure 5-6 “Semi Stand-by” to “Active” flowchart

F_15400_097.eps 260505

Service Modes, Error Codes, and Fault Finding

EP1.1U

42" / 50" SDI V4 Active

action holder: MIPS action holder: St-by autonomous action

Mute all sound outputs.

Switch RESET_AUDIO and SOUND_ENABLE lines “high”

Blank PDP display.

Mute all video outputs.

Wait 600ms to prevent image retention (display error)

Switch “off” LVDS signal (PNX2015).

Switch the SDI Picture Flag “high” to prevent testpattern display in semi-standby mode

Semi Stand-by

F_15400_098.eps 260505

Figure 5-7 “Active” to “Semi Stand-by” flowchart

5.

EN 21

EN 22

5.

EP1.1U

Service Modes, Error Codes, and Fault Finding

POD*

Semi Stand-by

action holder: MIPS action holder: St-by autonomous action

Transfer Wake up reasons to the Stand-by µP.

Images are re-transferred to DDR-RAM from Flash RAM (verification through checksum).

MIPS image completes the application reload, stops DDR-RAM access, puts itself in a sleepmode, and signals the standby µP when the Stand-by mode can be entered.

DDR-RAM is put in self refresh mode and the images are kept in the hibernating DDR-RAM.

Wait 5ms

Switch Viper in reset state

Wait 10ms

Switch the NVM reset line “high”.

Disable all supply related protections and switch “off” the +2V5, +3V3 DC/DC converter.

Wait 5ms

Switch “off” the remaining DC/DC converters

*

Switch “off” all supplies by switching “high” the PODMODE and the ON-MODE I/O lines. Important remark: release RESET AUDIO and SOUND_ENABLE 2 sec after entering stand-by to save power

For PDP this means CPUGO becomes low.

Stand-by

* Only applicable for sets with CableCARD

TM

slot (POD)

Figure 5-8 “Semi Stand-by” to “Stand-by” flowchart

F_15400_099.eps 020206

Service Modes, Error Codes, and Fault Finding

EP1.1U

MP

action holder: MIPS

5.

SP

action holder: St-by autonomous action

Log the appropriate error and set stand-by flag in NVM

Redefine wake up reasons for protection state and transfer to stand-by µP.

Switch “off” LCD lamp supply (for LCD sets)

If needed to speed up this transition, this block could be omitted. This is depending on the outcome of the safety investigations.

Wait 250ms (min. = 200ms)

Switch “off” LVDS signal

Switch “off” 12V LCD supply within a time frame of min. 0.5ms to max. 50ms after LVDS switch “off”. (for LCD sets)

Ask stand-by µP to enter protection state

Switch Viper in reset state

Wait 10ms

Switch the NVM reset line “high”.

Disable all supply related protections and switch “off” the +2V5, +3V3 DC/DC converter.

Wait 5ms

Switch “off” the remaining DC/DC converters

*

Switch “off” all supplies by switching “high” the PODMODE and the ON-MODE I/O lines.

Flash LED in order to indicate protection state.

Protection

* Only applicable for sets with CableCARD

TM

slot (POD)

Figure 5-9 “Protection” flowchart

F_15400_102.eps 020206

EN 23

EN 24

5.

5.4

Service Tools

5.4.1

ComPair

EP1.1U

Service Modes, Error Codes, and Fault Finding

TO UART SERVICE CONNECTOR

Introduction ComPair (Computer Aided Repair) is a service tool for Philips Consumer Electronics products. ComPair is a further development on the European DST (service remote control), which allows faster and more accurate diagnostics. ComPair has three big advantages: 1. ComPair helps you to quickly get an understanding on how to repair the chassis in a short time by guiding you systematically through the repair procedures. 2. ComPair allows very detailed diagnostics (on I2C level) and is therefore capable of accurately indicating problem areas. You do not have to know anything about I2C commands yourself because ComPair takes care of this. 3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the microprocessor is working) and all repair information is directly available. When ComPair is installed together with the Force/SearchMan electronic manual of the defective chassis, schematics and PWBs are only a mouse click away. Specifications ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair interface box is connected to the PC via a serial (or RS-232) cable. For this chassis, the ComPair interface box and the TV communicate via a bi-directional service cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television. ComPair can gather diagnostic information in two ways: • Automatically (by communicating with the television): ComPair can automatically read out the contents of the entire error buffer. Diagnosis is done on I2C/UART level. ComPair can access the I2C/UART bus of the television. ComPair can send and receive I2C/UART commands to the microcontroller of the television. In this way, it is possible for ComPair to communicate (read and write) to devices on the I2C/UART buses of the TV-set. • Manually (by asking questions to you): Automatic diagnosis is only possible if the microcontroller of the television is working correctly and only to a certain extent. When this is not the case, ComPair will guide you through the fault finding tree by asking you questions (e.g. Does the screen give a picture? Click on the correct answer: YES / NO) and showing you examples (e.g. Measure test-point I7 and click on the correct oscillogram you see on the oscilloscope). You can answer by clicking on a link (e.g. text or a waveform picture) that will bring you to the next step in the fault finding process. By a combination of automatic diagnostics and an interactive question / answer procedure, ComPair will enable you to find most problems in a fast and effective way. How To Connect This is described in the chassis fault finding database in ComPair. Caution: It is compulsory to connect the TV to the PC as shown in the picture below (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!

PC

TO I2C SERVICE CONNECTOR

VCR

Power 9V DC

I2C

E_06532_021.eps 180804

Figure 5-10 ComPair interface connection How To Order ComPair order codes: • ComPair Software: ST4191. • ComPair Interface Box: 4822 727 21631. • AC Adapter: T405-ND. • ComPair Quick Start Guide: ST4190. • ComPair interface extension cable: 3139 131 03791. • ComPair UART interface cable: 3122 785 90630. Note: If you encounter any problems, contact your local support desk. 5.4.2

LVDS Tool Introduction This service tool (also called “ComPair Assistant 1“) may help you to identify, in case the TV does not show any picture, whether the Small Signal Board (SSB) or the display of a Flat TV is defective. Furthermore it is possible to program EPLDs with this tool (Byte blaster). Read the user manual for an explanation of this feature. Since 2004, the LVDS output connectors in our Flat TV models are standardized (with some exceptions). With the two delivered LVDS interface cables (31p and 20p) you can cover most chassis (in special cases, an extra cable will be offered). When operating, the tool will show a small (scaled) picture on a VGA monitor. Due to a limited memory capacity, it is not possible to increase the size when processing high-resolution LVDS signals (> 1280x960). Below this resolution, or when a DVI monitor is used, the displayed picture will be full size. Generally this tool is intended to determine if the SSB is working or not. Thus to determine if LVDS, RGB, and sync signals are okay. How to Connect Connections are explained in the user manual, which is packed with the tool. Note: To use the LVDS tool, you must have ComPair release 2004-1 (or later) on your PC (engine version >= 2.2.05). For every TV type number and screen size, one must choose the proper settings via ComPair. The ComPair file will be updated regularly with new introduced chassis information. How to Order • LVDS tool (incl. two LVDS cables: 31p and 20p): 3122 785 90671. • LVDS tool Service Manual: 3122 785 00810.

Service Modes, Error Codes, and Fault Finding 5.5

Error Codes

5.5.1

Introduction

5.

EN 25

– –

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error has occurred, the error is added to the list of errors, provided the list is not full or the error is a protection error. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained), except when the error is a protection error. To prevent that an occasional error stays in the list forever, the error is removed from the list after 50+ operation hours. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them.

• • 5.5.3

00 00 00 00 00: No errors detected 06 00 00 00 00: Error code 6 is the last and only detected error – 09 06 00 00 00: Error code 6 was first detected and error code 9 is the last detected error Via the blinking LED procedure (when you have no picture). See next paragraph. Via ComPair.

How to Clear the Error Buffer Use one of the following methods: • By activation of the “RESET ERROR BUFFER” command in the SAM menu. • With a normal RC, key in sequence “MUTE” followed by “062599” and “OK”. • If the content of the error buffer has not changed for 50+ hours, it resets automatically.

5.5.4 Basically there are three kinds of errors: • Errors detected by the Stand-by Processor. These errors will always lead to protection and an automatic start of the blinking LED for the concerned error (see paragraph “The Blinking LED Procedure”). In these cases SDM can be used to start up (see chapter “Stepwise Start-up”). • Errors detected by VIPER that lead to protection. In this case the TV will go to protection and the front LED will blink at 3 Hz. Further diagnosis via service modes is not possible here (see also paragraph “Error Codes” -> “Error Buffer” > “Extra Info”). • Errors detected by VIPER that do not lead to protection. In this case the error can be read out via ComPair, via blinking LED method, or in case you have picture, via SAM. 5.5.2

EP1.1U

Error Buffer In case of non-intermittent faults, clear the error buffer before you begin the repair (before clearing the buffer, write down the content, as this history can give you significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g., a fault in the protection detection circuitry can also lead to a protection). There are several mechanisms of error detection: • Via error bits in the status registers of ICs. • Via polling on I/O pins going to the stand-by processor. • Via sensing of analogue values on the stand-by processor. • Via a “not acknowledge” of an I2C communication Take notice that some errors need more than 90 seconds before they start blinking. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking.

How to Read the Error Buffer Use one of the following methods: • On screen via the SAM (only if you have a picture). E.g.: Table 5-3 Error code overview Error

Description

Error/Prot

Detected by

Device

Defective module

Result

1

I2C1

P

VIPER

n.a.

I2C1_blocked

Protection + 3 Hz blinking

2

I2C2

P

VIPER

n.a.

I2C2_blocked

Protection + 3 Hz blinking

3

I2C3

P

Stby µP

n.a.

I2C3_blocked

Protection + 3 Hz blinking

4

I2C4

P

VIPER

n.a.

I2C4_blocked

Protection + 3 Hz blinking

5

VIPER does not boot (hardware failure)

P

Stby µP

PNX8550

Protection + Error blinking

6

5V supply

P

Stby µP

n.a.

Protection + Error blinking

8

1.2V DC/DC

P

Stby µP

n.a.

Protection + Error blinking

11

3.3V DC/DC

P

Stby µP

n.a.

Protection + Error blinking

12

12V supply

P

Stby µP

n.a.

14

Supply Class D amplifiers

P

Stby µP

17

MPIF1 Audio Supply (ASUP)

E

VIPER

PNX3000

IF I/O

Error logged

18

MPIF1 ref freq

E

VIPER

PNX3000

IF I/O

Error logged

Protection + Error blinking Protection + Error blinking

25

Supply fault

P

Stby µP

27

Phoenix

E

VIPER

PNX2015B

HD subsystem

Protection + Error blinking Error logged

29

AVIP1

E

VIPER

PNX2015

AV input processor 1

Error logged

32

MPIF1

E

VIPER

KN10241C

Analog Front End 1

Error logged

34

Tuner1

E

VIPER

37

Channel decoder

E

VIPER

NXT2003

Tuner 1

Error logged Error logged

43

Hi Rate Front End

E

VIPER

TDA8751

HDMI

Error logged

45

Columbus 1

E

VIPER

PNX2015

Comb filter

Error logged

53

VIPER does not boot (software failure)

P

Stby µP

PNX8550

63

PDP Display

P

VIPER

Display

Protection + 3 Hz blinking

Protection + Error blinking

EN 26

5.

EP1.1U

Service Modes, Error Codes, and Fault Finding

Extra Info • Error 1 (I2C bus 1 blocked). When this error occurs, the TV will go to protection and the front LED will blink at 3 Hz. Now you can partially restart the TV via the SDM shortcut pins on the SSB. Depending on the software version it is possible that no further diagnose (error code read-out) is possible. With the knowledge that only errors 1, 2, 4, and 63 result in a 3 Hz blinking LED, the range of possible defects is limited. • Error 2 (I2C bus 2 blocked). When this error occurs, the TV will go to protection and the front LED will blink at 3 Hz. Now you can partially restart the TV via the SDM shortcut pins on the SSB. Due to hardware restriction (I2C bus 2 is the fast I2C bus) it will be impossible to start up the VIPER and therefore it is also impossible to read out the error codes via ComPair or via the blinking LED method. With the knowledge that only errors 1, 2, 4, and 63 result in a 3 Hz blinking LED, the range of possible defects is limited. When you have restarted the TV via the SDM shortcut pins, and then pressed "CH+" on your remote control, the TV will go to protection again, and the front LED blink at 3 Hz again. This could be an indication that the problem is related to error 2. • Error 3 (I2C bus 3 blocked). There are only three devices on I2C bus 3: VIPER, Stand-by Processor, and NVM. The Stand-by Processor is the detection device of this error, so this error will only occur if the VIPER or the NVM is blocking the bus. This error will also be logged when the NVM gives no acknowledge on the I2C bus (see error 44). Note that if the 12 V supply is missing (connector 1M46 on the SSB), the DC/DC supply on the SSB will not work. Therefore the VIPER will not get supplies and could block I2C bus 3. So, a missing 12 V can also lead to an error 3. • Error 4 (I2C bus 4 blocked). Same remark as with error 1. • Error 5 (I2C bus 5 blocked). This error will point to a severe hardware problem around the VIPER (supplies not OK, VIPER completely dead, I2C link between VIPER and Stand-by Processor broken, etc...). • Error 7 (8.6 V error). Except a physical problem with the 8.6 V itself, it is also possible that there is something wrong with the Audio DC Protection: see paragraph "Hardware Protections" for this. • Error 12 (12 V error). Except a physical problem with the 12 V itself, it is also possible that there is something wrong with the Audio DC Protection: see paragraph "Hardware Protections" for this. • Error 14 (Audio supply). This error is triggered in case of too low voltage of the audio supplies and therefore a drop of the audio supply voltage of below appr. 9 V per supply rail (or lower than 18 V rail to rail). Also a DC voltage of higher than 1 V DC on the speakers will lead to protection and error 14 blinking. For LCD sets this circuit can be found on schematic SA3, for PDP sets this can be found on schematic C. It should be noted that for 26-inch models there is only a supply link between the amplifiers and the stand-by µC whereas in all other models this link is implemented by Audio-Prot line pin 7 on 1 M02. • Error 29 (AVIP1). This error will probably generate extra errors. You will probably also see errors 32 (MPIF) and error 31 (AVIP 2). Error 29 and 31 will always be logged together due to the fact that both AVIPs are inside the PNX2015 and are on the same I2C bus. In this case start looking for the cause around AVIP (part of PNX2015). • Error 31 (AVIP2). See info on error 29. • Error 34 (Tuner 1). When this error is logged, it is not sure that there is something wrong with the tuner itself. It is also possible that there is something wrong with the communication between channel decoder and tuner. See schematic B2B. • Error 37 (Channel decoder). This error will always log error 34 (tuner) extra. This is due to the fact that the tuner I2C bus is coming from the channel decoder. • Error 44 (NVM). This error will never occur because it is masked by error 3 (I2C bus 3). The detection mechanism for error 3 checks on an I2C acknowledge of the NVM. If

•

NVM gives no acknowledge, the stand-by software assumes that the bus is blocked, the TV goes to protection and error 3 will be blinking. Error 53. This error will indicate that the VIPER has started to function (by reading his boot script, if this would have failed, error 5 would blink) but initialization was never completed because of hardware peripheral problems (NAND flash, ...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version).

5.6

The Blinking LED Procedure

5.6.1

Introduction The blinking LED procedure can be split up into two situations: • Blinking LED procedure in case of a protection detected by the stand-by processor. In this case the error is automatically blinked. This will be only one error, namely the one that is causing the protection. Therefore, you do not have to do anything special, just read out the blinks. A long blink indicates the decimal digit, a short blink indicates the units. • Blinking LED procedure in the “on” state. Via this procedure, you can make the contents of the error buffer visible via the front LED. This is especially useful for fault finding, when there is no picture. When the blinking LED procedure is activated in the “on” state, the front LED will show (blink) the contents of the error-buffer. Error-codes > 10 are shown as follows: 1. “n” long blinks (where “n” = 1 - 9) indicating decimal digit, 2. A pause of 1.5 s, 3. “n” short blinks (where “n”= 1 - 9), 4. A pause of approx. 3 s. 5. When all the error-codes are displayed, the sequence finishes with a LED blink of 3 s, 6. The sequence starts again. Example: Error 12 9 6 0 0. After activation of the SDM, the front LED will show: 1. 1 long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s, 2. 2 short blinks of 250 ms followed by a pause of 3 s, 3. 9 short blinks followed by a pause of 3 s, 4. 6 short blinks followed by a pause of 3 s, 5. 1 long blink of 3 s to finish the sequence, 6. The sequence starts again.

5.6.2

How to Activate Use one of the following methods: • Activate the SDM. The blinking front LED will show the entire contents of the error buffer (this works in “normal operation” mode). • Transmit the commands “MUTE” - “062500” - “OK” with a normal RC. The complete error buffer is shown. Take notice that it takes some seconds before the blinking LED starts. • Transmit the commands “MUTE” - “06250x” - “OK” with a normal RC (where “x” is a number between 1 and 5). When x= 1 the last detected error is shown, x= 2 the second last error, etc.... Take notice that it takes some seconds before the blinking LED starts.

Service Modes, Error Codes, and Fault Finding 5.7

Protections

5.7.1

Software Protections Most of the protections and errors use either the stand-by microprocessor or the VIPER controller as detection device. Since in these cases, checking of observers, polling of ADCs, filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions: • Protections related to supplies: check of the 12V, +5V, +8V6, +1.2V, +2.5V and +3.3V. • Protections related to breakdown of the safety check mechanism. E.g. since a lot of protection detections are done by means of the VIPER, failing of the VIPER communication will have to initiate a protection mode since safety cannot be guaranteed anymore. Remark on the Supply Errors The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. Protections during Start-up During TV start-up, some voltages and IC observers are actively monitored to be able to optimize the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see paragraph “Stepwise Start-up").

5.7.2

Hardware Protections There is one hardware protection in this chassis: “Audio DC Protection”. This protection occurs when there is a DC voltage on the speakers. In that case the main supply is switched "off", but the stand-by supply is still working. For the Samsung V4 PDP displays, the 8V6 supply is switched "off" and the LED on the display’s Main Supply blinks eleven times, which means there is an overvoltage protection. The front LED of the TV will blink error 7 (8V6 error). In case of LCD supplies, the 12V supply will drop. This will be detected by the stand-by processor, which will start blinking the 12 V error (error 12). Repair Tip • It is possible that you have an audio DC protection because of an interruption in one or both speakers (the DC voltage that is still on the circuit cannot disappear through the speakers).

5.8

EP1.1U

5.

EN 27

Fault Finding and Repair Tips Read also paragraph "Error Codes" - "Extra Info".

5.8.1

Exit “Factory Mode” When an "F" is displayed in the screen's right corner, this means that the set is in "Factory" mode, and it normally happens after a new SSB has been mounted. To exit this mode, push the "VOLUME minus" button on the TV's keyboard control for 5 seconds and restart the set

5.8.2

MPIF Important things to make the MPIF work: • Supply. • Clock signal from the AVIP. • I2C from the VIPER.

5.8.3

AVIP Important things to make the AVIP work: • Supplies. • Clock signal from the VIPER. • I2C from the VIPER (error 29 and 31).

5.8.4

DC/DC Converter Introduction • The best way to find a failure in the DC/DC converters is to check their starting-up sequence at power "on" via the Mains/AC Power cord, presuming that the Stand-by Processor is operational. • If the input voltage of the DC/DC converters is around 12 V (measured on the decoupling capacitors 2U17/2U25/ 2U45) and the ENABLE signals are "low" (active), then the output voltages should have their normal values. • First, the Stand-by Processor activates the +1V2 supply (via ENABLE-1V2). • Then, after this voltage becomes present and is detected OK (about 100 ms), the other two voltages (+2V5 and +3V3) will be activated (via ENABLE-3V3). • The current consumption of controller IC 7U00 is around 20 mA (that means around 200 mV drop voltage across resistor 3U22). • The current capability of DC/DC converters is quite high (short-circuit current is 7 to 10 A), therefore if there is a linear integrated stabilizer that, for example delivers 1.8V from +3V3 with its output overloaded, the +3V3 stays usually at its normal value even though the consumption from +3V3 increases significantly. • The +2V5 supply voltage is obtained via a linear stabilizer made with discrete components that can deliver a lot of current. Therefore, in case +2V5 (or +2V5D) is shortcircuited to GND, the +3V3 will not have the normal value but much less. • The supply voltage +12VSW is protected for over-currents by fuse 1U04. Fault Finding • Symptom: +1V2, +2V5, and +3V3 not present (even for a short while ~10ms). 1. Check 12V availability (fuse 1U01, resistor 3U22, power MOS-FETs) and enable signal ENABLE-1V2 (active low). 2. Check the voltage on pin 9 (1.5 V). 3. Check for +1V2 output voltage short-circuit to GND that can generate pulsed over-currents 7-10 A through coil 5U03. 4. Check the over-current detection circuit (2U12 or 3U97 interrupted).

EN 28 •

•

•

5.

EP1.1U

Service Modes, Error Codes, and Fault Finding

Symptom: +1V2 present for about 100 ms. Supplies +2V5 and +3V3 not rising. 1. Check the ENABLE-3V3 signal (active "low"). 2. Check the voltage on pin 8 (1.5 V). 3. Check the under-voltage detection circuit (the voltage on collector of transistor 7U10-1 should be less than 0.8 V). 4. Check for output voltages short-circuits to GND (+3V3, +2V5 and +2V5D) that generate pulsed over-currents of 7-10 A through coil 5U00. 5. Check the over-current detection circuit (2U18 or 3U83 interrupted). Symptom: +1V2 OK, but +2V5 and +3V3 present for about 100 ms. Cause: The SUPPLY-FAULT line stays "low" even though the +3V3 and +1V2 is available. The Stand-by Processor is detecting that and switches all supply voltages "off". 1. Check the drop voltage across resistor 3U22 (this could be too high) 2. Check if the +1V2 or +3V3 are higher than their normal values. This can be due to defective DC feedback of the respective DC/DC converter (3U18 or 3UA7). Symptom: +1V2, +2V5, and +3V3 look okay, except the ripple voltage is increased (audible noise can come from the filtering coils 5U00 or 5U03). Cause: Instability of the frequency and/or duty cycle of one or both DC/DC converters. – Check resistor 3U06, the decoupling capacitors, the AC feedback circuits (2U20 + 2U21 + 3U14 + 3U15 for +1V2 or 2U19 + 2U85 + 3U12 + 3U13 for +3V3), the compensation capacitors 2U09, 2U10, 2U23 and 2U73, and IC 7U00.

Note 1: If fuse 1U01 is broken, this usually means a pair of defective power MOSFETs (7U01 or 7U03). Item 7U00 should be replaced as well in this case.

5.9

Software Upgrading

5.9.1

Introduction The set software and security keys are stored in a NAND-Flash (item 7P80), which is connected to the VIPER via the PCI bus. It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a standalone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in chapter 3 "Directions For Use". Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys!!! See table “SSB service kits” for the order codes. Perform the following actions after SSB replacement: 1. Set the correct option codes (see sticker inside the TV). 2. Update the TV software (see chapter 3 for instructions). 3. Perform the alignments as described in chapter 8. 4. Check in CSM menu 5 if the HDMI and POD keys are valid.

Table 5-4 SSB service kits (for EL and EP chassis) Model Number 26PF5321D/37 32PF5321D/37 32PF7321D/37 37PF7321D/37 42PF5421D/37 42PF7321D/37 42PF7421D/37 50PF7321D/37

5.9.2

New SSB order code 3139 267 27681 3139 267 27711 3139 267 27731 3139 267 27691 3139 267 27671 3139 267 27661 3139 267 27721 3139 267 27701

Main Software Upgrade The software image resides in the NAND-Flash, and is formatted in the following way: Partition 1 Trimedia2 image Trimedia1 image MIPS image

USB CUSTOMER

USB Download Application

USB SERVICE

uBTM (boot block)

EJTAG

Partition 0

E_14700_082.eps 120505

Figure 5-11 NAND-Flash format Executables are stored as files in a file system. The boot loader (uBTM) will load the USB Download Application in partition 0 (USB drivers, bootscript, etc). This application makes it then possible to upgrade the main software via USB. Installing "Partition 0" software is possible via an external EJTAG tool, but also in a special way with the USB stick (see description in paragraph “Partition 0“). Partition 1 (Customer) To do a main software upgrade (partition 1) via USB, the set must be operational, and the "Partition 0" files for the VIPER must be installed in the NAND-Flash! The new software can be uploaded to the TV by using a portable memory device or USB storage compliant devices (e.g. USB memory stick). You can download the new software from the Philips website to your PC. Partition 0 (Service) If the "Partition 0" software is corrupted, the software needs to be re-installed. To upgrade this “USB download application” (partition 0 except the bootblock), insert an USB stick with the correct software, but press the “red” button on the remote control (in ”TV” mode) when it is asked via the on screen text. Caution: • The USB download application will now erase both partitions (except the boot block), so you need to reload the main SW after upgrading the USB download application. As long as this is not done, the USB download application will start when the set is switched “on”. • When something goes wrong during the progress of this method (e.g. voltage dip or corrupted software file), the set will not start up, and can only be recovered via the EJTAG tool!

Service Modes, Error Codes, and Fault Finding 5.9.3

Manual Start of the Main Software Upgrade Application Normally, the software upgrading procedure will start automatically, when a memory device with the correct software is inserted, but in case this does not work, it is possible to force the TV into the software upgrade application. To do so: • Disconnect the TV from the Mains/AC Power. • Press the “OK” button on a Philips DVD RC-6 remote control (it is also possible to use the TV remote in "DVD" mode). • Keep the “OK” button pressed while connecting the TV to the Mains/AC Power. • The software upgrade application will start. • When a memory device with upgrade software is connected, the upgrade process will start.

5.9.4

Stand-by Software Upgrade It will be possible to upgrade the Stand-by software via a PC and the ComPair interface. Check paragraph "ComPair" on how to connect the interface. To upgrade the Stand-by software, use the following steps: 1. Disconnect the TV from the Mains/AC Power. 2. Short circuit the SPI pins [2] on the SSB. They are located outside the shielding (see figure “SDM and SPI service pads” earlier in this chapter). 3. Keep the SPI pins shorted while connecting the TV to the Mains/AC Power. 4. Release the short circuit after approx. two seconds. 5. Start up HyperTerminal (can be found in every Windows application via Programs -> Accessories -> Communications -> HyperTerminal. Use the following settings: – COM1 – Bits per second = 38400 – Data bits = 8 – Parity = none – Stop bits = 1 – Flow control = Xon / Xoff. 6. Press “Shift U” on your PC keyboard. You should now see the following info: – PNX2015 Loader V1.0 – 19-09-2003 – DEVID=0x05 – Erasing – MCSUM=0x0000 – = 7. If you do not see the above info, restart the above procedure, and check your HyperTerminal settings and the connections between PC and TV. 8. Via “Transfer” -> “Send text file ...”, you can send the proper upgrade file to the TV. This file will be distributed via the Service Organization. 9. After successful programming, you must see the following info: – DCSUM=0xECB3 – :Ok – MCSUM=0xECB3 – Programming – PCSUM=0xECB3 – Finished 10. If you do not see this info, restart the complete procedure. 11. Close HyperTerminal. 12. Disconnect and connect Mains/AC Power again.

EP1.1U

5.

EN 29

EN 30

5.

EP1.1U

Service Modes, Error Codes, and Fault Finding

Personal Notes:

E_06532_012.eps 131004

Block Diagrams, Test Point Overviews, and Waveforms

EP1.1U AA

6.

EN 31

6. Block Diagrams, Test Point Overviews, and Waveforms Wiring Diagram 42” & 50” WIRING 42” & 50” SDI PLASMA

PLASMA PANEL 8740

8740

9P10 CN8003

8P9

CN8006 10P

8P11 CN4004

LEFT SPEAKER

5P11 CN1M46

5P10 7P 4P CN1M03 CN1M02 CN1M10

8M02

9P12

CN5003

RIGHT SPEAKER

PDP X-MAIN DRIVING BOARD

PDP POWER SUPPLY

5P CN8005

PDP Y-MAIN DRIVING BOARD

CN8001 2P3

Shielding

8J02

8900

7P 1M02

4P 1740

10P13 1J02

B SSB

10P CN2026

8G50 31P LVDS

8M21 8M60

4P 1M60

31P 1G50

31P 1G50

3P 6P 1M01 1M21

9P 11P 1M52 1M36

8M36

E CONTROL BOARD

8321

1H07 14P EJTAG

11P 1M36

D SIDE I/O FILTER

3P 1M65

TUNER 5P

4P 1M60

1M16 3P Compair

8187

AC/Supply

1M01

J

3P

8M01

LED PANEL

6P 1M01

G_16290_013.eps 020206

Block Diagrams, Test Point Overviews, and Waveforms

EP1.1U AA

6.

EN 32

Block Diagram Video VIDEO

1A10 12

IF-OUT

MAIN HYBRID 14 IF-1 TUNER

1

15

14

IF-2

1T01

7

2

7T13 LA7795T-E

8

108 VIFINN

SOUND TRAP

LPF

7 6

3

7T12

SUPPLY 28 35 QSSOUT

44 DIGITAL BLOCK 43

4

5

3A17

B02A CHANNNEL DECODER

MAIN MEMORY

North tunnel

SCL-DMA

South tunnel

CVBS-OUTB 22

ADC

FAT-ADC-INN

7

FAT-ADC-INP

B04A AUDIO/VIDEO

N.C.

Memory based scaler

FEC

GPIO 7

+

5 C3

AV2_C

Yyuv 2FH

B07C

IRQ-FE-MAIN

8 CVBS|Y4

B05A

DATA LINK 1

D

LPF

B07C

FM-TRAP

48

STROBE1N 60

STROBE1N-MAIN

R4 AVP1_DLK1SN

STROBE1P 61

STROBE1P-MAIN

R3 AVP1_DLK1SP

DATA1N 62

DATA1N-MAIN

R2 AVP1_DLK1DN

DATA1P 63

DATA1P-MAIN

R1 AVP1_DLK1DP

STROBE3N 50

STROBE3N-MAIN

N4 AVP1_DLK3SN

CVBS SEC YUV RGB LEVEL ADAPT INV. PAL

27 B|PB|U_1 CLAMP

30 R|PR|V_2

1002 (1302)

1M36 (1304) 2

FRONT_Y-CVBS_IN

VIDEO

4

V

1M36 2 FRONT_Y-CVBS 4 FRONT_C

U,V

DATA LINK 2

A D

DATA3P 53

DATA3P-MAIN

N1 AVP1_DLK3DP

STROBE2N 55

STROBE2N-MAIN

P4 AVP1_DLK2SN

STROBE2P 56

STROBE2P-MAIN

P3 AVP1_DLK2SP

CLP PRIM CLP SEC CLP yuv

TIMING CIRCUIT

P2 AVP1_DLK2DN

DATA2P-MAIN

P1 AVP1_DLK2DP

46

HV-PRM-MAIN

M3

40

CLK-MPIF

M4

AV2_FBL

L2

AV6_VSYNC

G2

N.C. FRONT_C_IN

2

DATA2N-MAIN

DATA2N 57

3

S VIDEO 5

N.C.

4

B07B HDMI: I/O + CONTROL

B07A HDMI +SUPPLY

DATA LINK 3

N2 AVP1_DLK3DN

DATA2P 123

MONO SEC.

32 B|PB|U_2

N3 AVP1_DLK3SP

DATA3N-MAIN

3D Comb filter and noice reduction

Video TS router

DV2_DATA(0-9)

DV3F-DATA (0-7)

AVP1_HVINFO1 MPIF_CLK Video MPEG decoder

VO-1

AVP2_VSYNC2

B04B DV I/O INTERFACE

7B50 TDA9975HS

5 Layer primary video out HD/VGA/ 656

Dual con acces

AVIP-2

AVP2_HSYNCFBL2

VIDEO DAC

DV-ROUT

COLUMBUS

DV3_DATA(0-9)

D

U

STROBE3P-MAIN

DATA3N 52

Yyuv 2Fh

Yyuv A

31 G|Y|Y_2

1001 (1301) 1

2nd SIF A/D

STROBE3P 51

B04G

7G40 ADV7123KSTZ140

1SD+1HD YUV Video in

F27

26 G|Y|Y_1

DATA LINK 3

D

25 R|PR|V_1

SIDE I/O

1H00 27M

B06 VIDEO-DAC

DV1F-DATA(0-7)

DV-OUT-HS

DV1F-DATA(0-7)

A

CLAMP

16 C_COMB

TO B05C VIPER

A2

Scaler and de-interlacer

DV1_DATA(0-9)

DATA LINK 2

MPEG_DATA

15 Y_COMB

AV7_Y-CVBS B07C

1T11 25M14

30

C4

MUX

ADC 29

Temporal noise redux

250Mhz MIPS32 CPU

From B02A CHANNEL DECODER

AVIP-1

9 C4 QPSK Demodulator

Dual SD single HD MPE2 decoder

AF30 DV2A-CLK DV2_CLK AK28 DV3F-CLK DV3_CLK

4 CVBS|Y3

AV2_Y-CVBS

MicroController

2-Layer secondary video out

VO-2

1 CVBS2 12 CVBS_DTV

2D DE

AUDIO/VIDEO

N.C.

A

8Mx16

B05C

MPIF

126 CVBS1

AV1_CVBS

DDR SDRAM 2

DVD CSS

N.C.

DATA LINK 1

QAM 8VSB Demodulator

8

123 CVBS-IF

CVBSOUTIF-MAIN

34 FAT-IF-AGC-MAIN AUX-IF-AGC 38

7V02 K4D551638F

MM_A(0-12)

120 CVBSOUTIF CVBS-OUTA 19

8Mx16

Memory controller

TUN-VIPER-RX-DATA TUN-VIPER-RX-DATA

SDA-DMA

DDR SDRAM 1 MM_DATA

Tunnel

C-PRIM

DTV CABLE AND TERRESTRIAL RECEIVER

D

TUNNELBUS

TUN-VIPER-TX-CLKN TUN-VIPER-TX-CLKP

B03A LPF SOURCE SELECTION CVBS/Y RIM CLAM P

7T22 NXT2004

B05B

VIPER

TUN-VIPER-TX-DATA

LPF

7V01 K4D551638F

B05C

TUN-VIPER-RX-DATA

+5V

TO AM INTERNAL AUDIO SWITCH

LPF

7A11 EF

PNX2015

14

QSS BPF

B05B VIPER: MAIN MEMORY

7V00 PNX8550

B04C TUNNELBUS

GROUP DELAY

100 SIFINN

out in AGC COTROL

4 13

IF-AGC

107 VIFINP

99 SIFINP

SAW 44MHz FM-T

7 8

2

IF-ANA

IF-ANA

7J00 PNX2015E

B03B SUPPLY

B03C IF 1T04 TD1336/FGHP

B05 VIPER:

B04 PNX 2015:

7A00 PNX3000HL

DV-GOUT

DV-BOUT

DV-OUT-VS F28 DV-CLKIN E30 DV-OUT-FFIELD G26 DV-OUT-DE E29

B03 MPIF MAIN:

B02B MAIN TUNER

34

AV-ROUT

1D50 1

32

AV-GOUT

2

28

AV-BOUT

3

ANALOG OUTPUT (Reserved for PTV)

MP-OUT-HS

RGB_HSYNC J29 J28 RGB_VSYNC RGB_CLK_IN J30 J27 RGB_UD RGB_DE K26

MP-OUT-VS MP-CLKOUT MP-OUT-FFIELD

DV-OUT-VS DV-CLK-IN

12 24

MP-OUT-DE

DV-OUT-DE

11

RIN (0-9)

MP-ROUT(0-9)

DV-ROUT

GIN (0-9)

MP-GOUT(0-9)

DV-GOUT

BIN (0-9)

MP-BOUT(0-9)

DV-BOUT

(Reserved for PTV)

1I06 ( ) 26” - 32”

1 2

B07C ANALOG I/O

PR1 19 18

B07b

PB1

PB

B07b

AV1

Y1 Y

HDMI CONNECTOR

B07b

AV7_Y-CVBS

VIDEO IN

ARX2+

3

ARX2ARX1+

4 6 7

ARXC+ ARXC-

15 16

ARX-DCC-SCL ARX-DCC-SDA

HDMI Video output formatter

DISPLAY INTERFACE

B05A Upsample

RX1+B Termination RX2-B resistance control RX0+B

B07b

RX0-B RXC+B RXC-B

B07b

Y B07b

VHREF timing generator

Derepeater

1 201 207

LVDS_TX

AH9

DV-HREF DV-VREF

DV-HREF AJ9 DV-VREF AK9 DV-FREF

DV-FREF

HDMI receiver

I2C slave interface

144 143

SDA-MM-BUS1

H-SYNC-VGA N.C. N.C. B07A B07A

AV3

B07A

1I01 1

B07A

3

AV2_C

S VIDEO 5 2

4

B03a

B07A

V-SYNC-VGA Y Y1 PR PR1 Y Y1

Activity 131 HSYNC detection & 128 VSYNC sync selec. 90 88 G/Y Slicers 96 R/PR 94 81 79

B07A

PB

68

B07A

PB1

66

ADC G/Y

TXPNXA+

A25

TXPNXB-

B25

TXPNXB+

D25

TXPNXC-

E25

TXPNXC+

C23

TXPNXCLK-

D23

TXPNXCLK+

LVDS_DN

B24

TXPNXD-

LVDS_DP

C24

TXPNXD+

E24

TXPNXE-

F24

TXPNXE+

LVDS_CN

SCL-MM-BUS1

LVDS_CP LVDS_CLKN LVDS_CLKP

1I02 (1I00)

B03a

C26

LVDS_BP

HDCP

Line time measuremebt

AV2_Y-CVBS

TXPNXA-

LVDS_BN

B03a

VIDEO

B26

LVDS_AN LVDS_AP

HSCL B HSDA B

AV1_CVBS

VIDEO IN

B04G VIPER/PNX 2015:

AK8

HPD-HIRATE

PB

Y

DV4-CLK

1P06 (26” LCD)

1G50

PR

PB

DV5_DATA_0 T0 9

VDISP

1I03

AV2

VIP

DV5-DATA(0-7) 2

RX2+B RX2-B

PR

DV4_DATA_0 T0 9

DV4-DATA(0-7)

ARX-HOTPLUG 7B20

1B02

B03a

RX2+A 179 RX2-A 174 RX1+A Termination 173 RX1-A resistance 168 RX0+A control 167 RX0-A 162 RXC+A 161 RXC-1

ARX0-

12

19

180

ARX1ARX0+

9 10

1I04 PR

1

Sync seperator

B04E PNX 2015: STANDBY & CONTROL

Clocks generator

LVDS_EN

B4E STANDBY

LVDS_EP

7LA7 M25P05

512K FLASH

7L50 K4D261638F

AK10

5 SPI-SDO 6 SPI-CLK

AH10

1 SPI-CSB

AG10

3 SPI-WP

AJ27

B/PB

STANDBY PROCESSOR

See Block digram Control

B07A

AJ12 1LA0 16M

B04D DDR INTERFACE

PMX-MA(0-12)

Memory controller

PNX-MDATA

MCLK_P

A17

PNX-MCLK-P

A16

PNX-MCLK-N

45 46

DDR SDRAM 128Mx16

1 2

3

3

4

4

12

10

13

12

5J52

15 16

13 15

5J54

18 19

18 20

21 22

21 23

5J56

5J58

5J60

24

26

25

28

LVDS CONNECTOR TO SCREEN

27 28

CTRL-DISP1 CTRL-DISP2 CTRL-DISP3

7 8 9

CTRL-DISP4

10

SCL-I2C4 SDA-I2C4

30

29

31

30

PMX-MA

PNX-MDATA (0-15)

MCLK_N

5J50

1 2

ONLY FHP SETS

9

AH12

G_16290_006.eps 020206

Block Diagrams, Test Point Overviews, and Waveforms

EP1.1U AA

6.

EN 33

Block Diagram Audio AUDIO B02B MAIN TUNER

B03

7A00 PNX3000HL

1A10

PNX2015 SEE ALSO BLOCKDIAGRAM VIDEO

7D10-02 DATA LINK 1 DEM DEC

B03D AUDIO SOURCE SELECTIOM

I2D

DATA LINK 2

ADAC1

AH1

AUDIO PROCESSING ADAC2

7D10-3

-12_20V

1M36 (1304) 6

L

8

R

DSNDR2 DSNDL2

74

DSNDR1 DSNDL1

AUDIO-IN5-R

( ) 26” - 32”

AUDIO-IN1-R B07c B07c B07c

AUDIO-IN1-L AUDIO-IN2-R

B07c B07c

AD3 AE3 AF3

ADCAC12 ADCAC11

CLK-MPIF

M4

AUDIO-IN4-R

79 R4

-12_20V

INV-MUTE

AUDIO-IN4-L

AUDIO-OUT1-R B03d

B3f

AUDIO-OUT1-L

70 69

B3f

1I03 AUDIO-IN1-R AV2 AUDIO IN L+R

AUDIO-IN1-L

RIGHT-SPEAKER 7D23

-12_20V SOUND-ENABLE

AUDIO-IN2-L

B03d

CONTROL

U-VOLT-DETECT

CONTROL

MPIF MAIN: AUDIO AMPLIFIER

B03A

MPIF MAIN: VIDEO SOURS SELECTION

AB1

B03d

B05

SIDE I/O

1M36 10

1M36 (1304) 10

SOUND L-HEADPHONE-OUT

11

11

SOUND R-HEADPHONE-OUT

3

7

7

DETECT

5

1010 (1303) 2

AA1

ADAC8

AUDIO-HDPH-R-AP

AUDIO-HDPH-R-AP

A-PLOP

I2S-WS-MAIN

V3

I2S-BCLK-MAIN

V2

T28

I2S-MCH-LR

U2

T27

I2S-MCH-CSW

U3

R30

I2S-MCH-SLR

U4

U27

I2S-SUB-D

V5

I2S_OUT2_SD3 R29

I2S-MAIN-D

V4

I2S_IN1_WS T29 I2S_IN1_SCK T30

B03d

VIPER I2S_OUT2_SD0 AB29

CONTROL ( ) 26” - 32”

B5C

SPDIF-OUT1

Headphone Out 3.5mm

VIPER:

B03d

SPDIF-OUT1

I2S_OUT2_SD1 I2S_OUT2_SD2 I2S_OUT1_SD0

I2S OUT

I2S IN

VIPER: MAIN MEMORY 7V02 7V01

B05B MAIN MEMORY

K4D551638F 2X DDR SDRAM 8Mx16

B07A

D

AUDIO-HDPH-L-AP

ADAC7

N.C.

B05B

5M09 PROT-AUDIOSUPPLY

B05A

7A04-2 ADAC8

1I02 (1I00)

MM_DATA DDR INTERFACE

AA27

SPDIF-HDMI

183

SPDIF-HDMI

MM_A(0-12)

B07B

HDMI +SUPPLY

HDMI: I/O + CONTROL

7B50 TDA9970HS

HDMI PANELLINK RECEIVER

1I06

1 2

RX2+ RX2RX1+ RX1-

PARX2+

19 18

AV3 DIGITAL AUDIO OUT

5M12

7D25

7D26

AUDIO-HDPH-L-AP

7V00 PNX8552EH AUDIO-IN2-R

From 1M02 A SUPPLY OR 5 From CN1M02 6 PDP SUPPLY 7 2 3 4

7A04-1 ADAC7

1I00 AV3 AUDIO IN L+R

1 5M11

( ) For 26” LCD

B03E

LINE / SCART L/R

B03d

AV1 AUDIO IN L+R

1M02 5M10

(+12-16V-NF)

1I04 AUDIO-IN4-R

(-12-16V-NF)

-12_20V MUTE

R2

84 L2 80 L4

4

B04E

7D23

MUTE 40

5M03

Speaker R 15W/8Ω

PROT-AUDIOSUPPLY

7D14÷7D16

ADCAC10 ADCAC19

AVIP

85 R1 86 L1 83

RIGHT-SPEAKER

+12_20V

128 L5 127 R5

AUDIO-IN2-L AUDIO-IN4-L

B07c

AC3

AUDIO SWITCH (ANALOG OUT)

AUDIO SWITCH (DIGITAL OUT) AUDIO-IN5-L

ANALOG I/O

AUDIO AMPS

72 73 75

8

7D11

FEEDBACK-RL

INV-MUTE

DLINK2

AM SOUND

1M36 6

7D10-01

7D10-01

DSND

1002 (1302)

3

FEEDBACK

D

Speaker L 15W/8Ω

2

DLINK1

LPF

SIDE I/O

1740 1

5M02

FEEDBACK-LR

AUDIO SWITCH A

LEFT-SPEAKER

LEFT-SPEAKER 7D18

ADAC2

AG1

DATA LINK 3

MPIF DV1F-DATA(0-7)

B07C

DATA LINK

100 SIFINN

FOR MORE MORE DETAILS SEE ALSO BLOCK DIAGRAM VIDEO AND CONTROL

ADAC1

CONTROL

108 VIFINN

8

7T22 NXT2004

AUDIO IN L+R

+12_20V 7D18

99 SIFINP

D

AUDIO: CONNECTORS

7D2O÷7D21

2

CONTROL

IF-ANA

107 VIFINP

7

CONTROL

12 MAIN HYBRID TUNER

DTV CABLE AND TERRESTRIAL RECEIVER

B08B

AUDIO: AMPLIFIER

7J00 PNX2015E

B03C IF

1T04 TD1336/FGHP

B02A

B08A

B4 PNX2015

MPIF MAIN:

HDMI CONNECTOR

AUDIO MULTIPLEXED WITH VIDEO SEE ALSO BLOCKDIAGRAM VIDEO

RX0+ RX0-

Termination Resistance Control

RXC+ RXC-

HDMI receiver

Audio Formatter Audio PLL

Audio FIFO

HDCP

Packet extraction

DV4-DATA DV INPUT DV5-DATA

G_16290_007.eps 020206

Block Diagrams, Test Point Overviews, and Waveforms

EP1.1U AA

6.

EN 34

Block Diagram Control & Clock Signals CONTROL + CLOCK SIGNALS B05 VIPER:

B02A CHANNAL DECODER

B04A PNX2015:

B06 VIDEO DAC

7V00 PNX8550EH/M1/S1

7G40 ADV7123KST140

B05C A/V + TUNNELBUS E30

DV-CLKIN

DV-CLKIN

24

7J00 PNX2015E

VIPER

VIDEO DAC

B04B DV I/O INTERFACE AH19

DV2A-CLK

AF30

AG25

DV3F-CLK

AK28

K3

TUN-VIPER-RX-CLKP

PNX2015

MP-CLKOUT

J30

B03B MPIF MAIN: SUPPLY 7T22 NXT2004

51

AH16

59

U28

IRQ-MAIN

A26

RESET-FE-MAIN

F1

AB28

1M60 (1309) 1

1050 (5301-5302)

1

1

AJ12 AK5 AJ7 AA2

4

3 2

2 3 4

1M60 1

2 3

2 3

4

4

NAND-CLE NAND-ALE NAND-REn

16

EEPROM (32Mx16)

17 8 18 9

NAND-WEn NAND-SEL

19

AJ29 D28

AJ28 AH27

USB1-DM USB1-DP

AD2

B04D PNX 2015: DDR INTERFACE

PLL-OUT

PCI-CLK-VPR

STBY-WP-NAND-FLASH

B04E 7L50 K4D261638F

B07B HDMI: I/O + CONTROL B04D DDR INTERFACE

USB 1.1 CONNECTOR

AD27 C27

HPD-HIRATE SOUND-ENABLE

27M

1H00

C4

AB27 D29 B5

B08A

7B50 TDA9975HS/8/C1

HDMI-COAST

135

POWERDOWN-HDMI

115

C30 AD3 AD4

M27-PNX RESET-MIPS

B28

DEBUG-BREAK

DV4-CLK

1M01 (1684)

MM_CLK_N

46

B18

MM_CLK_P

45

2

B04E

2

SPI-WP

3

DETECT-1V2 (P2.0)

AF16 AH17 AG17 AK18 AJ18

POWER-OK-DISPLAY

AH14

B01A

1705(1314)

B07A

MENU

B08A

SUPPLY-FAULT

AG13

DEBUG-BREAK

AG21

P50-HDMI

AG13

PROT-AUDIOSUPPLY (P2.7)

SDM

KEYBOARD

PC-TV-LED

LED-SEL

6

9P24

SDM

KEYBOARD

AH12

AG22

STBY-WP-NAND-FLASH

AH15

ENABLE-1V2 (P0.2)

AK16

ENABLE-3V3 (P0.4)

B05E

B01A

AG18

( ) For 26” - 32”

J LED SWITCH PANEL 1870

512K FLASH

9P14

DETECT-3V3 (P2.2) DETECT-5V (P2.3) DETECT-8V6 (P2.4) DETECT-12V (P2.5)

B01A 1702(1312)

CONTROL

6

AJ27

AH20

DDR SDRAM 16Mx16

1701(1311)

6801-2

SPI-CLK

7V02

1704(1310)

LED1 RED

AH10

1LA0

1M01

1703(1309)

6801-1

7LA7 M25P05-AVMN6P

7V01 A18

B16A CONNECTIONS A

E TOP CONTROL

VOLUME -

B04E PNX 2015: STANDBY & CONTROL

B04E STANDBY + CONTROL

AJ12

KEYBOARD

DDR SDRAM 128Mx16

AG21

( ) For 26” - 32”

VOLUME +

45

AK8 Y28 AG19 AJ21

RESET-SYSTEM

B05B MAIN MEMORY

CHANNEL -

46

PNX-MCLK-P

HDMI CONTROL

B05B VIPER: MAIN MEMORY

CHANNEL +

PNX-MCLK-N

A17

124

M135-CLK

2

ON / OFF

A16

B07A

B04B DV I/O INTERFACE

A2

1706(1313)

MPIF E/W & CONTROL

B05E VIPER: EEPROM

CHDEC-CLK

W2 USB-BUS-PW

40

NAND

D SIDE I/O 5000 (5300)

CLK-MPIF

7P80 TC58DVM92F1

AK12

1005 (1308)

7A00 PNX3000HL/N3

AG22

B05A CONTROL

29 IRQ-FE-MAIN

U30

TUN-VIPER-TX-CLKP

M4 DV1F-CLK

84

TUN-VIPER-TX-CLKN

B04C TUNNELBUS

16M

DTV CABLE AND TERRESTRIAL RECEIVER

T2 T1

3H06

1T11

25M14

30

DV1F-DATA

M29

AK23

AJ21 AH21

RESET-SYSTEM RESET-AUDIO

AH22

RESET-MAIN-NVM

B05A B04A B05E

1M21 6

4

4

3

3

LED1

LED1

AK21

LED2

LED2

AG20

AJ16

BACKLIGHT-CONTROL

AJ16

LAMP-ON (P0.5)

AG16

UART-SWITCH (P0.7)

AJ16

RESET-PNX2015

B04G B16A B10D

LED2 GREEN 7802 3803

IR

+3V3STBY

RC

RC

AK13

IR SENSOR

7808

AA27

LIGHT-SENSOR-SDM

1

1

LIGHT-SENSOR

LIGHT-SENSOR

AH23

LIGHT SENSOR Not for 26” Sets

G_16290_011.eps 270106

Block Diagrams, Test Point Overviews, and Waveforms

EP1.1U AA

6.

EN 35

I2C IC’s Overview I²C VIPER: CONTROL

B07A

B07B

HDMI + SUPPLY

HDMI: I/O + CONTROL

B01B

SUPPLY + RS232

TXD-VIPER

E27

RXD-VIPER

3H23

PROT 01

142

D25 A29

EJTAG-TMS

A28

EJTAG-TCK

C2

JTAG-TRST

AD4

15

ARX-DDC-SCL 3B08

EJTAG-TDI EJTAG-TDO

ARX-DDC-SDA

19 18

PROT 53

B27

1I06 16

5

2x HDMI CONNECTOR

JTAG-TRST

3B60

F26

VIPER

EJTAG-DETECT

2

143 EJTAG-TDI

3

3Q11

PARX-DDC-SDA

7B50-1 145 TDA9970HS

EJTAG-TDO

5

3Q10

PARX-DDC-SCL

146

EJTAG-TMS

7

HDMI CONTROL ERR 43

6 JTAG-TRST

7B02 M24C02

9U07

107

EJTAG-TCK

9

RESET-SYSTEM

11

EJTAG CONNECTOR (FACTORY USE ONLY)

RES

B5A

RESET-SYSTEM

EEPROM

B01B B03B

B04E

B02A

PNX 2015: STANDBY & CONTROL

G5

G4

7A00-3 PNX3000HL

7J00-6 PNX2015E

MPIF

CONTROL COLUMBUS

ERR 32

ERR 18

AVIP

C27

JTAG-TRST

AF21

EJTAG-DETECT

AJ21

RESET-SYSTEM

I2C-SCL-TUNER +3V3 7T23 PCA9515ADP

ERR 27

DDR SDRAM 16Mx16

2

6

3

7

7V02 K4D551638F

90 3T52

3T51

RES

DDR SDRAM 2

9T11

9T10

9T12

9T13

B05E

VIPER: EEPROM

7P14 M24C64

RESET-MAIN-NVM

8

RXD-UP

EEPROM MAIN NVM

B04G

3Q03

3H98 SCL-I2C4

PROT 04

3LJ1 3LJ0

B05E 7LA7 M25P05-AVMN6P

3LE2

AG26

AH26

AJ19

1T04 TD1336/FGHP

42

DTV RECEIVER

MAIN DIG TUNER

ERR 41

ERR 34

B07D

UART

TXD-VIPER

10

8

TXD-UP

9

11

TXD

RXD-UP

2

1

RXD

RXD-VIPER

3

4

3I10

1M16 1

7J00-5 AK19 PNX2015E

7P16

AG16

PNX2015 STANDBY ERR 26

DDR SDRAM 16Mx16

3I11

3 2

B5A 3LM7

+3V3-STANDBY AF14 AG14

3LH8 3LH9

UART-SWITCHn

UART-SWITCH

SCL-UP-SW

3LC6

TXD-UP

7P18

+3V3

B4

7T22 NXT2004

B4E

3LC7

6

ERR 44

I2C4-SCL

3LE3

3LE4

5

EEPROM 32Mx16

3H99 SDA-I2C4

43

B4E

7P80 TC58DVM92F1TGI0

A3

8

B5A

SCL-UP-VIP

PROT 03

I2C4-SDA

9

7P15 74HC4066PW

3LF0

I2C3-SCL

AG29 3Q14

SDA-UP-VIP

91

VIPER: EEPROM

+3V3-STANDBY

AE27 3Q15

3T28

I2C-SDA-TUNER AF11

7L50 K4D261638F

HD

ERR 31

ERR 29

ERR 45

3T25

3LH0

B27

3T23

AF9

3T22

AG9

3LH1

3LH3

3LH4

3LF8

3LG9

44

3T54

VIPER: MAIN MEMORY

DDR SDRAM 1

I2C3-SDA

MAIN TUNER

+5VTUN

3T53

43

7V01 K4D551638F

B05E

B02B

SCL-DMA

PROT 02

B05B

CHANNEL DECODER

SDA-DMA

AD26 3Q12 SCL-DMA 3A14

I2C2-SCL

AF29 3Q13 SDA-DMA

3A15

I2C2-SDA

MPIF MAIN: SUPPLY

3H05

+3V3 3H04

PROT 05

1H07 1

SCL-MM 3B61

7V00-5 SM PNX8552EH

SDA-MM

C25 3Q10 SCL-MM

3B07

I2C1-SCL

A25 3Q11 SDA-MM

1 2

I2C1-SDA

3H22

+3V3

3Q04

B05A

5 12

7P17

COMPAIR SERVICE CONNECTOR (UART)

6 13

SCL-UP-SW

VIPER/PNX 2015: DISPLAY INTERFACE

SDA-I2C4

3J31

1G50 31

SCL-I2C4

3J30

30

TO DISPLAY

ERR 64 (OPTIONAL ONLY PDP SETS)

G_16290_008.eps 300106

Block Diagrams, Test Point Overviews, and Waveforms

EP1.1U AA

6.

EN 36

Supply Lines Overview SUPPLY LINES OVERVIEW B01B

A

B03A

SUPPLY + RS232

MPIF MAIN: VIDEO SOURCE SELECTOIN

+5V B01b

CN1M46 5V2

12V

4

1

7

B03B

MPIF MAIN: SUPPLY

8

9

9

5U37

11

10

5U38

+5V

B01b

9 4

6 11

STANDBY

1

12

BACKLIGHT-CNTRL-OUT

3

13

LAMP-ON-OUT

7U25

B04a

VREF-AUD

2

+3V3-STANDBY

IN OUT COM

+3V3-STANDBY

B07A

UP-3V3

+3V3

5LN2

+2V5-DDRPNX

B03C +5V

B04G

+5V

+2V5

5B17

+3V3-APLL

+2V5-DDRPNX

5B11

3V3-PLL

5B12

3V3-DIG

B07b

+1V8

B07b

+5VTUN

B02b

+5V

B03e

+5V

+12VSW

7B45

+12VSW

IN OUT COM

VDISP

HDMI CONNECTOR

1 AC IN

2

~

3

5U02

AC_L

7U01 5U00

+3V3

+8V-AUD

+8V-AUD

B02a,B04a,e,f,g, B05a,c,d,e,B06 B07a,b

7U00 1

7U03 5U03

Control

+1V2

B05A +5V

+5V

B01b

B07B

7U28 7U27 +2V5 STABILIZER

B02A

B04c,f,B05d B02a,B04e

+2V5 +2V5D

B01a B01b

B03b

+8V-AUD

B03d

+2V5A-PLL

VREF-AUD

VREF-AUD

+2V5A +2V5A-XTAL

5T25

+2V5A-ADC

5T26

+2V5F

B05C

+5V2-STBY +12VSW

VREF-AUD-POS

+1V2_ATSC

7T21

B01a

5T28

+2V5 3L20

VSND_-18v

2

B01a

1

B02B

+2V5-DDRPNX

+12SW

7T10 5T11

+5VTUN

+1V2-STANDBY

+1V2

B05f

+1V2-STANDBY

B01a

+3V3 +3V3-STANDBY

+3V3-STANDBY

+3V3-STANDBY

+5V2-STBY

+5V2-STBY

+5V

+5V

5M10

2

5M11

-12_20V

B08a

4

MISCELLANEOUS

+5V2-STBY

1

3

1M02 PSU SUPPLY

5

5M12

6

5M09

+12_20V

B08a

+5V2-STBY

7M05

+3V3-STANDBY

B07d,B08a B04e,f,g, B05e

+3V3 +3V3-STANDBY

AUDIO: CONNECTORS

1M02

+3V3

7M06 B05f

VN

VIPER: EEPROM

IN OUT COM

B03c,d

IN OUT COM

B01b

-12_20V

B05b

B05F

B01a

VP

+3V3

B05f B01b

7D24

5D16

B08B

B04f

+12_20V

-12_20V

B08b

+2V5-VPR

+3V3

B01a

PNX2015: STANDBY & CONTROL

+1V2 +12SW

B01a

5Q07

B05c

+3V3

B04E

+3V3

+12_20V 3D43

+2V5

B05E

VREF-DDRPNX

+3V3-STANDBY

AUDIO: AMPLIFIER

VIPER: SUPPLY

+2V5

+2V5

3L38

UART

+3V3

+1V2

+1V2

5L51

+12VSW

VREF-PNX

+1V2

+2V5 5L52

ANALOG I/O

B05f

B08b

+1V2

CONTROL

+3V3-PLL +3V3-APLL

+3V3-STANDBY

VIPER: A/V + TUNNELBUS

PNX2015: DDR INTERFACE

+1V2F

MAIN TUNER

B07a

+3V3-APLL

B05f

VREF-PNX

7T20

1M02 B08B AUDIO

+3V3-PLL

+3V3-STANDBY

B01a

B01a

B01a

B07a

B08A

B01a

PNX2015: TUNNELBUS

+2V5

+1V2

+3V3-AVI

B01a

VREF-AUD-POS

+3V3

+1V2

B07a

B04c

B05D

B04D

+3V3-DIG

+3V3-AVI

+12VSW

B01a

+3V3F

+3V3-DIG

B07C

VREF-VPRDDR

+3V3

B01a

B01a

5T27

B07a

+1V8-PLL +3V3

B07D

+3V3

3L38 +3V3

B01a

+3V3

VREFD-VPRDDR

VREF-PNX

B01a

+1V8-PLL

+1V2

+5V2-STBY

B04C

+1V8

+2V5-VPR 3H52

B01b

B03b

5T24

B07a

PNX2015: AUDIO / VIDEO

+12VSW

5T23

B07a

VIPER: MAIN MEMORY

+2V5-VPR

+3V3

+2V5D-PLL

5T21

+3V3 +12VSW

B05B

HDMI: I/O + CONTROL

+1V8

B05d

+1V2

B01a

5T20

5

+5V

7A05

+2V5

+2V5

6

+5V

+12VSW 7A17

B04A

CHANNEL DECODER

B01a

VSND_+18v

+3V3

3H50

B01a

CN1M02

+3V3

+5V2-STBY

+12VSW B02a, B04a,d,e,f,

16

VIPER: CONTROL

B01b B01a

B07b

AIN-5V

CONTROL

+3V3

MPIF MAIN: AUDIO AMPLIFIER

+5V2-STBY AC_N

+3V3-AVI

7J07 +5VTUN

B03E

1I06 18

MPIF MAIN: AUDIO SOURCE SELECTION

+5VTUN

+12VS

B04g,B07c B01b,B02b, B03e,B04e,

B07b

+3V3-AV 5B10

5J11

DC / DC

+12VSW

+1V8-PLL

B01b +5V

B02b

CN8001

B07b

+5V2-STBY

+5VbM

7J04 7J08

1U01

B07b

+3V3-STANDBY

B05f

B01a

B01a

IN OUT COM

5B18

B01b

5A17

B03D

7B25 +3V3

+3V3-STANDBY

+12VS

+3V3

B01a

+5VaM

+5VTUN

B01b

HDMI + SUPPLY

PNX2015: DISPLAY INTERFACE

+3V3

B01a

5A16

B01A

+5V

7G42

MPIF MAIN: IF + SAW FILTER

B01b

+12VSW

+5V B01b

B04d

B03a,b,c,e, B04e,g,B05a, B06,B07a

PDP POWER SUPPLY

+3V3DAC

+1V2-STANDBY

+2V5

B01a

7U24 POD-MODE

PLL-3V3

+3V3

B03e

B03e,B04a, B05e,f

+5V

5LN0

5G10

B05f

+5V2-STBY

7

LVDS-3V3

+1V2-STANDBY

VREF-AUD-POS

7A00 MPIF

5U36

5

7A10

+12VS

5U35

CN1M03

5LN3

+3V3

B01a

B05f

5A12 B01a

PLL-1V2

VIDEO-DAC (OPTIONAL)

+3V3

+1V2 5LN1

+3V3

B01a

+5V

2

B06

PNX2015: SUPPLY

+1V2

B01a

1J02

7

B04F

+5V

J

+1V2-STANDBY

IN OUT COM

1M21

5M00

5

B04e,f

LED PANEL

1870 5

+3V3STBY

+3V3STBY

B01b +12VSW B01a

+12VSW

G_16290_014.eps 010206

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 37

7. Circuit Diagrams and PWB Layouts SSB: DC / DC 3U22 A5 3U23 A6 3U24 A6 3U25 B6 3U26 B6 3U27 B6 3U28 B6

3U15 E9 3U16 E9 3U17 E9 3U18 D9 3U19 F9 3U20 D8 3U21 B8

4

3U29 D5 3U30 D5 3U31 D4 3U32 E4 3U33 E4 3U37 G2 3U38 G2

3U54 D11 3U55 D10 3U56 D11 3U82 C7 3U83 C7 3U85 A3 3U86 A3

5

3U97 C6 3UA1 B12 3UA2 B11 3UA3 D12 3UA4 D14 3UA5 D13 3UA7 E11

3U87 A2 3U88 A3 3U89 B2 3U93 D10 3U94 D11 3U95 E11 3U96 C7

6

8

10K

10

IU11 C3 IU12 C2 IU13 D6 IU14 C6 IU15 C6 IU16 B6 IU17 B6

IU18 A6 IU19 A6 IU20 A2 IU21 B8 IU22 B8 IU23 A6 IU24 A5

11

12 IU42

3U96

1u0

1K0

100K

3UA2

2U58

3UA1

100n

2U72

22u

3n3

2U24

2U85

22u

3UA3

10R

IU80 1

K

PHD38N02LT

A

3

+2V5 STABILIZER

R

7U28

2

2U73

1 3

IU81

3UA4 1%

3UA5

PDZ9.1-B

5

FU08

6U25

3U94

+3V3

FU07

c111

1u0

+2V5 2U46

3U95

3K3

E FU05

+2V5D

1K0

1u0

2U41

3UA7 1%

GND-SIG

GND-SIG

D

1K0

1n0 47R

IU57

3U54 3U56

1K0

2U22 1% 220R

3n3 3U18

2U21

100n

IU40

2

1% 1K0

BZX384-C18

6U21

BOOSTER

2

IU59

7U15-2 BC847BS 4

3U17

220R

1K0

IU28

6 7U15-1 BC847BS 1

IU58 3

10K

4K7

3U11

7U07 BC817-25W

12V UNDER-VOLTAGE DETECTION

3U93

IU41 2U30

1u0

IU27

6U22

BZX384-C9V1

BAS316

100n

10K

IU56

2K2

2U29

68R 2U26

7U27 TS2431 3U55

6K8

IU60

2U20

10u

IU55

1K0

3U29 6U11

6K8

5U03

6U23 3UA8

6K8

IU37

E

1K0

BAS316

1n0

IU13

IU65

10K

100n

10R

IU22 3U13 IU21

FU06

+1V2

1K0

3

B

C

FU13

IU26

5

IU79

6K8

2U11

IU68

10K

3U33

IU66

6

3U32

10K

2

4 BC857BS 7U10-2

3U30

1 BC857BS 7U10-1 3U31

22u

2U25 IU45

3K3

68R 3UA9

D

2 6

12V/1.2V CONVERSION

3U14

3U10

100n

2U12 GND-SIG

5

+12VS

6K8

1n0

6K8 IU25

GND-SIG GND-SIG GND-SIG

2U19

3U21 2U27

2R2

IU15

7U05-2 BC847BS 4

GND-SIG

GND-SIG

1

IU01

T 3A 420

3U82

3U09 GND-SIG

+12VSW

3U07

22K

3U04

IU44

3U15

5

1

3K3

12 11

IU09

10K

2 IU36 IU14 3U08

3U16

GND

+2 -2

2R2

3

100n

3U06

2U15

ROSC

3U28

5 6

7U29-1 BC857BS

IU78

3

10R

IS

13

39K

3U05 3U03

7U05-1 BC847BS 1

33K

2

+1 -1

2

IU10

220R

3U02

9 220R

100n IU12

COMP

IU16 15

1U01

4 7U29-2 BC857BS

3U20

L2

IU07

IU08

GATE

1

3n3 7U03-1 7 8 SI4936ADY

3U12

2

8

4R7

IU17

16

2U32

2U28

10 IU06

3

H2

VFB

IU30

3U26

3U83

1

IU32

100n

7 IU05

2

6K8

L1

1

5 6 SI4936ADY 3

4

3U97

H1 GATE

IU04

GND-SIG

7U03-2

IU29

10R

BST

IU31

3U25

Φ

2U18

4

IU11

A

10u

5 6 SI4936ADY

4

IU54

7U00 NCP5422ADR2G

6

B1A

5U00

FU03

3

B

15

3n3

IU19

GND-SIG

1

14

10u

6K8

100R

13

IU78 B11 IU79 B12 IU80 D12 IU81 D13 IU86 A7 IU88 F9 c111 E12

IU60 D8 IU61 G3 IU62 A3 IU63 A3 IU65 D5 IU66 D4 IU68 E4

12V/3.3V CONVERSION

7U01-2

10R

SUPPLY-FAULT

FU02

33K

22u

2U17

1u0

4R7 3U24

FU23

IU45 C6 IU54 B8 IU55 D8 IU56 D10 IU57 D11 IU58 D10 IU59 D11

2U31

IU23

3U27

6

3U88

IU32 B6 IU36 B6 IU37 E5 IU40 D9 IU41 D8 IU42 A12 IU44 C7

IU25 C6 IU26 D7 IU27 E7 IU28 E8 IU29 B6 IU30 B6 IU31 B6

FU01

VCC

IU63

2 3U23

14

10K

3U87

7U13-1 BC847BPN

7 8 SI4936ADY 1

2U16

IU62

10K

3U89

10R

3U22

5

2

2U13

9

IU04 B4 IU05 B4 IU06 B4 IU07 B4 IU08 C4 IU09 C4 IU10 C5

FU08 D12 FU13 C7 FU18 F12 FU19 F12 FU23 A4 IU01 A14 IU03 B3

7U01-1 IU18

IU24

3U86

IU03

3U01

9U03 H14 FU01 A14 FU02 B4 FU03 A8 FU05 E13 FU06 C9 FU07 E12

5U02

3

3U00

7U13-2 A3 7U15-1 D10 7U15-2 D10 7U27 C13 7U28 D12 7U29-1 B12 7U29-2 B11

IU86

4 BC847BPN 7U13-2 IU20

C

7U03-2 B7 7U05-1 C3 7U05-2 C4 7U07 E7 7U10-1 D4 7U10-2 D4 7U13-1 A3

6U22 D7 6U23 D8 6U25 D12 7U00 B5 7U01-1 A6 7U01-2 A6 7U03-1 B6

7

DC / DC

A

3UA8 D8 3UA9 D8 5U00 A8 5U02 A11 5U03 C9 6U11 E5 6U21 E8

2K2

3U08 C6 3U09 D6 3U10 C6 3U11 E8 3U12 B8 3U13 B8 3U14 D9

3

2U14

B1A

2

3U01 C2 3U02 C3 3U03 C3 3U04 C3 3U05 C4 3U06 C5 3U07 C6

1n0

1

2U41 E11 2U46 E13 2U58 B12 2U72 B11 2U73 D12 2U85 B9 3U00 C2

2U27 B8 2U28 B8 2U29 D8 2U30 E8 2U31 A6 2U32 B7 2U37 F9

1n0

2U20 D9 2U21 D9 2U22 C9 2U23 F3 2U24 B9 2U25 A11 2U26 D8

10K

2U13 C2 2U14 A3 2U15 C4 2U16 A5 2U17 A5 2U18 C6 2U19 B8

100n 3U85

0M96 H3 0M97 H4 1U01 A14 2U09 F3 2U10 G3 2U11 E7 2U12 C6

FU18

ENABLE-3V3

0V

F

3U19

FU19

22K

0V

F

ENABLE-1V2

470n

2U37

100p

2U23

IU88

2U09 IU61

G

GND-SIG

GND-SIG

100n

2U10

6K8

3U38

1% 470R

100p 3U37

G

GND-SIG

9U03

H

0M96

G_16290_021.eps 010206

3104 313 6095.3 1

H

GND-SIG

0M97

2

3

4

5

6

7

8

9

10

11

12

13

14

15

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 38

SSB: Supply + RS232

1

2

3

4

5

6

7

8

9

SUPPLY + RS232

B1B

B1B

1J02

A

FU04 FU10

1 2 3 4 5 6 7 8 9 10 11 12 13

FU11

GND-D

FU12

5U35 5U36

FU14

FU16

5U37 5U38

0V2 0V3 3V2

+12VS

3U47 3U48

FU20 FU21 FU22

A

+5V2-STBY

FU15 FU17

-12-16V-NF +12-16V-NF

STANDBY BACKLIGHT-CNTRL-OUT LAMP-ON-OUT

100R 100R

+12VSW

+5V2-STBY

+5V2-STBY

100K

3U39

B 7U25-2

7U25-1 IU43 IU47

FU33 +5V

+5V 2U61

47K

3

1

7U24 BC847BW

100n

0V

47K 3U44

3U42

150R

3U73

IU46

5 6 SI4936ADY

4

USE ONLY

C

7U20 BC847B

NC

1H07

10K

10K

3U90

3U91

2U66 100n

FU40

1 2 3 4 5 6 7 8 9 10 11 12 13 14

FU41 FU42

JTAG-TRST EJTAG-DETECT EJTAG-TDI

FU43

EJTAG-TDO

IU72 GLINK-TXD

FU44

EJTAG-TMS

FU45

EJTAG-TCK

IU93 IU94 IU95 IU96

IU73 9U15 RES IU87

TXD RXD

IU43 B6

2U51 B2 2U52 B3

IU46 B5 IU47 B6

2U53 B3

IU64 E7

2U54 B3

IU70 E7

2U55 C7

IU72 E4

2U56 D2 2U60 D2

IU73 E5 IU74 F4

2U61 C8

IU75 F5

2U63 D5

IU84 D7

2U64 D7

IU85 D7

2U65 D7 2U66 D5

IU87 E5 IU90 C3

3U39 B7

IU91 C2

3U42 B6

IU92 D2

3U44 C6

IU93 D6

3U47 B3 3U48 B3

IU94 D6 IU95 D6

3U72 C3

IU96 E6

3U73 C3

IU97 E7

3U74 C1

IU98 E7

3U75 D2 3U76 D2

IU99 F5

3U79 E7 3U81 E8

13 8

1 3 4 5

7U20 C3

Φ

C1+

D

RS232 V-

C1V+

6

IU84

7U25-1 B7

IU85

C2+

9U07

11 10 T1 IN T2

OUT

T1 T2

R1 IN R2

OUT

R1 R2

IU70

14 7

IU64

FU51

3U98 RES 100R

12 9

3U99 RES

IU97

15

5

FU31

3U79 RES 100R

3U81 RES 100R

9U13 C6 9U14 F6

1U02

FU52

100R

RESET-SYSTEM

4

1 2 3

E

FU32 5

4

IU74 GLINK-RXD +3V3

FU04 A2 FU10 A2 FU12 A3 FU14 A1

1 2 3

FU15 A1 FU16 A3 FU17 A1 FU20 B2 FU21 B2

IU75

FU22 B2

9U16 RES

9U15 E5 9U16 F5

FU11 A1

B3B-PH-SM4-TBT(LF) 1U03

B3B-PH-SM4-TBT(LF) RES

5-147279-3

F

9U07 E3

USE ONLY

C2-

IU99 FU49

9U01 F6 9U02 F6

FACTORY

100n

10K

FU46 FU47 FU48 FU50

7U25-2 B8

FOR

100n 2U64

2

7U21 D1 7U22 D6 7U24 C6

2U65

IU98

3U92

USE ONLY

FU52 E8

2U50 B2

5U38 A3

16 VCC

GND

2U56

1K5

1K0 3U77

10u 16V

2U63 100n

FOR FACTORY

2U49 B2

5U37 A3 FU30 RES 7U22 ST3232C

+3V3

E

FU50 F2 FU51 E8

5U35 A3 5U36 A3

+3V3-UART

+3V3-UART

3U75 1K0

3U76

2

2U40 B4 2U48 B2

3U99 E8

9U13

NC

REF

K A

5

4

FU49 F2

3U92 F3

RES IU92

FU48 F2

1U03 E9

3U98 E8

10n

2U60

3V9 1

FU47 F2

1U02 E9

3U90 E3 3U91 E3

IU91

7U21 3 TS431AILT

FU46 E2

1J02 A1

3U77 D2

IU90

FOR FACTORY

D

150R

3U72

1K0

C

3U74

POD-MODE

2U55

+5V2-STBY

7 8 SI4936ADY

2

1u0

1u0

100n 2U40

100n 2U54

2U53

100p

100p 2U52

100p 2U51

100p 2U50

B

100p 2U49

2U48

B13B-PH-K-S(LF)(SN)

1H07 E2

9U01

RES

9U02

RES

9U14

RES

F

FU30 D6 FU31 E8 FU32 E8 FU33 B8 FU40 E2 FU41 E2 FU42 E2

G_16290_022.eps 010206

3104 313 6095.3

FU43 E2 FU44 E2 FU45 E2

1

2

3

4

5

6

7

8

9

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 39

SSB: Chanel Decoder 1

2

3

4

5

6

7

8

9

10

11

12

13

CHANNEL DECODER

B2A A

5T20

B2A A

FT20

+2V5D-PLL

10n

2T30

220R

5T21

FT21

+2V5A-PLL

5T24

+2V5D-PLL

+3V3F +3V3F +3V3F +3V3F +3V3F +3V3F

+2V5A +2V5A +2V5A +2V5A

10n

2T33

220R

+2V5F +2V5F

+2V5A

+1V2F +1V2F +1V2F +1V2F +1V2F +1V2F +1V2F +1V2F

FT22

+2V5A-PLL +2V5A-XTAL

+2V5

B

5T23

IT30

+2V5A-ADC

B

10n

2T31

220R

FT23 +2V5A-XTAL

220R

C

10n

2T34

C

5T25

FT24 +2V5A-ADC

D

10n

2T35

220R

5T26

FT25

220R 5T27

FT26

D

+1V2

3 7T21 SI2306DS

1

10n

42 43

3T52

+3V3F

G SCL-DMA

98

9T12

IF

UC_EN

AGC AUX RF

POWER_RESET 0 I2C_SLAVE_ADDR 1

ERR CLK MPEG

SCL I2C SDA 0 1 2 3 4 5 6 7

PKT_SYNC DATA_EN 0 1 2 3 MPEG_DATA 4 5 6 7 SER_DATA

GPIO

BIAS_RES DGND

AGND IT36

100n

100n

100n

100n

2T47

2T48

2T49

2T50

100

PDET_REF_OUT

PDET_COMP_IN

22 28

AT35 2T60

35 34

IT01

100n

3T40

FAT-IF-AGC

1K0 38

3T43

AUX-IF-AGC 1K0

40

100n 4 3T37-4 5

49

68R

51 53 55 71 69 68 67 66 62 58 56

2T61

1 3T35-1 3 3T35-3 1 3T36-1 3 3T36-3

DV1F-DATA8_ERR 3 3T37-3 6

2 3T37-2 7

68R

68R

1 3T37-1 8

8 68R 2 6 3T35-2 68R 4 8 3T35-4 68R 2 6 3T36-2 68R 4 3T36-4

DV1F-DATA9_SOP

68R 7 68R 5 68R 7 68R 5 68R

DV1F-VALID DV1F-DATA0 DV1F-DATA1 DV1F-DATA2 DV1F-DATA3 DV1F-DATA4 DV1F-DATA5 DV1F-DATA6 DV1F-DATA7

3T56

4K7

4K7

7T23 PCA9515ADP

+3V3

DGND

3T39 33K

H

VCC

+5V IT52

3

SDA0

SDA1

2

SCL0

SCL1

5

EN

6

3T57 100R IT53

3T58 100R

GND

NC

7

IT41

1

IT54

I

4

I

9T13 RES

G_16290_023.eps 010206

3104 313 6095.3 2

G

33K

100n

3T55

B4B-PH-SM4-TBT(LF) RES

1

F

DV1F-CLK

8

9T11 6

OSC_CLK

E

15

2T67

IT51 4 3 2 1

VDD3.3

NC VREF_N VREF_P INCM ADC INP INN

3T38 IT40

9T10 RES

1T10 5

68p

2T66

68p

I2C ADRESS=24/26

IRQ-FE-MAIN I2C-SDA-TUNER I2C-SCL-TUNER FM-TRAP

+3V3F

+3V3

90 91 89 87 86 84 48 47

4K7 RES

3T31

1K0

+3V3F

+1V2_ATSC

3T54

IT50

100n

H

59 78 77

100R

47K

SDA-DMA

2T63

2T62 3T51 100R

3T49

2T64

IT32

IT33

RESET-FE-MAIN

2T65

IT49

1u0 16V

41

4K7

1K0

47K

3T50

47K

+3V3

1K0

47K 7T20-1 BC847BPN

+3V3

3T48

7T20-2 BC847BPN IT48 3T47

IT46

3T53

3T46

IT47

3T45

2

IT45

3T44 220R

8K2

3T42

F

220R

FAT-ADC-INN

FT28

FT29

37

VDD2.5

DVDD_PLL

100n 2T45

3T41

VDD1.2

32 44 50 70 79 88

100n 2T46

FAT-ADC-INP

Φ

VSB/QAM

2 17 19 24 36 39 46 54 57 60 61 65 72 73 74 75 76 81 82 83 85 93 94

+12VSW

OUT

3 12 13 14 20 25 27 96 99

+12VSW

OSC_XTAL

18 64

100n 2T44 1u0 16V IT37

4 5 6 7 8

IN

16 23 33 45 52 63 80 92

100n 2T43 10n 2T57

1u0 16V 2T56

10n 2T59

2T58

30 IT31

AVDD_ADC

AVDD

29

25M14

33p RES

2T53

E

IT34

1 AVDD-PLL 31 AVDD-OSC

100n 2T42

7T22 NXT2004

1T11

9 10 11

100n 2T41

IT38

10n RES

2T54

+1V2F

97 95 26 21

2T52

CHDEC-CLK

FT27

220R

33p

5T28 +1V2_ATSC

100n 16V

100n 2T40

600R

2T36

100n 2T39

100n

100n

+3V3F

2T37

+3V3

2T38

+2V5F

3

4

5

6

7

8

9

10

11

12

13

1T10 H1 1T11 E6 2T30 A2 2T31 B2 2T33 B2 2T34 C2 2T35 D2 2T36 D8 2T37 D6 2T38 D6 2T39 D6 2T40 D6 2T41 D7 2T42 D7 2T43 D7 2T44 D7 2T45 D8 2T46 D7 2T47 D11 2T48 D12 2T49 D12 2T50 D12 2T52 E5 2T53 E6 2T54 E6 2T56 E7 2T57 E7 2T58 E6 2T59 E7 2T60 E12 2T61 F12 2T62 F7 2T63 F7 2T64 G2 2T65 G7 2T66 G7 2T67 H5 3T31 G5 3T35-1 G11 3T35-2 G12 3T35-3 G11 3T35-4 G12 3T36-1 G11 3T36-2 G12 3T36-3 G11 3T36-4 G12 3T37-1 F12 3T37-2 F12 3T37-3 F12 3T37-4 F12 3T38 G7 3T39 H7 3T40 F11 3T41 F7 3T42 F2 3T43 F11 3T44 F7 3T45 F1 3T46 F1 3T47 F2 3T48 F6 3T49 F3 3T50 F1 3T51 F6 3T52 F7 3T53 G6 3T54 G6 3T55 H2 3T56 H3 3T57 I3 3T58 I4 5T20 A2 5T21 B2 5T23 B2 5T24 C2 5T25 C2 5T26 D2 5T27 D2 5T28 E2 7T20-1 F1 7T20-2 F2 7T21 F3 7T22 E8 7T23 H4 9T10 G5 9T11 H3 9T12 H3 9T13 I5 AT35 E11 FT20 A2 FT21 B2 FT22 B2 FT23 C2 FT24 C2 FT25 D2 FT26 D2 FT27 E2 FT28 F3 FT29 F2 IT01 F12

IT30 B1 IT31 E7 IT32 F7 IT33 F6 IT34 E6 IT36 G8 IT37 E7 IT38 E6 IT40 G6 IT41 I5 IT45 F1 IT46 F2 IT47 F1 IT48 F2 IT49 F2 IT50 F3 IT51 H4 IT52 I2 IT53 I3 IT54 I4

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 40

SSB: Main Tuner 1

B2B

2

3

4

5

6

7

8

9

10

11

12

MAIN TUNER

B2B A

A

1T04 TD1316O/FGHP

MAIN DIG TUNER C0

B

B

TUNER 18

+5VTUN

16

3T15

1 2 IT11 3 4 5 IT10 6 7 8 9 IT12 10 11 12 13 14 15

IT60

IT13

47R IT15

+5VTUN

5T11 +5VTUN

2T13

3

7 AT23

GND

INPUT1

OUTPUT1

3 IT25

4

VAGC

OUTPUT2 AGC CONTROL

8

180p 2T27

IT18

2T17

IT19

IT21

10n 2T21

IT22

D

FAT-ADC-INP

FAT-ADC-INN

10n

3T27

2T22

E 1K0

3T29

100n

1K0

2T23

10n

FT30

4K7

220R

IT27

3T25

4K7

F

AUX-IF-AGC

FM-TRAP

I2C-SCL-TUNER I2C-SDA-TUNER

IT26

IF-ANA FAT-IF-AGC

3T28

3T23

3T22

FT15

220R +5VTUN

+5VTUN

E

7

6 INPUT2

IT24

9 13

2

1 VCC

2

1

2T20 10n

4 GND

IT17 2T19 10n

8

OUT

GND2

2 6 11

IT09 2T26

AT20 O OGND

IN

5

AT13

7T13 UPC3218GV

GND1

2T15

10n

10n

2T18

AT14

IT08

1T01 X7351P 44M 1 I 14 IGND

C

COM

1u0

FT12

180p

220R

7T10 LD1117DT

+5VTUN

2T16

10n

2T14

10n

3T18

4K7

FT11

FT10

F

IT62

47R

IT16

4K7 3T21

10n

7T12 BC847BW

+5VTUN

D

3T10

1u0

2T12

2T11 10n

10n

2T25

2T10 10n

C

IT61

3T20

+12VSW

IT14

2T24

19

4K7

DC_PWR +5V OOB FM-T RF_GC DNU AS SCL SDA NC VTUN IF_OUT IF_AGC IF_1 IF_2

17

G

G

G_16290_024.eps 010206

3104 313 6095.3 1

2

3

4

5

6

7

8

9

10

11

12

1T01 D5 1T04 B1 2T10 C1 2T11 C2 2T12 C2 2T13 C2 2T14 D2 2T15 D2 2T16 C8 2T17 D9 2T18 D2 2T19 D6 2T20 D6 2T21 D9 2T22 E7 2T23 E3 2T24 D12 2T25 C2 2T26 D2 2T27 E2 3T10 C12 3T15 C3 3T18 C4 3T20 C11 3T21 C4 3T22 E2 3T23 E2 3T25 E2 3T27 E2 3T28 E2 3T29 E7 5T11 C12 7T10 C11 7T12 C3 7T13 D7 AT13 D4 AT14 D4 AT20 D6 AT23 D6 FT10 C2 FT11 C3 FT12 D2 FT15 E3 FT30 E7 IT08 D2 IT09 D2 IT10 C2 IT11 C2 IT12 C2 IT13 C3 IT14 C1 IT15 C4 IT16 C4 IT17 D7 IT18 D9 IT19 D9 IT21 D9 IT22 D9 IT24 D7 IT25 D7 IT26 F2 IT27 F2 IT60 C11 IT61 C11 IT62 C12

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 41

SSB: MPIF Main: Video Source Selection 1

B3A

2

3

4

5

6

7

8

9

10

11

13

12

MPIF MAIN: VIDEO SOURCE SELECTION

B3A

+5V

A

A

2A97 100n 7A00-4 PNX3000HL/N2

CVBS-IN

B

1 IA14

22n 22n RES

2A14

2A13

22n RES

2A12

12

4 5

FRONT_C

22n

22n

2A18

2A31

AV7_Y-CVBS

15 IA16 16 6

22n

22n

22n RES

FRONT_Y-CVBS

IA17

2A17

22n RES 2A21

AV2_C

9

2A16

22n

2A20

AV2_Y-CVBS

C

8

2A15

2A94

2A96

25

22n

26

22n

27

22n

30 31 32

1M36

100R

5A64

FA29 FA30

600R

5A65

FA31

54 64 59

B11B-PH-K

100p

CVBS|Y3

STROBE1N

C3

STROBE1P

CVBS|Y4

DATA1N

C4

DATA1P

Y_COMB STROBE3N C_COMB STROBE3P GND_VSW

5A11

DATA3P

R|PR|V_1 G|Y|Y_1

STROBE2N B|PB|U_1 STROBE2P R|PR|V_2 DATA2N G|Y|Y_2 DATA2P

IA15

B

60

STROBE1N-MAIN

61

STROBE1P-MAIN

62

DATA1N-MAIN

63

DATA1P-MAIN

50

STROBE3N-MAIN

51

STROBE3P-MAIN

52

DATA3N-MAIN

53

DATA3P-MAIN

55

STROBE2N-MAIN

56

C

STROBE2P-MAIN

57

DATA2N-MAIN

58

DATA2P-MAIN

D

B|PB|U_2 HV_PRIM VCC_DIG HV_SEC

FA10

46

HV-PRM-MAIN

IA18 45

GND_DIG VD2V5 FUSE10 VCC_I2D

E

GND_I2D

FA12

+5V 2A32

100p 2A25

2n2 2A24

2n2 2A23

2n2 2A09

2A07

E

2n2 2A08

600R

47

22n

AUDIO-HDPH-L-AP AUDIO-HDPH-R-AP

FA28

IA19

2A27

3A63

AUDIO-IN5-R

FA27

100R

48 100n

3A62

AUDIO-IN5-L

49

+5V 2A29

470R

FA26

FA11

5A10

1 2 3 4 5 6 7 8 9 10 11

FA25

470R

3A61

FRONT_C

CVBS_OUTB

CVBS_DTV

19 22

100n

3A60

FRONT_Y-CVBS

IA13 CVBS_OUTA

CVBS2

DATA3N

2A95

D

CVBS1

2K2

126 IA12

2A30

SOURCE SELECT AND DATA LINK 3A04

IA11

22n

22n

CVBS_IF

22n

123

22n

2A11

AV1_CVBS

7A20 BC847BW

FC02

2A10

2A26

IA10 CVBSOUTIF-MAIN

2A04

F

1A01

1n0

SDA-DMA SCL-DMA POWER-DOWN_BOLT-ON AUDIO-IN3-R

FA32 FA33 FA34 FA35 FA36

AUDIO-IN3-L

FA02

1n0

3A05 100R

2A05

AV1-AV6_FBL-HSYNC

75R

FA40 FA41 FA01 75R 3A03

FA39

DMMI_R-PR-IN H_SYNC_IN

75R

DMMI_G-Y-IN

3A02

FA38

75R 3A01

FA37

DMMI_B-PB-IN

3A06

G

CVBS-IN

FA03

FA42 FA43

AUDIO-OUT1-L AUDIO-OUT1-R RC V_SYNC_IN HP-DET-R-DC SC-STANDBY ITV-IR-SW-RESET

H

+3V3-STANDBY FA44 FA45 FA46

1n0

2A06

AA47 33 34

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

F

G

H

AF732L-N2G1A

1MM1 EMC HOLE

0T00

0T10

0T11

0T12

0T13

I

I

G_16290_025.eps 010206

3104 313 6095.3 1

2

3

4

5

6

7

8

9

10

11

12

13

0T00 I3 0T10 I4 0T11 I5 0T12 I6 0T13 I6 1A01 F7 1M36 D5 1MM1 I2 2A04 F3 2A05 G4 2A06 H3 2A07 E3 2A08 E3 2A09 E3 2A10 B3 2A11 B3 2A12 B3 2A13 B4 2A14 B5 2A15 C3 2A16 C3 2A17 C3 2A18 C3 2A20 C5 2A21 C6 2A23 E4 2A24 E4 2A25 E4 2A26 E10 2A27 E8 2A29 D8 2A30 B3 2A31 C3 2A32 E8 2A94 C8 2A95 C8 2A96 D7 2A97 A11 3A01 G3 3A02 G4 3A03 G4 3A04 B11 3A05 G3 3A06 G3 3A60 D3 3A61 D2 3A62 E3 3A63 E2 5A10 D7 5A11 E7 5A64 E3 5A65 E2 7A00-4 A9 7A20 A11 AA47 H7 FA01 G7 FA02 G7 FA03 G7 FA10 D12 FA11 D8 FA12 E8 FA25 D4 FA26 D4 FA27 E4 FA28 E4 FA29 E4 FA30 E4 FA31 E4 FA32 F7 FA33 F7 FA34 F7 FA35 F7 FA36 F7 FA37 F7 FA38 F7 FA39 G7 FA40 G7 FA41 G7 FA42 G7 FA43 G7 FA44 H7 FA45 H7 FA46 H7 FC02 B6 IA10 B3 IA11 B4 IA12 B4 IA13 B10 IA14 B5 IA15 B10 IA16 C6 IA17 C5 IA18 D10 IA19 D8

Circuit Diagrams and PWB Layouts

SSB: MPIF Main: Supply 1

B3B

2

EP1.1U AA

7.

3

EN 42

4

5

6

7

8

MPIF MAIN: SUPPLY

B3B FA13

5A12 +5V

A

A

3 IA20

MPIF-SUPPLY E/W & CONTROL

FA14

9A10

VREF-AUD-POS

3V2

3V2

IA22

1n0 IA23

3

VAUDS

B

1K2

2A38

2

VOUTO

3A11

B

IA21

100u 4V

3A10

7A00-3 PNX3000HL/N2

560R

7A10 BC847BW 2

2A37

1 3V9

100n

2A35

220R

VREF-AUD 3A12

20

VDEFLO

1K2

1V4

21

VDEFLS

IA24

13

RREF

3A13 47K

BGDEC

1u0

100n

1u0 2A41

33

2A40

IA25

FUSE9

10

FUSE8

23

FUSE7

11

GND_FILT

29

GND_RGB

D

C

7

2A39

C

D

34

GND_VADC

FA15

14

VCC_FILT

5A13 +5V

100n

2A45

E

36 38

REW EWIOUT

SCL

IA26

37

IA27

44

IA28

3A14

IA29

100R

43

SDA

+5V

3A16

EWVIN

SCL-DMA 3A15

SDA-DMA

100R

42

IRQ

10K RES

E

100n

+5V 220R

24

TESTPIN2

2A44

5A15

18

TESTPIN3

F

FA17

35

VCC_VADC

IA30 3A21

39

ADR

IRQ-MPIF AC40

40

XREF

100n

+5V 220R

2A43

5A14

2A42

FA16

28

VCC_RGB

10u 16V

220R

F

CLK-MPIF 470R +5V

41

FUSE6

G_16290_026.eps 010206

3104 313 6095.3 1

2

3

4

5

6

7

8

2A35 A6 2A37 B6 2A38 B5 2A39 C4 2A40 C4 2A41 C4 2A42 D6 2A43 D6 2A44 E5 2A45 E4 3A10 B5 3A11 B5 3A12 B5 3A13 C4 3A14 F4 3A15 F4 3A16 E5 3A21 F6 5A12 A6 5A13 D7 5A14 D5 5A15 E4 7A00-3 B2 7A10 A5 9A10 A6 AC40 F6 FA13 A6 FA14 A7 FA15 D6 FA16 D5 FA17 E4 IA20 A5 IA21 A6 IA22 B5 IA23 B5 IA24 C4 IA25 C4 IA26 E3 IA27 E3 IA28 F3 IA29 F3 IA30 F6

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 43

SSB: MPIF Main: IF & SAW Filter

1

B3C

2

3

4

5

6

7

8

9

MPIF MAIN: IF + SAW FILTER

B3C

A

A

5A16

220R

+5V

100n IA36

2A47

+5VbM

+5VaM

B

10n

2A50

IA34

B

5A17

+5VTUN

220R

IA31

10n

2A49

IA37 2A19

IA35

10n

113

3A19

180R

180R

C

330p

3A18

2A51

DTVIFINN

104

103

109 DTVIFINP

DTVIFPLL

110 VCC_IF

GND1_IF

2NDSIFAGC

+5VaM IA42

118

+5VTUN

125

+5VaM

114

IA44

D

TUNERAGC

2NDSIFEXT FUSE4

115

10n

2A58

106

VCC2_VSW

SIFAGC

IA39

CVBSOUTIF-MAIN

DTVIFAGC

102

10n

101

122

RES

2A54

45M75

VCC1_VSW SIFINN VCC_SUP

105 FA20

SIFINP

2

9A15 117

1u0

IA43

DTVOUTN

3 7A11 BC847BW

124

GND

100

1

100R DTVOUTP

VIFINN

IA38

3A17

116

1u0 2A57

99

11 12 16 17

CVBSOUTIF

IA45

120

2A56

108

VIFINP

TESTPIN1

NC

AA19

IF PART

GND_SUP

O1 O2

107

FUSE5

D

1 4 5 6 9 10 13 14 15 18

I1 I2

AA18

7 8

VIFPLL

119 121

560n

5A18

10n

2 3

10n

2A90

111

390R

100n

2A53

IF-ANA

1A10 OFWM1967L

IA40

10n

AA46

2A55

C

3A20

GND2_IF

IA41

2A52

112

+5VbM 7A00-2 PNX3000HL/N2

E

E

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1A10 C2 2A19 B5 2A47 B5 2A49 B4 2A50 B2 2A51 C9 2A52 C3 2A53 C4 2A54 D7 2A55 D3 2A56 D7 2A57 D7 2A58 E3 2A90 C1 3A17 C7 3A18 C8 3A19 C9 3A20 C4 5A16 B1 5A17 B4 5A18 C1 7A00-2 C4 7A11 C8 9A15 C7 AA18 C3 AA19 C3 AA46 C1 FA20 D3 IA31 B5 IA34 B5 IA35 B6 IA36 B2 IA37 B5 IA38 C8 IA39 C8 IA40 C4 IA41 C4 IA42 D7 IA43 D4 IA44 D7 IA45 C7

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 44

SSB: MPIF Main: Audio Source Selection

1

B3D

2

3

4

5

6

7

8

MPIF MAIN: AUDIO SOURCE SELECTION

A

B3D A

7A00-1 PNX3000HL/N2

93 94 95 IA51

89

2A65

C

100n

90 97 96 78 76 71

MIC2N MIC2P MIC1N MIC1P

VAADCREF

GND1_ASW FUSE1 FUSE2 GND_AADC FUSE3 GND2_ASW

17

D

C

VAADCN

AMEXT

87

B

VCC2_ASW

AUDIO-IN2-L

E

2A67

IA55

2A68

1u0

IA57

1u0

2A69

IA58

2A01

1u0

IA90

1u0

2A02

IA91

2A33

1u0

IA32

1u0

AUDIO-IN1-R

AUDIO-IN2-R AUDIO-IN3-L AUDIO-IN3-R AUDIO-IN4-L

1u0

AUDIO-IN4-R

2A71

AUDIO-IN5-L

D

IA53

2A66

AUDIO-IN1-L

SCART2L 66 SCART2R 65

92

VCC1_ASW

SCART1L 70 SCART1R 69

100n

2A64

100n

2A63

88

VCC_AADC

LINEL 68 LINER 67

98

DSNDL2 73 DSNDR2 72

IA50

DSNDL1 75 DSNDR1 74

B

9A19

L5 128 R5 127

+8V-AUD

IA49

AUDIO SOURCE SELECT

VAADCP

L4 80 R4 79

77

L3 82 R3 81

+5VTUN

IA48

L2 84 R2 83

91

L1 86 R1 85

100n

1u0 2A62

1u0 2A61

2A60

IA47

E AUDIO-OUT1-R AUDIO-OUT1-L IA08

2A98

IA09

1u0

IA33

2A34 1u0

2A99

IA01

DSNDR1

IA02

DSNDL1

IA63 1u0

1u0

AUDIO-IN5-R

F

2A73

IA65

F

1u0

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2A01 E3 2A02 E3 2A33 E3 2A34 F3 2A60 A3 2A61 A3 2A62 A4 2A63 B3 2A64 B4 2A65 C4 2A66 E3 2A67 E3 2A68 E3 2A69 E3 2A71 F3 2A73 F3 2A98 F7 2A99 F7 7A00-1 A5 9A19 B4 IA01 F8 IA02 F8 IA08 E7 IA09 F7 IA32 E4 IA33 F4 IA47 A3 IA48 B3 IA49 B4 IA50 B4 IA51 C4 IA53 E4 IA55 E4 IA57 E4 IA58 E4 IA63 F4 IA65 F4 IA90 E4 IA91 E4

Circuit Diagrams and PWB Layouts

SSB: MPIF Main: Audio Amplifier 1 2

B3E

EP1.1U AA

3

7.

4

EN 45

5

6

7

8

9

10

MPIF MAIN: AUDIO AMPLIFIER

B3E

A

A +5V2-STBY

A-PLOP

6A11 IA72

3A25

0V

IA68

3A24

5V

10K

3

IA69 BC857BW 7A15

IA70

B

2 9A01

47K

1u0

2A76

3A26

680K

B

7A08 BC847BW IA71 1

100K

BAS316

3A23

+5V2-STBY

+5V

8

3A27

ADAC7

3

33R 3A28

2A78

1 2

16V 100u IA74

IA88

FK02

AUDIO-HDPH-L-AP

33R

4

IA73

7A04-1 TS482IST

IA75 IA76

RES 3A31

IA77

15K

C

1K0

+5V

15K RES 3A32 27K 7A04-2 TS482IST

ADAC8

3A33 33R

8

D

3A29

9A02

33p 3A30 1u0

2A80 RES

27K

2A79

100n

3A51

2A81

C

7A16 BC817-25W

5

2A83

7 6 4

IA89

16V 100u IA78

3A34

FK11

D

AUDIO-HDPH-R-AP

33R 7A14 BC817-25W IA92

IA79

33p 3A36

27K

15K

+12VSW

VREF-AUD

5

7A05-2 LM324 4

15K

E

1u0

RES 2A85 RES 3A37 +12VSW

1K0

3A52

E

3A35

2A84

RES 3A38 IA80

27K

3 IA81 7

6

3A41

IA82

1

7A17 BC847BW 2

3A42

11

F

10K

1K0

F

33R

3A39

1n0

2A86

IA05

FA21

IA83

1u0

2A87

G

2A92

10K

18K

3A44

3A08

IA97

1u0

G

10K

3A43

+8V-AUD

H

H

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3

4

5

6

7

8

9

10

2A76 B2 2A78 C5 2A79 C4 2A80 C3 2A81 D5 2A83 D6 2A84 E5 2A85 E5 2A86 F2 2A87 G4 2A92 G4 3A08 G2 3A23 A3 3A24 B7 3A25 B3 3A26 B2 3A27 B6 3A28 C6 3A29 C8 3A30 C4 3A31 D3 3A32 D4 3A33 D6 3A34 D6 3A35 D8 3A36 E5 3A37 E4 3A38 E5 3A39 F3 3A41 F2 3A42 F2 3A43 G3 3A44 G3 3A51 C3 3A52 E4 6A11 B2 7A04-1 C4 7A04-2 D5 7A05-2 E1 7A08 B3 7A14 D8 7A15 B7 7A16 C7 7A17 F3 9A01 B4 9A02 C5 FA21 G4 FK02 C6 FK11 D7 IA05 F3 IA68 B3 IA69 B7 IA70 B8 IA71 B3 IA72 B2 IA73 C3 IA74 C6 IA75 C8 IA76 C3 IA77 D3 IA78 D6 IA79 E5 IA80 E5 IA81 F2 IA82 F3 IA83 G2 IA88 C4 IA89 D6 IA92 D8 IA97 G4

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 46

SSB: PNX2015: Audio / Video

1

B4A

3

4

5

9

7J00-7 PNX 2015

DSNDR1

3n3 2L66 3n3

AF3 AF4 AF5

ADAC9 ADAC9N ADAC9P

AE3 AE4 AE5

ADAC10 ADAC10N ADAC10P

AD3 AD4 AD5

ADAC11 ADAC11N ADAC11P

AC3 AC4 AC5

ADAC12 ADAC12N ADAC12P

U2 U3 U4 V4 V5 W5

I2S-MCH-LR I2S-MCH-CSW I2S-MCH-SLR I2S-MAIN-D I2S-SUB-D

I2S-BCLK-MAIN

V2

I2S-WS-MAIN

V3

I2S_IN_SD1 I2S_IN_SD2 I2S_IN_SD3 I2S_IN_SD4 I2S_IN_SD5 I2S_IN_SD6 I2S_SCK_SYS I2S_WS_SYS

M4

CLK-MPIF

F

I2S_OUT_SCK I2S_OUT_SD1 I2S_OUT_SD2 I2S_OUT_SD3 I2S_OUT_SD4 I2S_OUT_SD5 I2S_OUT_SD6 I2S_OUT_WS

Y2 W1 W2 V1 W3 W4 Y4 Y3

100n

9J22 9J24

+5V2-STBY

+12VSW AV6_VSYNC IJ53

5J04

IJ04

+1V2

120R AV2_FBL

3J01

IJ54

120R

11V3

120R

E

120R AV6_VSYNC

IJ55

5J06

IJ06

+3V3

3J07

68R

I2S-MAIN-ND

IJ07

RESET-AUDIO

FLA8

3L03

IJ11

470K

0V

1

0E02

IJ27 0V

A-PLOP

10K

7J01 BC847BW 2

5J07 120R

3L02

IJ25 11V1

3

120R

+1V2

I2S_SCK_XTRA I2S_WS_XTRA

11V1 5 IJ26

4 BC847BPN 7J02-2 3 0V

6 2

7J02-1 BC847BPN 1

F

0E03

3 2 1

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2

3

4

5

D

IJ09

5J05

IJ05 3JA2

MPIF_CLK

U1 U5

C

AV1-AV6_FBL-HSYNC AV2_FBL HV-PRM-MAIN

BAT54 COL

2L65

ADAC8 ADAC8N ADAC8P

+1V2

6J08

DSNDL1

3n3

AA1 AA2 AA3

H5 G6 J5 K5 K2 K1 K4 K3 J2 J1 J4 J3 H2 H1 H4 H3 K6 L3 L4 L5 L1 L2 G3 G1 G2

120R

BAS316

2LA9

AVP2_DLK_VDDA AVP2_DLK_VDDD AVP2_DLK_VSSA AVP2_DLK_VSSD AVP2_DLK1DN AVP2_DLK1DP AVP2_DLK1SN AVP2_DLK1SP AVP2_DLK2DN AVP2_DLK2DP AVP2_DLK2SN AVP2_DLK2SP AVP2_DLK3DN AVP2_DLK3DP AVP2_DLK3SN AVP2_DLK3SP AVP2_DTC_CLVSS AVP2_DTC_VDD3 AVP2_DTC_VDDA AVP2_DTC_VSSA AVP2_HSYNCFBL1 AVP2_HSYNCFBL2 AVP2_HVINFO1 AVP2_VSYNC1 AVP2_VSYNC2

2J10

1u0

3n3

ADAC7 ADAC7N ADAC7P

5J03

2LT0

ADAC8

AB1 AB2 AA4

100n

6J07

2LA8

IJ03

120R

3L00

ADAC7

ADAC6 ADAC6N ADAC6P

+3V3 2J08

100K

AC1 AC2 AB3

5J02

IJ02

3L01

C

ADAC5 ADAC5N ADAC5P

B

100K

AD1 AD2 AB4

120R

100n

ADAC4 ADAC4N ADAC4P

2J06 100n

100n

AE1 AE2 AB5

5J01

100n

ADAC3 ADAC3N ADAC3P

DATA1N-MAIN DATA1P-MAIN STROBE1N-MAIN STROBE1P-MAIN DATA2N-MAIN DATA2P-MAIN STROBE2N-MAIN STROBE2P-MAIN DATA3N-MAIN DATA3P-MAIN STROBE3N-MAIN STROBE3P-MAIN

100n

2J13

AF1 AF2 AG4

IJ01

2J16

ADAC2 ADAC2N ADAC2P

N5 M5 P5 R5 R2 R1 R4 R3 P2 P1 P4 P3 N2 N1 N4 N3 T6 T3 T4 T5 T1 T2 M3 M1 M2

2J18

AG1 AG2 AG3

AVP1_DLK_VDDA AVP1_DLK_VDDD AVP1_DLK_VSSA AVP1_DLK_VSSD AVP1_DLK1DN AVP1_DLK1DP AVP1_DLK1SN AVP1_DLK1SP AVP1_DLK2DN AVP1_DLK2DP AVP1_DLK2SN AVP1_DLK2SP AVP1_DLK3DN AVP1_DLK3DP AVP1_DLK3SN AVP1_DLK3SP AVP1_DTC_CLVSS AVP1_DTC_VDD3 AVP1_DTC_VDDA AVP1_DTC_VSSA AVP1_HSYNCFBL1 AVP1_HSYNCFBL2 AVP1_HVINFO1 AVP1_VSYNC1 AVP1_VSYNC2

120R

2J20

3n3

ADAC1 ADAC1N ADAC1P

3J12

2LA6

AH1 AH2 AH3

2J03

120R

ADAC2

3n3

+1V2

AUDIO / VIDEO ADAC_CLK

3J13

2LA5

5J00

IJ00

100n

100n

A

120R

ADAC1

E

8

VREF-AUD-POS

Y5

D

7

B4A

Φ

B

6

PNX2015: Audio / Video

2J01

A

2

6

7

8

9

0E02 F5 0E03 F5 2J01 A1 2J03 A6 2J06 B6 2J08 B6 2J10 C6 2J13 E6 2J16 E6 2J18 E6 2J20 F6 2L65 D1 2L66 D1 2LA5 B1 2LA6 B1 2LA8 C1 2LA9 D1 2LT0 E9 3J01 E4 3J07 F4 3J12 C4 3J13 C4 3JA2 E4 3L00 E9 3L01 E8 3L02 E9 3L03 E8 5J00 A6 5J01 B6 5J02 B6 5J03 C6 5J04 D6 5J05 E6 5J06 E6 5J07 F6 6J07 D9 6J08 D9 7J00-7 A3 7J01 E8 7J02-1 F9 7J02-2 E9 9J22 C4 9J24 C5 FLA8 E7 IJ00 A5 IJ01 B5 IJ02 B5 IJ03 C5 IJ04 D6 IJ05 E6 IJ06 E6 IJ07 F6 IJ09 E9 IJ11 E8 IJ25 E9 IJ26 E9 IJ27 F8 IJ53 D9 IJ54 D9 IJ55 E8

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 47

SSB: PNX2015: DV I/O Interface

1

B4B

2

3

4

5

6

7

8

9

PNX 2015: DV I/O Interface

B4B A

A

7J00-4 PNX 2015

Φ

DV INPUT

B

C

DV4-CLK DV4-VALID

AK8 AH8

DV_CLK DV_VALID

DV1_CLK DV1_VALID

DV4-DATA0_SOP DV4-DATA1_ERR DV4-DATA2_0 DV4-DATA3_1 DV4-DATA4_2 DV4-DATA5_3 DV4-DATA6_4 DV4-DATA7_5 DV4-DATA8_6 DV4-DATA9_7

AG8 AK7 AJ7 AH7 AG7 AF7 AK6 AJ6 AH6 AG6

DV4_DATA_0 DV4_DATA_1 DV4_DATA_2 DV4_DATA_3 DV4_DATA_4 DV4_DATA_5 DV4_DATA_6 DV4_DATA_7 DV4_DATA_8 DV4_DATA_9

DV1_DATA0 DV1_DATA1 DV1_DATA2 DV1_DATA3 DV1_DATA4 DV1_DATA5 DV1_DATA6 DV1_DATA7 DV1_DATA8 DV1_DATA9

DV5-DATA0_SOP DV5-DATA1_ERR DV5-DATA2_0 DV5-DATA3_1 DV5-DATA4_2 DV5-DATA5_3 DV5-DATA6_4 DV5-DATA7_5 DV5-DATA8_6 DV5-DATA9_7

AF6 AK5 AH5 AG5 AK4 AJ4 AH4 AK3 AJ3 AK2

DV5_DATA_0 DV5_DATA_1 DV5_DATA_2 DV5_DATA_3 DV5_DATA_4 DV5_DATA_5 DV5_DATA_6 DV5_DATA_7 DV5_DATA_8 DV5_DATA_9

DV2_CLK DV2_VALID

DV-VREF DV-FREF DV-HREF

AJ9 AK9 AH9

DV_VREF DV_FREF DV_HREF

DV2_DATA0 DV2_DATA1 DV2_DATA2 DV2_DATA3 DV2_DATA4 DV2_DATA5 DV2_DATA6 DV2_DATA7 DV2_DATA8 DV2_DATA9 DV3_CLK DV3_VALID

D

DV3_DATA0 DV3_DATA1 DV3_DATA2 DV3_DATA3 DV3_DATA4 DV3_DATA5 DV3_DATA6 DV3_DATA7 DV3_DATA8 DV3_DATA9

AD28 AD29

7J00-2 PNX 2015

33R

AF30 AF27

3LR1

AJ30 AH29 AG29 AG30 AH30 AG28 AH27 AJ28 AK29 AH28

33R

3LS1-2

33R

3LR9-3

33R

3LR9-1

33R

3LS0-2

33R

3LS1-3

33R

33R

3LR0

33R

3LR9-4

33R

3LS0-3

33R

3LS1-1

33R

3LR9-2

33R

3LS1-4

3LS0-4

MP-ROUT-0 MP-ROUT-1 MP-ROUT-2 MP-ROUT-3 MP-ROUT-4 MP-ROUT-5 MP-ROUT-6 MP-ROUT-7 MP-ROUT-8 MP-ROUT-9

A27 A28 A29 A30 B28 B30 C28 C29 C30 D27

MP-GOUT-0 MP-GOUT-1 MP-GOUT-2 MP-GOUT-3 MP-GOUT-4 MP-GOUT-5 MP-GOUT-6 MP-GOUT-7 MP-GOUT-8 MP-GOUT-9

D28 D29 D30 E27 E28 E30 F26 F27 F28 F29

MP-BOUT-0 MP-BOUT-1 MP-BOUT-2 MP-BOUT-3 MP-BOUT-4 MP-BOUT-5 MP-BOUT-6 MP-BOUT-7 MP-BOUT-8 MP-BOUT-9

F30 G26 G27 G28 G29 G30 H27 H28 H30 J26

DV2A-CLK

AE30 AF28 AD27 AD26 AD30 AE26 AE27 AE28 AE29 AG27 AK28 AK30

B

Φ

AB27 AA30 AA29 AA28 AB29 AB28 AC30 AC28 AC27 AB30

DV3F-CLK DV3F-VALID DV3F-DATA0_SOP DV3F-DATA1_ERR DV3F-DATA2_0 DV3F-DATA3_1 DV3F-DATA4_2 DV3F-DATA5_3 DV3F-DATA6_4 DV3F-DATA7_5 DV3F-DATA8_6 DV3F-DATA9_7

OUTPUT INTERFACE RIN0 RIN1 RIN2 RIN3 RIN4 RIN5 RIN6 RIN7 RIN8 RIN9 GIN0 GIN1 GIN2 GIN3 GIN4 GIN5 GIN6 GIN7 GIN8 GIN9 BIN0 BIN1 BIN2 BIN3 BIN4 BIN5 BIN6 BIN7 BIN8 BIN9

LVDS_AN LVDS_AP

B26 C26

TXPNXATXPNXA+

LVDS_BN LVDS_BP

A25 B25

TXPNXBTXPNXB+

LVDS_CN LVDS_CP

D25 E25

TXPNXCTXPNXC+

LVDS_DN LVDS_DP

B24 C24

TXPNXDTXPNXD+

LVDS_EN LVDS_EP

E24 F24

TXPNXETXPNXE+

LVDS_CLKN LVDS_CLKP

C23 D23

TXPNXCLKTXPNXCLK+

RGB_CLK_IN RGB_UD RGB_HSYNC RGB_VSYNC RGB_DE

J30 J27 J29 J28 K26

AJ10

C

MP-CLKOUT MP-OUT-FFIELD MP-OUT-HS MP-OUT-VS MP-OUT-DE

D

E

E

G_16290_031.eps 010206

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2

3

4

5

6

7

8

9

3LR0 D4 3LR1 C4 3LR9-1 D4 3LR9-2 E4 3LR9-3 D4 3LR9-4 D4 3LS0-2 D4 3LS0-3 D4 3LS0-4 E4 3LS1-1 D4 3LS1-2 D4 3LS1-3 E4 3LS1-4 E4 7J00-2 B7 7J00-4 B2 AJ10 D8

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 48

SSB: PNX2015: Tunnelbus

1

B4C

2

3

4

5

6

PNX 2015: TUNNELBUS

B4C

A

A 7J00-1 PNX 2015

Φ

TUNNELBUS

C4 B4 A4 F3 B3 C3 D3 E3 F2 A3 F1 A2 B1 C1 D1 E1 D9 C9 A9 D8 B9 D7 C8 A8 D6 C6 B6 A6 D5 C5 A5 E4

C

D +2V5

D4 B7 C7

9LA8 9LA9

TUNN_TX_D0 TUNN_TX_D1 TUNN_TX_D2 TUNN_TX_D3 TUNN_TX_D4 TUNN_TX_D5 TUNN_TX_D6 TUNN_TX_D7 TUNN_TX_D8 TUNN_TX_D9 TUNN_TX_D10 TUNN_TX_D11 TUNN_TX_D12 TUNN_TX_D13 TUNN_TX_D14 TUNN_TX_D15

TUNS_TX_D0 TUNS_TX_D1 TUNS_TX_D2 TUNS_TX_D3 TUNS_TX_D4 TUNS_TX_D5 TUNS_TX_D6 TUNS_TX_D7 TUNS_TX_D8 TUNS_TX_D9 TUNS_TX_D10 TUNS_TX_D11 TUNS_TX_D12 TUNS_TX_D13 TUNS_TX_D14 TUNS_TX_D15

K28 K27 L30 L28 K29 N26 L27 K30 M27 N28 N27 P28 P27 N30 N29 R29

TUNN_RX_D0 TUNN_RX_D1 TUNN_RX_D2 TUNN_RX_D3 TUNN_RX_D4 TUNN_RX_D5 TUNN_RX_D6 TUNN_RX_D7 TUNN_RX_D8 TUNN_RX_D9 TUNN_RX_D10 TUNN_RX_D11 TUNN_RX_D12 TUNN_RX_D13 TUNN_RX_D14 TUNN_RX_D15

TUNS_RX_D0 TUNS_RX_D1 TUNS_RX_D2 TUNS_RX_D3 TUNS_RX_D4 TUNS_RX_D5 TUNS_RX_D6 TUNS_RX_D7 TUNS_RX_D8 TUNS_RX_D9 TUNS_RX_D10 TUNS_RX_D11 TUNS_RX_D12 TUNS_RX_D13 TUNS_RX_D14 TUNS_RX_D15

R27 P30 T27 R30 T28 T29 T30 U27 V27 V28 V29 V30 W26 W27 W28 W29

TUNS_RX_BUSY TUNS_RX_CLKN TUNS_RX_CLKP

W30 U30 U28

TUNS_REF

M28

TUNN_RX_BUSY TUNN_RX_CLKN TUNN_RX_CLKP TUNN_REF

TUN-VIPER-RX-BUSY 3L10

33R

3L12-1

33R

3L13-3

33R

3L13-2

33R

3L12-3

33R

3L14-1

33R

3L11-3

33R

3L14-3

33R

3L11-1

33R

TUN-VIPER-RX-CLKP 3L12-2

33R

3L13-4

33R

3L12-4

33R

3L13-1

33R

3L14-4

33R

3L11-4

33R

3L11-2

33R

3L14-2

33R

TUN-VIPER-RX-DATA0 TUN-VIPER-RX-DATA1 TUN-VIPER-RX-DATA2 TUN-VIPER-RX-DATA3 TUN-VIPER-RX-DATA4 TUN-VIPER-RX-DATA5 TUN-VIPER-RX-DATA6 TUN-VIPER-RX-DATA7 TUN-VIPER-RX-DATA8 TUN-VIPER-RX-DATA9 TUN-VIPER-RX-DATA10 TUN-VIPER-RX-DATA11 TUN-VIPER-RX-DATA12 TUN-VIPER-RX-DATA13 TUN-VIPER-RX-DATA14 TUN-VIPER-RX-DATA15

B

C

TUN-VIPER-TX-DATA0 TUN-VIPER-TX-DATA1 TUN-VIPER-TX-DATA2 TUN-VIPER-TX-DATA3 TUN-VIPER-TX-DATA4 TUN-VIPER-TX-DATA5 TUN-VIPER-TX-DATA6 TUN-VIPER-TX-DATA7 TUN-VIPER-TX-DATA8 TUN-VIPER-TX-DATA9 TUN-VIPER-TX-DATA10 TUN-VIPER-TX-DATA11 TUN-VIPER-TX-DATA12 TUN-VIPER-TX-DATA13 TUN-VIPER-TX-DATA14 TUN-VIPER-TX-DATA15 3L15

33R

D

TUN-VIPER-TX-BUSY TUN-VIPER-TX-CLKN

TUN-VIPER-TX-CLKP VREF-PNX

1n0

2L64

A7

R28 M30 M29

2L01

B

TUNS_TX_BUSY TUNS_TX_CLKN TUNS_TX_CLKP

TUNN_TX_BUSY TUNN_TX_CLKN TUNN_TX_CLKP

1n0

A1 D2 C2

E

E IL03

100n

3L20

IL05

47R

1V3

VREF-PNX

F

100n

2L07 2L08

3L38

1K0 1K0

3L39

F

1u0 RES

2L06

+2V5

G_16290_032.eps 010206

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2

3

4

5

6

2L01 E5 2L06 F2 2L07 F3 2L08 F3 2L64 E2 3L10 B4 3L11-1 C4 3L11-2 C5 3L11-3 C4 3L11-4 B5 3L12-1 B4 3L12-2 B5 3L12-3 B4 3L12-4 B5 3L13-1 B5 3L13-2 B4 3L13-3 B4 3L13-4 B5 3L14-1 B4 3L14-2 C5 3L14-3 C4 3L14-4 B5 3L15 D4 3L20 F3 3L38 F3 3L39 F3 7J00-1 A3 9LA8 D2 9LA9 D2 IL03 E3 IL05 F4

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 49

SSB: PNX2015: DDR Interface

1

B4D

2

3

4

5

6

7

8

B4D +2V5-DDRPNX

7J00-3 PNX 2015

MDQS_0 MDQS_1 Mem_DLL0 Mem_DLL1 MM_VREF MRAS MCAS MWE

C17 A16

1K0

3L51

B15 D16

22R

3L99

PNX-MDQM-0 PNX-MDQM-1

22R

A15 B16

PNX-MDQS-0 PNX-MDQS-1 ILN1

E21 E10

VREF-DDRPNX

C16 A14 D15 C15

3L98 3L97 33R

PNX-MRAS PNX-MCAS PNX-MWE

33R 3L96 33R

29 30 31 32 35 36 37 38 39 40 28 41

PNX-MA-0 PNX-MA-1 PNX-MA-2 PNX-MA-3 PNX-MA-4 PNX-MA-5 PNX-MA-6 PNX-MA-7 PNX-MA-8 PNX-MA-9 PNX-MA-10 PNX-MA-11

PNX-MCLK-P PNX-MCS-0 3L52

26 27

PNX-MBA0 PNX-MBA1

20 47

PNX-MDQM-0 PNX-MDQM-1 VREF-DDRPNX 2L55

FLA9

49 1n0 46 45 44 24 23 22 21

PNX-MCLK-N PNX-MCLK-P PNX-MCKE PNX-MCS-0 PNX-MRAS PNX-MCAS PNX-MWE

+1V2

Φ

+2V5-DDRPNX

+2V5-DDRPNX

0 BA 1

D

L DM U VREF CK CK CKE CS RAS CAS WE

DQS

3L50 3L57 3L59 3L61 3L63 3L65 3L67 3L69

16 51 3L71

22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R

3L56 3L58 3L60 3L62 3L64 3L66 3L68 3L70 3L89

22R 22R

PNX-MDATA-0 PNX-MDATA-1 PNX-MDATA-2 PNX-MDATA-3 PNX-MDATA-4 PNX-MDATA-5 PNX-MDATA-6 PNX-MDATA-7 PNX-MDATA-8 PNX-MDATA-9 PNX-MDATA-10 PNX-MDATA-11 PNX-MDATA-12 PNX-MDATA-13 PNX-MDATA-14 PNX-MDATA-15

D

12

6

IK01

3L21

VREF-DDRPNX 560R

3L22

E

G_16290_033.eps 010206

3104 313 6095.3

2

3

4

C

PNX-MDQS-0 PNX-MDQS-1

VSSQ 66

48

L U

2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65

B PNX-MA-12

100p

1n0 2L63

2L62

220R

1

1n0

100n 2L61

100n 2L54

100n 2L53

100n 2L52

100n 2L51 61

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

14 17 19 25 42 43 50 53

560R

220R 5L51

E

NC

A

34 IL04

VDDQ

DDR SDRAM 128Mx16

VSS

5L52

55

2L50

VDD 0 1 2 3 4 5 6 7 8 9 10 11 AP

D

+2V5

15

9

3

33

100n

K4D261638F-LC40

PNX-MCKE PNX-MCLK-N

100R A17 C14

1

7L50

18

2L56 MDQM_0 MDQM_1

MD_0 MD_1 MD_2 MD_3 MD_4 MD_5 MD_6 MD_7 MD_8 MD_9 MD_10 MD_11 MD_12 MD_13 MD_14 MD_15

PNX-MBA0 PNX-MBA1 33R

64

A11 B12 C11 A12 A10 B13 B10 A13 A18 B21 B18 A21 A19 C20 B19 A20

PNX-MDATA-0 PNX-MDATA-1 PNX-MDATA-2 PNX-MDATA-3 PNX-MDATA-4 PNX-MDATA-5 PNX-MDATA-6 PNX-MDATA-7 PNX-MDATA-8 PNX-MDATA-9 PNX-MDATA-10 PNX-MDATA-11 PNX-MDATA-12 PNX-MDATA-13 PNX-MDATA-14 PNX-MDATA-15

MCLK_P MCS_0

33R 3L94

58

3L93

3L95 3L90

52

3L92

3L91

MCKE_0 MCLK_N

D14 C13

5L50

3L48

MBA_0 MBA_1

30R

33R 33R 33R 33R 33R 33R

3L49

3L44

2L60

3L46

3L47

33R 33R

3L42

DDR INTERFACE MA_0 MA_1 MA_2 MA_3 MA_4 MA_5 MA_6 MA_7 MA_8 MA_9 MA_10 MA_11 MA_12

100n

3L45

3L43

C12 D12 D11 C10 D21 C21 D20 D19 C19 D18 D13 C18 D17

1n0

3L40 33R 33R 33R 33R 33R

3L41

2L59

PNX-MA-0 PNX-MA-1 PNX-MA-2 PNX-MA-3 PNX-MA-4 PNX-MA-5 PNX-MA-6 PNX-MA-7 PNX-MA-8 PNX-MA-9 PNX-MA-10 PNX-MA-11 PNX-MA-12

100n 2L58

A

Φ

100n 2L57

A

C

10

PNX 2015: DDR Interface +2V5-DDRPNX

B

9

5

6

7

8

9

10

2L50 A8 2L51 A8 2L52 A8 2L53 A9 2L54 A9 2L55 C6 2L56 A7 2L57 A7 2L58 A7 2L59 C5 2L60 C6 2L61 A9 2L62 E7 2L63 E7 3L40 A2 3L41 A1 3L42 A2 3L43 A1 3L44 B2 3L45 B1 3L46 B2 3L47 B1 3L48 B2 3L49 B1 3L50 B9 3L51 B4 3L52 B4 3L56 C9 3L57 C9 3L58 C9 3L59 C9 3L60 C9 3L61 C9 3L62 C9 3L63 C9 3L64 C9 3L65 C9 3L66 C9 3L67 C9 3L68 C9 3L69 C9 3L70 D9 3L71 D9 3L89 D9 3L90 B4 3L91 B2 3L92 B1 3L93 B2 3L94 B5 3L95 B4 3L96 C4 3L97 C4 3L98 C5 3L99 B5 5L50 C6 5L51 E7 5L52 E7 7J00-3 A3 7L50 B7 FLA9 C6 IL04 E7

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 50

SSB: PNX2015: Standby & Control 1

B4E

2

3

4

5

6

7

9

10

11

12

13

14

PNX 2015: STANDBY & CONTROL

B4E 7J00-5 PNX 2015

+3V3-STANDBY

A

8

A

Φ

3L84

RES 9P15

SPI-PROG

2Q71

100R 100R 100R 100R 100R 100R

AJ21 AH21 AG21 AF21 AK22 AJ22 AH22 AG22

3LK6 3LK7 3LK8 3LK9 3LL0 3LL1 3LL2 3LL3 3LL4 3LL7

100R 100R 100R 100R 100R 100R 100R 100R 100R 100R

3LL5 3LL6

100R 100R

AK23 AH23 AG23 AF23 AK24 AJ24 AH24 AG24 AK27 AJ27

SPI_SDI P2_0 P2_1 P2_2 P2_3 P2_4 P2_5 P2_6 P2_7 P3_0 P3_1 P3_2 P3_3 P3_4 P3_5 P3_6 P3_7

SPI_SDO XTAL_MC_VDD XTALI_MC XTALO_MC XTAL_MC_VSS PSEN PWM0

SCL-UP-VIP

100R

10K 3LE3

SCL-UP-VIP

SDA-UP-VIP

100R

4K7

SPI-CLK

AG10

SPI-CSB

AJ10

SPI-SDI

AK10

3LE4

SDA-UP-VIP

4K7

SPI-SDI

SPI-SDO 5LA2

FLA0

AK12 AJ12

600R +1V2-STANDBY

C

AH12 AG12 3LQ6

AH25

PSEN

3LB9

PSEN

10K

100R

AK25

2LA0

P4_0 P4_1 P4_2 P4_3 P4_4 P4_5 P4_6 P4_7

+3V3-STANDBY

22p 7LA7 M25P05-AVMN6

2LA1

5

FLA2

SPI-CLK

6

FLA3

SPI-CSB

1

FLA4

SPI-WP

FLA5

VCC

FLA1

SPI-SDO

22p

BACKLIGHT-CONTROL

P5_0 P5_1 P5_2 P5_3 P5_4 P5_5 P5_6 P5_7

B

10K

3LF0

10K 3LB8

EA

RESET-STBY

3LE2

3LB5

100R

AG26 AH10

EA

8

3LK0 3LK1 3LK2 3LK3 3L80 3LK5

SPI_CSB

3 7

D C

Φ

512K FLASH

Q

D

2

S W HOLD

ILB8

VSS

E

P6_4 P6_5

+3V3-STANDBY

RES

FJ40

SPI-PROG SPI-WP

RES

SPI-PROG SPI-WP RES 9P25

10K 3LB3

10K 10K

ILB3

RES

3LH5 3LH6

RESET-MAIN-NVM STBY-WP-NAND-FLASH KEYBOARD LIGHT-SENSOR TEMP-SENSOR FRONT-DETECT

10K

10K 10K 10K 10K 10K 10K

RESET-MAIN-NVM STBY-WP-NAND-FLASH KEYBOARD 2LB4 100n TEMP-SENSOR FRONT-DETECT

AK19 AJ19 AH19 AG19 AK20 AH20 AG20 AK21

SPI_CLK

AK26 AH26

ALE

3LH7

3LH2 100R

4

FLC2

10K 10K 680R

3LC1 3LC8 3L82 3L83 3LE5 3LE6

3V2

3LB2

3LE8 3LE9 3LS2

100R 100R 100R 100R 100R 100R 100R 100R

SDA_MC

100R

3LB7

10K

LED2 LED1 RESET-SYSTEM RESET-AUDIO DEBUG-BREAK EJTAG-DETECT P4_4

10K 10K 10K 10K 10K 10K 10K

RES

10K

10K

3LD3 3LD4 3LD5 3LD6 3LD7 3LD8 3L81 3LE7

3LJ0 3LJ1 3L77 3LJ5 3LJ6 3LJ7 3LJ8 3LJ9

10K RES

3V2 3V2

RESET-MIPS RESET-PNX2015 SDM LED2 LED1 RESET-SYSTEM RESET-AUDIO DEBUG-BREAK EJTAG-DETECT P4_4

3LB1

10K

SDM

10K RES

3LR2

3L79

FLB7

ILB9

PROT-AUDIOSUPPLY RXD-UP TXD-UP P3_2

SCL_MC

AF25

ALE

3LB4

10K

3LN6 3LN7

3LG2 100K

3LA8

3L78

RESET-MIPS RESET-PNX2015 9P24 RES 9P14 RES SDM 2Q70 100p P3_2

AF16 AK17 AH17 AG17 AK18 AJ18 AH18 AG18

MC_RESET

3LE1

AG25

1M0 RES

10K 10K

3LD0 3LD1

P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7

100R 100R 100R 100R 100R 100R 100R 100R

EA

+3V3-STANDBY

+3V3-STANDBY

AJ25

100n

3LN0 3LN1 3LN2 3LN3 3LN4 3LN5

P1_0 P1_1 P1_2 P1_3 P1_4 P1_5 P1_6 P1_7

ALE

3LB6

ILC5 ILC6 ILC7

AK13 AJ13 AH13 AG13 AK14 AH14 AG14 AF14

PWM1

2LB0

DETECT-3V3 DETECT-5V DETECT-8V6 DETECT-12V CTRL4-STBY

100R 100R 100R 100R 10K 100R 100R 100R

P0_0 P0_1 P0_2 P0_3 P0_4 P0_5 P0_6 P0_7

16M

DETECT-3V3

10K

E

ILC4

P0.7

STANDBY PROCESSOR

1LA0

3LC9

D

DETECT-1V2

10K +3V3

C

+3V3-STANDBY

10K RES

3LA9

POWER-OK-DISPLAY SCL-UP-SW SDA-UP-SW

3L85

B

3LG3 3LG7 3LG5 3LG6 3LD2 3LG8 3LH9 3LH8

P0.2 P0.3 P0.4 P0.5

AK15 AJ15 AH15 AG15 AK16 AJ16 AH16 AG16

DSX840GA

RC 1n0 P50-HDMI SUPPLY-FAULT P50 POWER-OK-DISPLAY SCL-UP-SW SDA-UP-SW ILC3

2LB3

ENABLE-3V3 LAMP-ON P0_6 UART-SWITCH RC P50 P50-HDMI SUPPLY-FAULT

P0.0

RES 3LF2

10K 10K 10K 100K 4K7 4K7

ENABLE-3V3 LAMP-ON P0_6 UART-SWITCH

POD-MODE

ENABLE-1V2

100R 100R 100R 100R 100R 100R 100R 100R

100R

10K

3LC2 3LC3 3LC4 3LC5 3LC6 3LC7

POD-MODE

ENABLE-1V2

3LM0 3LR3 3LM2 3LM3 3LM4 3LM5 3L75 3LM7

ON-MODE

10K

3LC0

ON-MODE

RES 3LF9

10K 10K 10K 10K 10K 1K0 10K 10K

+3V3-STANDBY

10K

3LA0 3LR4 3LA2 3LA3 3LA4 3LA5 3L76 3LA7

100p

F

F +1V2 +1V2-STANDBY

+3V3-STANDBY

XTALI_SYS SDA_COL

Y27

XTALO_SYS

Y26

XTAL_SYS_VSS

SCL_HD

JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRSTN

SDA_HD

AH11 AK11 AJ11 AG11 AF11

9LA3 5LA3

SCL_COL

AA27

RESET_IN

AD6 AE6

SDAC_VDDD SDAC_VSSD

ILB7

+1V2

I

100n

2LA4

600R

D10 Y1 Y30 AJ1 AJ2

NC_1 NC_3 NC_4 NC_5 NC_6

AF9

3LF8

100R

AG9

3LG9

100R

C27

3LH0

100R

B27

3LH1

100R

FLA6 FLA7

SCL-DMA

3LT7

100K

10K

3LT5

3LU7

2K2

3V3

G

ILD1

7LB5 BC847BW

DETECT-12V

9J23

XTAL_SYS_VDD

Y28

27K

3V2 10K

Y29

3LV8

+3V3 +1V2

SDA-DMA

DETECT-8V6

HD_EXINT1 HD_EXINT2 INT_HD1 INT_HD2 SCL_AVIP SDA_AVIP INT_AVIP1 INT_AVIP2

SCL-DMA

7LB2-1 BC847BS

6

SDA-DMA

ILD2 F4 F5

2

IRQ-HIRATE

3LJ2

10K

+3V3

C22 D22

3LU0 IRQ-HD1 IRQ-HD2

G4

3LH3

100R

SCL-DMA

G5

3LH4

100R

SDA-DMA

10K

H

47K

1

ILD4 3

POWER-OK-DISPLAY

A22 B22

3LT9 +5V

ILD3

10K

10K

9LA0 9LA1

+12VSW

3LU2

9LA2

H

JTAG-TD-PNX2015-HDMI JTAG-TMS JTAG-TRST RESET-MIPS RESET-PNX2015

3LJ3

+3V3

DETECT-1V2

Φ

CONTROL

JTAG-TCK

DETECT-5V

7J00-6 PNX 2015

100n

2LB1

10p 3LL8 3LL9

180R

ILB5

JTAG-TD-VIPER-PNX2015

1K0

ILB6

330R

2LA2

G

3V5

3LV7

ALB0 M27-PNX

600R

5LA1

3LU8 +5V

7LB2-2 BC847BS 4

IRQ-AVIP

ILB2

ILD5

3LU1

5

+1V2-STANDBY 10K

I

+1V2

G_16290_034.eps 010206

3104 313 6095.3 1

2

3

4

5

6

7

8

9

10

11

12

13

14

1LA0 D9 2LA0 D9 2LA1 D9 2LA2 G3 2LA4 I3 2LB0 C9 2LB1 G3 2LB3 B3 2LB4 D3 2Q70 C3 2Q71 F3 3L75 B6 3L76 B2 3L77 C6 3L78 C2 3L79 C5 3L80 D6 3L81 D2 3L82 E2 3L83 E2 3L84 E4 3L85 E5 3LA0 A2 3LA2 A2 3LA3 A2 3LA4 B2 3LA5 B2 3LA7 B2 3LA8 E5 3LA9 B2 3LB1 E5 3LB2 E5 3LB3 E6 3LB4 E10 3LB5 B11 3LB6 D9 3LB7 A10 3LB8 B10 3LB9 C10 3LC0 B2 3LC1 E2 3LC2 B2 3LC3 B2 3LC4 B2 3LC5 B2 3LC6 B2 3LC7 B2 3LC8 E2 3LC9 C3 3LD0 C2 3LD1 C2 3LD2 B6 3LD3 D2 3LD4 D2 3LD5 D2 3LD6 D2 3LD7 D2 3LD8 D2 3LE1 A9 3LE2 B9 3LE3 B10 3LE4 B10 3LE5 E2 3LE6 E2 3LE7 D2 3LE8 D2 3LE9 D2 3LF0 B9 3LF2 D8 3LF8 G6 3LF9 E8 3LG2 C5 3LG3 B6 3LG5 B6 3LG6 B6 3LG7 B6 3LG8 B6 3LG9 G5 3LH0 H5 3LH1 H5 3LH2 B9 3LH3 H5 3LH4 I5 3LH5 E2 3LH6 E2 3LH7 B9 3LH8 B6 3LH9 B6 3LJ0 C6 3LJ1 C6 3LJ2 H6 3LJ3 H3 3LJ5 C6 3LJ6 C6 3LJ7 C6 3LJ8 D6 3LJ9 D6 3LK0 D6 3LK1 D6 3LK2 D6 3LK3 D6

3LK5 D6 3LK6 D6 3LK7 D6 3LK8 D6 3LK9 E6 3LL0 E6 3LL1 E6 3LL2 E6 3LL3 E6 3LL4 E6 3LL5 E6 3LL6 E6 3LL7 E6 3LL8 G3 3LL9 G3 3LM0 A6 3LM2 A6 3LM3 A6 3LM4 B6 3LM5 B6 3LM7 B6 3LN0 B6 3LN1 C6 3LN2 C6 3LN3 C6 3LN4 C6 3LN5 C6 3LN6 C6 3LN7 C6 3LQ6 C9 3LR2 C2 3LR3 A6 3LR4 A2 3LS2 D2 3LT5 G12 3LT7 G13 3LT9 H13 3LU0 H12 3LU1 I13 3LU2 H12 3LU7 G10 3LU8 G9 3LV7 G10 3LV8 G9 5LA1 G3 5LA2 C9 5LA3 H3 7J00-5 A8 7J00-6 G4 7LA7 D10 7LB2-1 H13 7LB2-2 I12 7LB5 G12 9J23 G10 9LA0 H3 9LA1 H3 9LA2 H3 9LA3 H3 9P14 C3 9P15 E3 9P24 C3 9P25 E3 ALB0 G3 FJ40 E5 FLA0 C9 FLA1 D10 FLA2 D10 FLA3 D10 FLA4 D10 FLA5 D11 FLA6 G6 FLA7 G6 FLB7 C3 FLC2 D3 ILB2 I6 ILB3 D6 ILB5 G3 ILB6 G4 ILB7 H3 ILB8 E10 ILB9 C3 ILC3 B3 ILC4 B5 ILC5 C5 ILC6 C5 ILC7 C5 ILD1 G13 ILD2 H13 ILD3 H12 ILD4 H12 ILD5 I13

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 51

SSB: PNX2015: Supply

1

3

4

5

VDDA_SYS_PLL VCCA_LVDS_PLL VDDA_1_7_MCAB VCCA_U5PLL ADC_VSSA ADC3V3VDDA AVDD_MCAB AVSS_MCAB SDAC_3V3

AE15 AE16 AE17 AE18 AF15 AF17 AF18 AE19 AE21 AE22 AF19 AF20

100n 2LN6

100n 2LN7

100n 2LN8

100n

2LP2

100n 2LP3

100n 2LP4

100n

100u 4V 2LP8

100n 2LP9

100n 2LR0

100n

100n 2LN5

100n 2LN4 5LN0

100u 4V ILN3

PLL-3V3

+3V3

C

+3V3-STANDBY

5LN1

100n

2LR2

600R

ILN4 PLL-1V2

+1V2 100n

600R

A23 A24 A26 B23

D

LVDS-3V3 +3V3-STANDBY

AE9 T25 V25 P26

PLL-1V2 LVDS-3V3 +3V3 PLL-3V3

AF24 AF22

5LN2

ILN5 UP-3V3

600R

UP-3V3

5LN3

ILN6 LVDS-3V3

+3V3

V26 W25 AK1

47u 4V 2LN3

2LN2

+1V2-STANDBY

100n

VDD_LVDS_1 VDD_LVDS_2 VDD_LVDS_3 VDD_LVDS

B

+2V5

+1V2 ILN2

600R

5LN4

100n

E

P2V5VDD_1 P2V5VDD_2 P2V5VDD_3 P2V5VDD_4 P2V5VDD_5 P2V5VDD_6 P2V5VDD_7 P2V5VDD_8 P2V5VDD_9 P2V5VDD_10 P2V5VDD_11 P2V5VDD_12 P2V5VDD_13 P2V5VDD_14 P2V5VDD_15 P2V5VDD_16 P2V5VDD_17 P2V5VDD_18 P2V5VDD_19 P2V5VDD_20 P2V5VDD_21 P2V5VDD_22 P2V5VDD_23 P2V5VDD_24

AB26 AC26 AD25 AE7 AE13 AE14 AE24 AE25 AF26

2LR4

SB1V2VDD_1 SB1V2VDD_2 SB1V2VDD_3 SB1V2VDD_4 SB1V2VDD_5 SB1V2VDD_6 SB1V2VDD_7 SB3V3VDD_1 SB3V3VDD_2 SB3V3VDD_3 SB3V3VDD_4 SB3V3VDD_5

+1V2

100n 2LR6

P3V3VDD_11 P3V3VDD_12 P3V3VDD_13 P3V3VDD_14 P3V3VDD_15 P3V3VDD_16 P3V3VDD_17 P3V3VDD_18 P3V3VDD_19

F25 G25 H26 M6 N6 V6 W6 AF8 AA26

100n 2LR9

1n0

1n0 2L92

1n0 2L91

1n0 2L90

2L89

100p

100n 2L88

100n 2L87

2L86

100n

2L85

100n

2u2

2L84

D

2u2 2L83

P3V3VDD_1 P3V3VDD_2 P3V3VDD_3 P3V3VDD_4 P3V3VDD_5 P3V3VDD_6 P3V3VDD_7 P3V3VDD_8 P3V3VDD_9

+2V5-DDRPNX +2V5 E5 E6 E7 E8 E13 E14 E15 E18 E19 F6 F7 F13 F14 F15 F18 F19 L26 M25 M26 N25 R26 P25 T26 R25

+3V3

2LP7

T13 T14 T15 T16 T17 T18 J6 U6 U13 U14 U15 U16 U17 U18 U29 V13 V14 V15 V16 V17 V18 AC29 AF29 AJ5 AJ8 AJ14 AJ17 AJ20 AJ23 AJ26 AJ29

C1V2_VDD_1 C1V2_VDD_2 C1V2_VDD_3 C1V2_VDD_4 C1V2_VDD_5 C1V2_VDD_6 C1V2_VDD_7 C1V2_VDD_8 C1V2_VDD_9 C1V2_VDD_10 C1V2_VDD_11 C1V2_VDD_12 C1V2_VDD_13 C1V2_VDD_14 C1V2_VDD_15 C1V2_VDD_16 C1V2_VDD_17 C1V2_VDD_18 C1V2_VDD_19 C1V2_VDD_20 C1V2_VDD_21 C1V2_VDD_22 C1V2_VDD_23 C1V2_VDD_24 C1V2_VDD_25 C1V2_VDD_26 C1V2_VDD_27 C1V2_VDD_28

2LR5

VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70

E9 E11 E12 E16 E17 F9 F10 F12 F16 F17 AA6 J25 K25 AB6 P6 R6 AB25 F22 F21 AA5 AE10 AE12 AF10 AF12 AF13 E20 E22 AA25

2LR8

C

VSS_36 VSS_37 VSS_38

SUPPLY

R16 R17 R18

2LP0

B

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35

Φ

+1V2

GND

+3V3

E

600R 100n

Φ

B2 B5 B8 B11 B14 B17 B20 B29 C25 D24 D26 E2 E23 E26 E29 H29 L29 N13 N14 N15 N16 N17 N18 P13 P14 P15 P16 P17 P18 U26 U25 P29 R13 R14 R15

A

7J00-8 PNX 2015

PNX 2015

2u2 2L82

8

B4F

7J00-9

2u2 2L81

7

PNX 2015: SUPPLY

A

2L80

6

2LS5

B4F

2

F

F G_16290_035.eps 010206

3104 313 6095.3

1

2

3

4

5

6

7

8

2L80 E1 2L81 E1 2L82 E1 2L83 E1 2L84 E1 2L85 E1 2L86 E2 2L87 E2 2L88 E2 2L89 E2 2L90 E2 2L91 E3 2L92 E3 2LN2 A7 2LN3 A7 2LN4 A7 2LN5 A8 2LN6 A8 2LN7 A8 2LN8 A8 2LP0 B7 2LP2 B8 2LP3 B8 2LP4 B8 2LP7 C8 2LP8 C8 2LP9 C8 2LR0 C8 2LR2 C8 2LR4 D8 2LR5 D8 2LR6 D8 2LR8 E8 2LR9 E8 2LS5 E6 5LN0 C7 5LN1 D7 5LN2 D7 5LN3 E7 5LN4 E6 7J00-8 A5 7J00-9 A2 ILN2 E6 ILN3 C8 ILN4 D8 ILN5 D8 ILN6 E8

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 52

SSB: PNX2015: Display Interface 1

B4G

2

3

4

5

6

7

8

9

10

12

11

13

VIPER/PNX 2015: DISPLAY INTERFACE

B4G +5V

+3V3

A 10K

ANALOG OUTPUT

IJ30 7J10 RES BC847BW

5J20

IJ32

2J76 1u0

*

3J25 IJ70

47K

*

1n0

*

*

IJ72

7J07 BC847BW IJ68

IJ16

3J28

*

IJ69

VDISP-SWITCH

3J94 10K

2J57

10K

*

+3V3

1K0 RES

2J61

3J22

IJ15

IJ82

BACKLIGHT-CONTROL

100R

9J21

3J20

RES

1K0

*

100R

BACKLIGHT CONTROL

100R

100p

2J22 2J23

100p

FJ07

3J63

GLINK-RXD

100R

D

FJ06

3J62

GLINK-TXD

C

B9B-PH-K

FJ05

3J61

MP-OUT-VS

1 2 3 4 5 6 7 8 9

FJ04

3J60

MP-OUT-HS

4K7

2J24

3J18

1D50

100p

7J06 BC847BW

BACKLIGHT-CNTRL-OUT

47R

D

*

IJ73

SI3441BDV

BZX384-C5V6 3J99

100p

3J19

* *

10K

3

100n

47K 6J01

5

IJ74

3J16

2J25

BC847BPN 7J05-2

* 3J92

IJ75

FJ03

100p

4

120R

2J26

7J08

IJ14

SML-310 RES

5J22

AV-BOUT 2J77

2

100p

1K0 RES

IJ76

FJ02

2J27

3J86

120R

100n

9J31

6 RES 7J05-1 BC847BPN 1

6J06

15K 2G35

+12VSW

* *

*

100n

3J21

+5V

9J30

220R IJ80

B

5J21 AV-GOUT

+12VSW

VDISP

FJ01

100p

SI4835BDY

LAMP-ON-OUT

FJ13

2J71

LAMP-ON

+12VSW

2K2 RES

5J12

+12VSW

10K

5J11 220R

9J40

* * *

3J17

220R

47K

5J10

7J04

3J15

B

C

120R

2J21

AV-ROUT IJ31

100p

4K7

3J41 RES

3J40 RES

A

E

E

47R 3J88

47R

3J44

47R

3J43

3J42

* * * *

47R

+3V3

2J40

F

5J50

TXPNXA-

FHP FJ12

CTRL-DISP1

IRQ

SDI

FJ10

FJ09

CTRL-DISP2

CTRL-DISP3

4

10p

3

2J41

RESET 2 DLW21S

PDWIN

3J91

IJ18

47R

1G50 VDISP 10p 2J42

5J52

TXPNXB-

CPU-GO

4

10p

1 CTRL-DISP1 CTRL-DISP2 CTRL-DISP3 CTRL-DISP4

PDP-GO TXPNXB+

CTRL-DISP4

3 2 DLW21S

CTRL1-VIPER

F

1

TXPNXA+ FJ22

G

LVDS CONNECTOR

*

2J43 10p 2J44

5J54

TXPNXC-

4

FJ23

10p

1

FJ24 FJ25

IJ71

3J55

ON-MODE

100p 2J64

100p 2J69

FJ28

10p

FJ29 FJ30

TXPNXCLK+

3

FJ31

2J47

FJ32

10p 2J48 5J58

TXPNXD-

IJ81

DISPLAY CONTROL 3J56

100K

4

1

4

FJ36 FJ37

10p

1 SCL-I2C4 SDA-I2C4

7J09 BC847BW

TXPNXD+

3 2 DLW21S

* *

2J49

**

3J30 3J31

33

4

I

2 DLW21S

0-1453230-3

2J73 10p

G_16290_036.eps 010206

3104 313 6095.3 1

2

3

4

5

6

7

8

H

I 3

TXPNXE+

* *

10p

1

32

G

FI-WE31P-HFE-E1500

10p 2J72 5J60

TXPNXE-

100R 100R

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

100p

47R

* *

5J56

TXPNXCLK-

2J31

3J51

IJ23

FJ27

10p 2J46

2 DLW21S

100K

CTRL4-STBY

FJ26

2J45

100p 2J30

3J52

* H

* * * *

2 DLW21S 100p

+3V3-STANDBY

2J37

47R

3

TXPNXC+

*

100p 2J38

3J23

IJ20

4K7

CTRL4-VIPER

1P06 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

9

10

11

12

13

1D50 C13 1G50 F12 1P06 F13 2G35 D8 2J21 B12 2J22 B12 2J23 C12 2J24 C12 2J25 D12 2J26 D12 2J27 E12 2J30 I11 2J31 I11 2J37 H4 2J38 H4 2J40 F9 2J41 F9 2J42 F9 2J43 G9 2J44 G9 2J45 G9 2J46 H9 2J47 H9 2J48 H9 2J49 I9 2J57 D4 2J61 D5 2J64 H5 2J69 H5 2J71 B5 2J72 I9 2J73 I9 2J76 D2 2J77 C9 3J15 B7 3J16 C8 3J17 C8 3J18 C9 3J19 C9 3J20 D9 3J21 D8 3J22 D7 3J23 G2 3J25 D3 3J28 D4 3J30 H11 3J31 I11 3J40 A9 3J41 A9 3J42 F4 3J43 F4 3J44 F5 3J51 H2 3J52 H4 3J55 H2 3J56 I3 3J60 C12 3J61 D12 3J62 D12 3J63 E12 3J86 C4 3J88 F5 3J91 G2 3J92 C2 3J94 D4 3J99 D2 5J10 B4 5J11 B4 5J12 B4 5J20 B12 5J21 B12 5J22 C12 5J50 F9 5J52 G9 5J54 G9 5J56 H9 5J58 H9 5J60 I9 6J01 D2 6J06 C5 7J04 B3 7J05-1 C7 7J05-2 C7 7J06 C9 7J07 D4 7J08 C3 7J09 I3 7J10 B10 9J21 D7 9J30 C1 9J31 C1 9J40 B9 FJ01 B13 FJ02 B13 FJ03 C13 FJ04 C13 FJ05 D13 FJ06 D13 FJ07 E13 FJ09 G5 FJ10 G5

FJ12 F5 FJ13 B5 FJ22 F5 FJ23 G11 FJ24 G11 FJ25 G11 FJ26 G11 FJ27 H11 FJ28 H11 FJ29 H11 FJ30 H11 FJ31 H11 FJ32 H11 FJ36 H11 FJ37 H11 IJ14 C2 IJ15 D2 IJ16 D3 IJ18 G2 IJ20 G2 IJ23 H2 IJ30 A9 IJ31 B9 IJ32 B10 IJ68 D4 IJ69 D4 IJ70 D3 IJ71 H2 IJ72 D7 IJ73 C9 IJ74 C9 IJ75 C8 IJ76 C7 IJ80 C4 IJ81 H3 IJ82 C9

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 53

SSB: Viper: Control 2H06 G10 2H07 G10 2H08 A1 2H09 B1 2Q69 G14

1H00 B2 1H20 B10 1M00 A11 1M60 H15 1MM3 C11

0H00 B10 0H02 B11 0H05 C10 0H09 C10 0H10 C10

3H11 D1 3H16 C3 3H17 C3 3H22 C13 3H23 C13

3H04 B13 3H05 B13 3H06 A10 3H08 C3 3H10 D1

1

3H24 G7 3H25 G7 3H31 F1 3H40 E1 3H41 F1

3H70 E8 3H71 D1 3H72 E7 3H73 B8 3H74 B8

3H54 F4 3H55 E4 3H56 E4 3H57 D4 3H69 D3

3

2

3H75 B2 3H79 A8 3H80-1 D8 3H80-2 C8 3H80-3 D8

4

3H80-4 C8 3H81-1 D8 3H81-2 C8 3H81-3 D8 3H82 B2

5

3H84 E8 3H85 E1 3H86 E8 3H88 F8 3H89 F10

3H90 B1 3H94 I7 3H95 I7 3H97 G1 3H98 C4

3Q12 B4 3Q13 B4 3Q14 B4 3Q15 B4 3Q16 H10

3H99 B4 3Q03 B2 3Q04 B2 3Q10 B4 3Q11 B4

6

3Q22 G13 3Q23 H10 3Q24 F10 3Q27 B1 3Q29 F13

3Q17 I7 3Q18 I8 3Q19 F13 3Q20 H11 3Q21 H11

7

3Q48 B4 3Q52 D4 5H02 H11 5H03 G13 6H00 I7

8

9H02 F3 9H03 C4 9H04 C1 9H05 F4 9H06 E3

6H01 F1 6H03 G1 6H07-1 G13 6H07-2 G12 7V00-5 A5

9

9H07 D1 9H08 D1 9H13 D1 9H15 F3 9H16 C4

AH10 A8 AH11 B2 FH12 H7 FQ00 H15 FQ01 H14

10

FQ02 H15 FQ03 E4 FQ04 H14 FQ10 G1 FQ19 C1

11

FQ21 C1 FQ22 C1 FQ23 C1 FQ40 B2 FQ41 B2

FQ50 D4 FQ52 F4 FQ53 F4 IH09 D1 IH16 G6

IQ03 H10 IQ04 H10 IQ15 F10 IQ16 F10 IQ17 G13

12

IQ22 G6 IQ23 G7 IQ24 G7 IQ25 H7 IQ27 F7

IQ28 G7 IQ30 F1

13

14

15

VIPER: CONTROL

B5A

B5A

1M00 EMC HOLE

A

A

7V00-5 VIPER REV C

3H08 3H16 3H17

POWERDOWN-HDMI

+3V3

3H71

D

3H10

+3V3

3H69

4K7 9H08 9H07 9H13

IRQ-MPIF IRQ-FE-MAIN IRQ-AVIP 4K7

3H11 RES

CTRL4-VIPER

4K7 IH09

FQ50

+3V3 IRQ-MAIN

DEBUG-BREAK SOUND-ENABLE-VPR

10K

IRQ-MAIN

CTRL4-VIPER 3Q52

DEBUG-BREAK SOUND-ENABLE-VPR

100R 3H57

+3V3 10K

E 3H85 +3V3 4K7 3H40 6H01

BAS316

+3V3

RESET-FE-MAIN

+3V3

RESET-FE-MAIN 9H06

IRQ-HD2

+3V3

IRQ-HD2

FQ03

3H31 +3V3

IRQ-HIRATE

3H41 +3V3

FQ52 9H05 FQ53

IRQ-HD1 IRQ-HD1

4K7

0V

3H54

IRQ-HIRATE

4K7

F

10K

9H15 9H02

HDMI-COAST CHDEC-CLK

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15

F3 G4 E2 G5 F4

SC1_SCCK SC1_OFFN SC1_RST SC1_CMD SC1_DA

H4 F1 G3 F2 E1

SC2_SCCK SC2_OFFN SC2_RST SC2_CMD SC2_DA

RESET-TM

HPD-HIRATE

IQ30

AE28 AD27 AF30 AE29 AD28 AC27 AE30 AD29 AD30 AB27 AB28

PCI_PAR PCI_PERR PCI_STOP PCI_TRDY PCI_IRDY PCI_FRAME PCI_DEVSEL PCI_IDSEL PCI_CLK PCI_CBE3 PCI_CBE2 PCI_CBE1 PCI_CBE0 PCI_SERR INTA PCI_REQ PCI_REQ_A PCI_REQ_B

QVCP2L_DATA_OUT0 QVCP2L_DATA_OUT1 QVCP2L_DATA_OUT2 QVCP2L_DATA_OUT3 QVCP2L_DATA_OUT4 QVCP2L_DATA_OUT5 QVCP2L_DATA_OUT6 QVCP2L_DATA_OUT7 QVCP2L_DATA_OUT8 QVCP2L_DATA_OUT9 QVCP2L_CLK_OUT

SOUND-ENABLE 6H03

FQ10 A-PLOP 0V

4K7

BAS316 3H97

3H56 3H55

4K7

+3V3

G

10K 10K

B5 E5 D4 B1 E7 A5 A26 B25 D5 E26 D27 B29 B28 C27 E25 D26

DBG_TDO DBG_TDI DBG_TCK DBG_TMS

PCI_GNT PCI_GNT_A PCI_GNT_B XIO_D8 XIO_D9 XIO_D10 XIO_D11 XIO_D12 XIO_D13 XIO_D14 XIO_D15 XIO_ACK XIO_A25 XIO_SEL0 XIO_SEL1 XIO_SEL2 XIO_SEL3 XIO_SEL4

3H72

PCI-REQ PCI-REQ-A PCI-REQ-B

AD5 AE3 AE5

UA2_TX UA2_RX UA2_RTSN UA2_CTSN

F26 E27 C29 B30

PCI-INTA

3H70

4K7

PCI-REQ PCI-REQ-A PCI-REQ-B

3H84 3H86 3H88

4K7 4K7 4K7

1K8 4K7 56K

IQ16

USB-OVERCUR

IH16

3H24

100R

IQ22

3H25

100R

3Q19 +5V

NAND-RBY IQ28

3Q29

0R4 +T POLYSWITCH

NAND-SEL 5H03 IQ17 IQ23 +5V

GLINK-TXD GLINK-RXD TXD-VIPER RXD-VIPER

USB-OVERCUR

IQ24 IQ25

220R

1n0 2H06

6H07-2 IQ04

IQ03

USB1-DM

3Q20

6H07-1

5H02 DLW21S

3Q21

BAV99S 4

1

BAV99S 1M60

3 FQ00 FQ01 FQ02 FQ04

2

22R

USB CONNECTOR

15K

3Q16

3Q23 15K

3Q18 15K

3Q17 15K

330R

6H00

SML-310

RESET-MIPS

3H95

I

1 2 3 4 B4B-PH-K

USB-BUS-PW USB-OVERCUR FH12

G

2H07

1n0

USB1-DM USB1-DP

3H94

AD3

1K8

F IQ15

USB-BUS-PW

RES 4K7

SYS_RSTN_OUT

3H04

IQ27

22R

H

3H23

+3V3

USB1-DP

AJ28 AH27 AF26 AK29 AJ29 AG27

3H05

E

+3V3

USB-BUS-PW

USB1_DM USB1_DP USB2_DM USB2_DP USB_BUS_PWR USB_OVRCUR

4K7

NAND-REn NAND-WEn

AE1 AE2 AE4

UA1_TX UA1_RX

D

NAND-D(8) PCI-CLK-VPR

PCI-INTA

E24 B26

0H10

1MM3 EMC HOLE

100R

AD1

AA3 AA4 AB1 AB2 AB3 AB4 AC1 AC4 W3 W4 AA2 AA1 Y4 Y2 W2

C

SDA-MM 0H09

AH7 AF7 AK6 AH6 AG6 AF6 AJ6 AJ2 AD2 AH1 AK5 AJ7 AG7 AH10

3H22 SCL-MM

NAND-D(8) NAND-D(9) NAND-D(10) NAND-D(11) NAND-D(12) NAND-D(13) NAND-D(14) NAND-D(15) NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7)

2Q69

4K7 4K7 4K7

D25 B27 A28 A29

EJTAG-TDO EJTAG-TDI EJTAG-TCK EJTAG-TMS

0H05

+3V3

+3V3

470u 16V

JTAG-TD-CON-VIPER JTAG-TMS JTAG-TCK

JTAG_TDO JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TRST

9H03 9H16

JTAG-TD-VIPER-PNX2015 JTAG-TD-CON-VIPER JTAG-TCK JTAG-TMS JTAG-TRST

+3V3

100K

FQ21 FQ22 FQ23

D2 C1 E4 D3 C2

3H99 3H98

B

SDA-DMA

3Q22

JTAG-TRST

I2C4_SDA I2C4_SCL

100R 100R

+3V3

10K

FQ19

I2C3_SDA I2C3_SCL

A3 B4

+3V3

SCL-DMA 0H02

1H20

0H00

3H89

JTAG-TMS

100R 100R

NAND-CLE NAND-ALE

10K 3Q24

JTAG-TD-VIPER-PNX2015 JTAG-TD-CON-VIPER

9H04

I2C2_SDA I2C2_SCL

AE27 3Q15 AG29 3Q14

22R

PCI-CLK-VPR

4K7

RES

AF29 3Q13 AD26 3Q12

AK12 AJ12 AH12 AG12 AJ11 AG11 AK10 AJ10 AG10 AK9 AJ9 AH9 AG9 AK8 AG8 AK7 AJ5 AG5 AJ4 AH4 AK3 AJ3 AK2 AJ1 AH2 AG2 AG3 AG4 AF1 AF2 AF4 AF5

68R 22R

3H06

PLL-OUT

4K7

4K7

100R 100R

PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

PLL-OUT M135-CLK M27-PNX

3H81-3

SDA-I2C4 SCL-I2C4

I2C1_SDA I2C1_SCL

AH10 22R

4K7

SDA-I2C4

A25 C25

3H74 3H73

3H81-2

FQ41

3Q11 3Q10

3H79

D29 C30

4K7

SDA-UP-VIP SCL-UP-VIP

100R 100R

D28

4K7

4K7

SCL-I2C4

4K7

4K7

3H90

3Q27

+3V3 3Q04

RESET_IN

PLL_OUT M135_CLK M27_CLK

3H80-2

FQ40

CONTROL

3H80-3

1M0

3H82

SDA-MM SCL-MM

AH11

SDA-DMA SCL-DMA 3Q03

AD4

100R

+3V3

C

3Q48

RESET-SYSTEM

XTALI XTALO

3H80-4

B

100R

A2

4K7 4K7

27p

DSX840GA 27M

1H00 2H09

C4 3H75

3H81-1 3H80-1

2H08 27p

+3V3

G_16290_037.eps 010206

3104 313 6095.3 1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

H

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

6

7

EN 54

SSB: Viper: Main Memory 1

B5B

2

3

4

5

8

9

10

12

11

13

14

15

VIPER: MAIN MEMORY

B5B A

A

SD RAM1

E

46 45 44 24 23 22 21

1u0

1u0 2Q23

2Q21

100p

100p 2V45

100p 2V44

100p 2V43

100p 2V42

2V41

100p

100p 2V40

100p 2V39

100p 2V38

100p 2V37

1u0 2V36

1u0 2Q03

CK CK CKE CS RAS CAS WE

DQS

L U

16 51

22R

3V18

22R

3V22

22R

3V34

22R

3V38

22R

3V42 3V40

22R 22R

3V08

22R

3V12

22R

3V16

22R

3V20

22R

3V32

22R

3V36

MM_DATA_0 MM_DATA_1 MM_DATA_2 MM_DATA_3 MM_DATA_4 MM_DATA_5 MM_DATA_6 MM_DATA_7 MM_DATA_8 MM_DATA_9 MM_DATA_10 MM_DATA_11 MM_DATA_12 MM_DATA_13 MM_DATA_14 MM_DATA_15

22R

MM_DQS0 MM_DQS1

MM_DATA_16 MM_DATA_17 MM_DATA_18 MM_DATA_19 MM_DATA_20 MM_DATA_21 MM_DATA_22 MM_DATA_23 MM_DATA_24 MM_DATA_25 MM_DATA_26 MM_DATA_27 MM_DATA_28 MM_DATA_29 MM_DATA_30 MM_DATA_31

3V03

22R

3V07

22R

3V11

22R

3V15

22R

3V19

22R

3V23

22R

3V35

22R

3V39

22R

3V01

22R

3V05

22R

3V09

22R

3V13

22R

3V17

22R

3V21

22R

3V33

22R

3V37

MM_DQS2 MM_DQS3

3V43 3V41

2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65

22R

16 51

22R 22R

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

1

18

33

3

9

D

DM

L U

VREF CK CK CKE CS RAS CAS WE

L DQS U

VSSQ

VSS

15

55

61

61

55

15

9

3

33

18

1 VREF

22R

3V14

22R 22R

VSSQ

29 30 31 32 35 36 37 38 39 40 28 41 42

MM_A0 MM_A1 MM_A2 MM_A3 MM_A4 MM_A5 MM_A6 MM_A7 MM_A8 MM_A9 MM_A10 MM_A11 MM_A12

26 27

MM_BA0 MM_BA1

C

MM_DQM_2 MM_DQM_3

20 47 2V01

1n0

49

VREFD-VPRDDR MM_CLK_N

46 45 44 24 23 22 21

3V25 220R

MM_CLK_P MM_CKE MM_CS0 MM_RAS MM_CAS MM_WE

D

VSS

34

D18 A18 B18

3V24 220R

MM_CLK_P MM_CKE MM_CS0 MM_RAS MM_CAS MM_WE

3V10

3V00 3V04

48

MM_CKE MM_CLK_N MM_CLK_P

MM_CLK_N

22R

0 1 2 3 4 5 A 6 7 8 9 10 11 12 AP 0 BA 1

66

C13 A12 D12

49

22R

6

MM_RAS MM_CAS MM_WE

MM_DQS_0 MM_DQS_1 MM_DQS_2 MM_DQS_3

1n0

3V02 3V06

12

B20 A23 A6 B10

2V00

D

L DM U

2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65

52

MM_DQS0 MM_DQS1 MM_DQS2 MM_DQS3

MM_CS0 MM_CS1 MM_DQM_0 MM_DQM_1 MM_DQM_2 MM_DQM_3

VREFD-VPRDDR

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

DNU

B

VDD

Φ

DDR SDRAM 8Mx16

NC

58

D

A19 D24 D6 B11

20 47

DNU

VDDQ

64

IH20 MM_DQM_0 MM_DQM_1 MM_DQM_2 MM_DQM_3

MM_DQM_0 MM_DQM_1

NC

14 17 25 43 53 19 50

14 17 25 43 53 19 50

64

B12 D17

MM_BA0 MM_BA1

26 27

DDR SDRAM 8Mx16

58

MM_CS0

MM_AVREF

MM_BA0 MM_BA1

7V02 MT46V32M16P-5BTR

VDDQ

52

D13 A13

MM_DATA_7 MM_DATA_3 MM_DATA_5 MM_DATA_4 MM_DATA_1 MM_DATA_6 MM_DATA_2 MM_DATA_0 MM_DATA_13 MM_DATA_12 MM_DATA_10 MM_DATA_8 MM_DATA_11 MM_DATA_14 MM_DATA_15 MM_DATA_9 MM_DATA_21 MM_DATA_17 MM_DATA_23 MM_DATA_16 MM_DATA_20 MM_DATA_22 MM_DATA_19 MM_DATA_18 MM_DATA_24 MM_DATA_26 MM_DATA_27 MM_DATA_28 MM_DATA_30 MM_DATA_29 MM_DATA_31 MM_DATA_25

Φ

12

C12

1n0

D19 B19 C19 A21 D20 D21 B21 C21 A24 B22 A22 D22 C24 C22 B24 D23 C6 B6 D7 C7 B7 C9 D8 A7 A8 B9 D10 A9 D9 C10 A10 D11

VDD 0 1 2 3 4 5 A 6 7 8 9 10 11 12 AP 0 BA 1

6

VREF-VPRDDR

MM_DATA0 MM_DATA1 MM_DATA2 MM_DATA3 MM_DATA4 MM_DATA5 MM_DATA6 MM_DATA7 MM_DATA8 MM_DATA9 MM_DATA10 MM_DATA11 MM_DATA12 MM_DATA13 MM_DATA14 MM_DATA15 MM_DATA16 MM_DATA17 MM_DATA18 MM_DATA19 MM_DATA20 MM_DATA21 MM_DATA22 MM_DATA23 MM_DATA24 MM_DATA25 MM_DATA26 MM_DATA27 MM_DATA28 MM_DATA29 MM_DATA30 MM_DATA31

29 30 31 32 35 36 37 38 39 40 28 41 42

66

2V02 MM_BA0 MM_BA1

MM_ADDR0 MM_ADDR1 MM_ADDR2 MM_ADDR3 MM_ADDR4 MM_ADDR5 MM_ADDR6 MM_ADDR7 MM_ADDR8 MM_ADDR9 MM_ADDR10 MM_ADDR11 MM_ADDR12

MM_A0 MM_A1 MM_A2 MM_A3 MM_A4 MM_A5 MM_A6 MM_A7 MM_A8 MM_A9 MM_A10 MM_A11 MM_A12

34

C

B13 D15 B14 A15 C15 B15 A16 D16 B16 C16 D14 C18 B17

7V01 MT46V32M16P-5BTR

+2V5-VPR

+2V5-VPR

*

*

DDR INTERFACE MM_A0 MM_A1 MM_A2 MM_A3 MM_A4 MM_A5 MM_A6 MM_A7 MM_A8 MM_A9 MM_A10 MM_A11 MM_A12

+2V5-VPR

+2V5-VPR

48

B

SD RAM2 2Q01

7V00-2 VIPER REV C

MM_RAS MM_CAS MM_WE MM_CKE MM_CLK_N MM_CLK_P

E

1K0

100R

3V78

RES 3V44

F

560R

3H52

+2V5-VPR

IQ13

VREFD-VPRDDR

1u0

100p 2H12

100n 2H11

560R 2H10

3H53

1V3

+2V5-VPR

+2V5-VPR

47u 4V

100n 2V35

100n 2V31

100n 2V30

100n 2V29

100n 2V28

100n 2V27

100n 2V26

100n 2V25

100n 2V24

100n 2V23

100n 2V22

100n 2V21

100n 2V20

100n 2V19

100n 2V18

1u0

100p 2H03

100n 2H00

560R 2H02

3H51

VREF-VPRDDR

100n 2V17

IQ14

1V3

2V16

560R

G 3H50

G

H

H

I

G_16290_038.eps 010206

3104 313 6095.3 1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

2H00 H9 2H02 H8 2H03 H9 2H10 G8 2H11 G9 2H12 G9 2Q01 B9 2Q03 B9 2Q21 B14 2Q23 B14 2V00 D7 2V01 D14 2V02 C2 2V16 G11 2V17 G11 2V18 G11 2V19 G11 2V20 G12 2V21 G12 2V22 G12 2V23 G12 2V24 G12 2V25 G13 2V26 G13 2V27 G13 2V28 G13 2V29 G14 2V30 G14 2V31 G14 2V35 G14 2V36 B9 2V37 B10 2V38 B10 2V39 B10 2V40 B10 2V41 B11 2V42 B12 2V43 B12 2V44 B12 2V45 B12 3H50 G8 3H51 H8 3H52 F8 3H53 G8 3V00 C10 3V01 C12 3V02 C9 3V03 C11 3V04 C10 3V05 C12 3V06 C9 3V07 C11 3V08 C10 3V09 C12 3V10 C9 3V11 C11 3V12 C10 3V13 C12 3V14 C9 3V15 C11 3V16 C10 3V17 C12 3V18 C9 3V19 C11 3V20 C10 3V21 C12 3V22 D9 3V23 D11 3V24 D7 3V25 D14 3V32 D10 3V33 D12 3V34 D9 3V35 D11 3V36 D10 3V37 D12 3V38 D9 3V39 D11 3V40 D9 3V41 D11 3V42 D9 3V43 D11 3V44 E3 3V78 E3 7V00-2 B4 7V01 B7 7V02 B12 IH20 D3 IQ13 F9 IQ14 G9

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 55

SSB: Viper: A/V + Tunnelbus 1

B5C

2

3

4

5

6

7

8

9

10

11

12

VIPER: A/V + TUNNELBUS

B5C

7V00-1 VIPER REV C DV1F-DATA0 DV1F-DATA1 DV1F-DATA2 DV1F-DATA3 DV1F-DATA4 DV1F-DATA5 DV1F-DATA6 DV1F-DATA7 DV1F-DATA8_ERR DV1F-DATA9_SOP DV1F-VALID DV1F-CLK

A +3V3

3H28 DV1F-VALID 4K7

B 3H32

DV2A-VALID

DV2A-VALID

DV2A-CLK

4K7

DV3F-DATA2_0 DV3F-DATA3_1 DV3F-DATA4_2 DV3F-DATA5_3 DV3F-DATA6_4 DV3F-DATA7_5 DV3F-DATA8_6 DV3F-DATA9_7 DV3F-VALID DV3F-CLK DV3F-DATA1_ERR DV3F-DATA0_SOP

C 3H18 DV3F-VALID 4K7

IH10 IH11 IH15

AUDIO/VIDEO

DV1_DATA0 DV1_DATA1 DV1_DATA2 DV1_DATA3 DV1_DATA4 DV1_DATA5 DV1_DATA6 DV1_DATA7 DV1_DATA8 DV1_DATA9 DV1_VALID DV1_CLK

AJ16 AK16 AJ17 AG17 AK18 AJ18 AH18 AG19 AK19 AH19 AJ19 AG18

DV2_DATA0 DV2_DATA1 DV2_DATA2 DV2_DATA3 DV2_DATA4 DV2_DATA5 DV2_DATA6 DV2_DATA7 DV2_VALID DV2_CLK DV2_ERR DV2_SOP

AK24 AJ24 AK25 AG23 AH24 AJ25 AK26 AG24 AJ26 AG25 AF24 AH25

DV3_DATA0 DV3_DATA1 DV3_DATA2 DV3_DATA3 DV3_DATA4 DV3_DATA5 DV3_DATA6 DV3_DATA7 DV3_VALID DV3_CLK DV3_ERR DV3_SOP DV_FREF DV_VREF DV_HREF

IH03

AA30 AA29 AA28 AB30

I2S_IN1_SD I2S_IN1_WS I2S_IN1_SCK I2S_IN1_OSCLK

IH00

W28 W27 Y29 Y27

I2S_IN2_SD I2S_IN2_WS I2S_IN2_SCK I2S_IN2_OSCLK

I2S-MAIN-ND

AA27 AC30

SPDIF-HDMI

QVCP5L_DATA_OUT0 QVCP5L_DATA_OUT1 QVCP5L_DATA_OUT2 QVCP5L_DATA_OUT3 QVCP5L_DATA_OUT4 QVCP5L_DATA_OUT5 QVCP5L_DATA_OUT6 QVCP5L_DATA_OUT7 QVCP5L_DATA_OUT8 QVCP5L_DATA_OUT9 QVCP5L_DATA_OUT10 QVCP5L_DATA_OUT11 QVCP5L_DATA_OUT12 QVCP5L_DATA_OUT13 QVCP5L_DATA_OUT14 QVCP5L_DATA_OUT15 QVCP5L_DATA_OUT16 QVCP5L_DATA_OUT17 QVCP5L_DATA_OUT18 QVCP5L_DATA_OUT19 QVCP5L_DATA_OUT20 QVCP5L_DATA_OUT21 QVCP5L_DATA_OUT22 QVCP5L_DATA_OUT23 QVCP5L_DATA_OUT24 QVCP5L_DATA_OUT25 QVCP5L_DATA_OUT26 QVCP5L_DATA_OUT27 QVCP5L_DATA_OUT28 QVCP5L_DATA_OUT29 QVCP5L_CLK_OUT QVCP5L_VSYNC QVCP5L_HSYNC QVCP5L_AUX1 QVCP5L_AUX2 DAC_IRSET DAC_RDUMPY DAC_RDUMPC DAC_CVBS DAC_CHROMA

AG26 AK28 AJ27

IH01

D

AG13 AH13 AJ13 AK13 AG14 AJ14 AG15 AH15 AJ15 AK15 AG16 AH16

13

TS_DATA0 TS_DATA1 TS_DATA2 TS_DATA3 TS_DATA4 TS_DATA5 TS_DATA6 TS_DATA7 TS_VALID TS_SOP TS_CLK

SPDIF_IN2 SPDIF_IN1

E

68R

3Q28-2

68R

3Q34-3

68R

3Q26-4

68R

68R

3Q28-4 68R

3Q28-3

68R

3Q34-4

68R

3Q34-1

68R

3Q25-2

DV-BOUT-0 DV-BOUT-1 DV-BOUT-2 DV-BOUT-3 DV-BOUT-4 DV-BOUT-5 DV-BOUT-6 DV-BOUT-7 DV-BOUT-8 DV-BOUT-9 DV-GOUT-0 DV-GOUT-1 DV-GOUT-2 DV-GOUT-3 DV-GOUT-4 DV-GOUT-5 DV-GOUT-6 DV-GOUT-7 DV-GOUT-8 DV-GOUT-9 DV-ROUT-0 DV-ROUT-1 DV-ROUT-2 DV-ROUT-3 DV-ROUT-4 DV-ROUT-5 DV-ROUT-6 DV-ROUT-7 DV-ROUT-8 DV-ROUT-9 DV-CLKIN DV-OUT-VS DV-OUT-HS DV-OUT-FFIELD DV-OUT-DE

3Q28-1

68R

3Q34-2

68R

3Q26-3

68R

3Q44-4

68R

3Q44-1

3Q25-1

68R

68R

3Q44-3

68R

3Q08-4

68R

3Q08-1

68R

3Q07-2

68R

3Q05-3

68R

3Q25-4

3Q44-2

68R

3Q08-3 68R

68R

3Q07-4

68R

3Q07-1

68R

3Q08-2

68R

3Q07-3

68R

3Q05-4

68R

3Q05-1

68R

3H02

68R

3Q02-1

3Q05-2

68R

3Q25-3

68R

68R

3Q02-3

68R

3Q02-2

3Q02-4

IH08

AH30 AF27 AH29 AG28 AJ30

IH07

3H21 IH06

AJ22 AG21 AK22 AH21 AJ21 AK21 AG20 AJ20 AK23 AH22 AG22

3H19

1K0

3H20

39R

A

B

C

39R

D

3Q09

CHDEC-CLK 33R

I2S_OUT1_SD0 I2S_OUT1_SD1 I2S_OUT1_SD2 I2S_OUT1_SD3 I2S_OUT1_WS I2S_OUT1_SCK I2S_OUT1_OSCLK

U27 V30 V29 V28 V27 W30 W29

I2S_OUT2_SD0 I2S_OUT2_SD1 I2S_OUT2_SD2 I2S_OUT2_SD3 I2S_OUT2_WS I2S_OUT2_SCK I2S_OUT2_OSCLK

T28 T27 R30 R29 T29 T30 U29

SPDIF_OUT

68R

J28 J27 H30 H27 G30 G29 G28 G27 F30 F29 M28 M27 L29 L27 K30 K29 K28 K27 J30 J29 R28 R27 P29 P27 N30 N29 N28 N27 M30 M29 E30 F28 F27 G26 E29

3H07

I2S-SUB-D BACKLIGHT-CONTROL CTRL1-VIPER

22R

E IH04 I2S-MCH-LR I2S-MCH-CSW I2S-MCH-SLR I2S-MAIN-D I2S-WS-MAIN I2S-BCLK-MAIN IH05

AB29

SPDIF-OUT1

F

F

G

G 7V00-4 VIPER REV C

TUNNELBUS

H

3Q36-4

3Q36-1

33R 3Q35-4

3Q35-2

33R 3Q35-1

3Q37-3

33R 3Q37-2

3Q37-1

33R 3Q38-3

3Q38-1

TUN-VIPER-TX-CLKP TUN-VIPER-TX-CLKN TUN-VIPER-TX-BUSY

33R 3Q36-3

33R

33R 3Q35-3

33R

33R 3Q37-4

33R

33R 3Q38-4

33R

33R 3Q38-2

33R

33R 3Q40

33R

33R 3Q39

I

33R 3Q36-2

N2 N1 P4 P2 R1 R2 R3 R4 T3 T4 U2 U4 V1 V2 V3 V4 T1 T2 W1 K2

2H01

VREF-PNX

TUN_TX_DATA0 TUN_TX_DATA1 TUN_TX_DATA2 TUN_TX_DATA3 TUN_TX_DATA4 TUN_TX_DATA5 TUN_TX_DATA6 TUN_TX_DATA7 TUN_TX_DATA8 TUN_TX_DATA9 TUN_TX_DATA10 TUN_TX_DATA11 TUN_TX_DATA12 TUN_TX_DATA13 TUN_TX_DATA14 TUN_TX_DATA15

TUN_RX_DATA0 TUN_RX_DATA1 TUN_RX_DATA2 TUN_RX_DATA3 TUN_RX_DATA4 TUN_RX_DATA5 TUN_RX_DATA6 TUN_RX_DATA7 TUN_RX_DATA8 TUN_RX_DATA9 TUN_RX_DATA10 TUN_RX_DATA11 TUN_RX_DATA12 TUN_RX_DATA13 TUN_RX_DATA14 TUN_RX_DATA15

TUN_TX_CLOCKP TUN_TX_CLOCKN TUN_TX_BUSY

TUN_RX_CLOCKP TUN_RX_BUSY

G2 G1 J4 J3 H1 K4 J2 J1 K1 L4 L2 M4 M3 M2 M1 N4

TUN-VIPER-RX-DATA0 TUN-VIPER-RX-DATA1 TUN-VIPER-RX-DATA2 TUN-VIPER-RX-DATA3 TUN-VIPER-RX-DATA4 TUN-VIPER-RX-DATA5 TUN-VIPER-RX-DATA6 TUN-VIPER-RX-DATA7 TUN-VIPER-RX-DATA8 TUN-VIPER-RX-DATA9 TUN-VIPER-RX-DATA10 TUN-VIPER-RX-DATA11 TUN-VIPER-RX-DATA12 TUN-VIPER-RX-DATA13 TUN-VIPER-RX-DATA14 TUN-VIPER-RX-DATA15

K3 N3

H

TUN-VIPER-RX-CLKP 3Q41

TUN-VIPER-RX-BUSY

I

33R TUN_AVREF

1n0

TUN-VIPER-TX-DATA0 TUN-VIPER-TX-DATA1 TUN-VIPER-TX-DATA2 TUN-VIPER-TX-DATA3 TUN-VIPER-TX-DATA4 TUN-VIPER-TX-DATA5 TUN-VIPER-TX-DATA6 TUN-VIPER-TX-DATA7 TUN-VIPER-TX-DATA8 TUN-VIPER-TX-DATA9 TUN-VIPER-TX-DATA10 TUN-VIPER-TX-DATA11 TUN-VIPER-TX-DATA12 TUN-VIPER-TX-DATA13 TUN-VIPER-TX-DATA14 TUN-VIPER-TX-DATA15

G_16290_039.eps 010206

3104 313 6095.3 1

2

3

4

5

6

7

8

9

10

11

12

13

2H01 I6 3H02 C9 3H07 E8 3H18 C3 3H19 C9 3H20 D9 3H21 C9 3H28 A3 3H32 B3 3Q02-1 C9 3Q02-2 C9 3Q02-3 C9 3Q02-4 C8 3Q05-1 C9 3Q05-2 C8 3Q05-3 C9 3Q05-4 B9 3Q07-1 B8 3Q07-2 B9 3Q07-3 B9 3Q07-4 B8 3Q08-1 B9 3Q08-2 B9 3Q08-3 B8 3Q08-4 B9 3Q09 E8 3Q25-1 B8 3Q25-2 A9 3Q25-3 C8 3Q25-4 C9 3Q26-3 A9 3Q26-4 A8 3Q28-1 A9 3Q28-2 A8 3Q28-3 A9 3Q28-4 A9 3Q34-1 A9 3Q34-2 A9 3Q34-3 A8 3Q34-4 A9 3Q35-1 H6 3Q35-2 H5 3Q35-3 H6 3Q35-4 H6 3Q36-1 H5 3Q36-2 H6 3Q36-3 H6 3Q36-4 H5 3Q37-1 H5 3Q37-2 H6 3Q37-3 H5 3Q37-4 H6 3Q38-1 I5 3Q38-2 I6 3Q38-3 H6 3Q38-4 H6 3Q39 I6 3Q40 I6 3Q41 I9 3Q44-1 B9 3Q44-2 B8 3Q44-3 B9 3Q44-4 B9 7V00-1 A6 7V00-4 G7 IH00 D4 IH01 D4 IH03 D4 IH04 E8 IH05 F8 IH06 D9 IH07 C9 IH08 C9 IH10 D4 IH11 D4 IH15 D4

1 2 3 4 5 6 7 8 9 10 11

100p

5Q07 220R

12 13

2Q35 100n 2Q37

2Q85 10n 2Q86

3104 313 6095.3

14

10n

15

10n

2Q59

10n

10n

2Q19

10n

10n 2Q18

2Q17

VIPER: SUPPLY

10n

10n 2Q58

2Q57

14

1n0

100n

2Q16

100n

2Q15

100n

100n 2Q14

2Q13

100n

100n 2Q12

5Q04 B10 5Q07 F11 5Q08 F11

2Q90

1n0

2Q89

2Q56

100n

2Q55

100n

100n 2Q54

2Q53

100n

100n 2Q52

5Q01 B8 5Q02 B8 5Q03 B9

1n0

100n 2Q39

1n0 2Q88

100n

100n 10n

2Q11

100n

100n 2Q10

13

2Q38

2Q34 2Q84

2Q51

100n

100n 2Q50

100n 2Q09

2Q89 F15 2Q90 F15 2Q91 F13

10n

100n

100n 2Q49

100n 2Q08

2Q86 F14 2Q87 F14 2Q88 F14

2Q87

2Q33

100n

2Q32

100n

100n

12

10n

+2V5-VPR

2Q48

2Q83 E11 2Q84 F13 2Q85 F14

2Q91

IQ11

2Q30

2Q07

100n

100n 2Q06

2Q80 D11 2Q81 D10 2Q82 E10

100n

2Q28

2Q47

100n

100n 2Q46

2Q05

100n

2Q04

4u7

2Q80

11

100n

2Q27

2Q45

100n

2Q44

4u7 6.3V

4u7 6.3V

2Q77 C9 2Q78 C9 2Q79 D10

100n

2Q26

100n

2Q24

4u7

2Q43

4u7 6.3V

2Q79 4u7 2Q02

10

2Q83

2Q81 4u7 2Q42

600R

100n

2Q66 C10 2Q67 C9 2Q76 C8

1n0 2Q62

+2V5 4u7 6.3V

SUPPLY

4u7 2Q22

2Q00

5Q04 2Q66

+1V2

2Q63 C8 2Q64 C8 2Q65 C9

2Q61

F 1n0

9

4u7 6.3V

IQ09

2Q60 F10 2Q61 F11 2Q62 F11

2Q82

2Q40

+2V5-VPR 1n0 2Q67

2Q57 D15 2Q58 D15 2Q59 D15

47u 4V

600R

+1V2

2Q78

5Q03 100n

IQ10 1n0 2Q65

600R

8

2Q20

100n

2Q54 D14 2Q55 D14 2Q56 D14

4u7 6.3V

VSS_DAC

D 2Q77

+3V3

VSSA_1_7_MCAB

7

B2 AF25

2Q51 D13 2Q52 D13 2Q53 D14

F5 E6 B3 AE26

6

2Q48 D12 2Q49 D13 2Q50 D13

VDDA_3V3 VDDA_1V2 VDDA_1_7_MCAB VDD_DAC

+3V3

2Q45 D12 2Q46 D12 2Q47 D12

600R

2Q42 D11 2Q43 D11 2Q44 D11

5Q02

5 2Q38 E14 2Q39 E14 2Q40 D10

2Q64

5Q01

2Q34 E13 2Q35 E14 2Q37 E14

100n

4 2Q30 E12 2Q32 E13 2Q33 E13

7.

1n0 2Q63

2Q76

3

2Q26 E12 2Q27 E12 2Q28 E12

E9 E11 E13 E15 E17 E19 E21 J5 L5 N5 R5 U5 W5 H3 L1 P3 U1 A11 A17 B23 C8 C14 C20

+1V2

2Q20 E10 2Q22 E11 2Q24 E11

VDD_2V5_1 VDD_2V5_2 VDD_2V5_3 VDD_2V5_4 VDD_2V5_5 VDD_2V5_6 VDD_2V5_7 VDD_2V5_8 VDD_2V5_9 VDD_2V5_10 VDD_2V5_11 VDD_2V5_12 VDD_2V5_13 VDD_2V5_14 VDD_2V5_15 VDD_2V5_16 VDD_2V5_17 VDD_2V5_18 VDD_2V5_19 VDD_2V5_20 VDD_2V5_21 VDD_2V5_22 VDD_2V5_23

7V00-3 VIPER REV C

2Q17 D15 2Q18 D15 2Q19 D15

VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD1_33 VDD1_34 VDD1_35 VDD1_36 VDD1_37 VDD1_38 VDD1_39 VDD1_40 VDD2_41 VDD2_42 VDD2_43 VDD2_44 VDD2_45

2

2Q14 D14 2Q15 D14 2Q16 D14

VSS_68 VSS_67 VSS_66 VSS_65 VSS_64 VSS_63 VSS_62 VSS_61 VSS_60 VSS_59 VSS_58 VSS_57 VSS_56 VSS_55 VSS_54 VSS_53 VSS_52 VSS_51 VSS_50 VSS_49 VSS_48 VSS_47 VSS_46 VSS_45 VSS_44 VSS_43 VSS_42 VSS_41 VSS_40 VSS_39 VSS_38 VSS_37 VSS_36 VSS_35 VSS_34 VSS_33 VSS_32 VSS_31 VSS_30 VSS_29 VSS_28 VSS_27 VSS_26 VSS_25 VSS_24 VSS_23 VSS_22 VSS_21 VSS_20 VSS_19 VSS_18 VSS_17 VSS_16 VSS_15 VSS_14 VSS_13 VSS_12 VSS_11 VSS_10 VSS_9 VSS_8 VSS_7 VSS_6 VSS_5 VSS_4 VSS_3 VSS_2 VSS_1

1

2Q11 D13 2Q12 D13 2Q13 D14

J26 L26 N26 R26 U26 W26 AA5 AA26 AC5 AC26 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF23 D1 Y3 AC2 AF3 AH5 AH11 AH17 AH23 AJ8 AK1 AK14 AK20 AK27 H29 L28 P30 U28 Y30 AC28 AG30 AH28 E28 A4 A30 C3 C26 E23

C M12 M13 M14 M15 M16 M17 M18 M19 N12 N19 P12 P19 R12 R19 T12 T19 U12 U19 V12 V19 W12 W13 W14 W15 W16 W17 W18 W19

B5D

2Q08 D12 2Q09 D13 2Q10 D13

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 VDDC_28

2Q05 D12 2Q06 D12 2Q07 D12

M26 AK30 AK17 AK11 AK4 AJ23 AH26 AH20 AH14 AH8 AH3 AG1 AF28 AF22 AF20 AF18 AF16 AF14 AF12 AF10 AF8 AC29 AC3 AB26 AB5 Y28 Y26 Y5 Y1 V26 V5 U30 U3 T26 T5 P28 P26 P5 P1 M5 L30 L3 K26 K5 H28 H26 H5 H2 E22 E20 E18 E16 E14 E12 E10 E8 E3 D30 C28 C23 C17 C11 C5 B8 A27 A20 A14 A1

VSSC_36 VSSC_35 VSSC_34 VSSC_33 VSSC_32 VSSC_31 VSSC_30 VSSC_29 VSSC_28 VSSC_27 VSSC_26 VSSC_25 VSSC_24 VSSC_23 VSSC_22 VSSC_21 VSSC_20 VSSC_19 VSSC_18 VSSC_17 VSSC_16 VSSC_15 VSSC_14 VSSC_13 VSSC_12 VSSC_11 VSSC_10 VSSC_9 VSSC_8 VSSC_7 VSSC_6 VSSC_5 VSSC_4 VSSC_3 VSSC_2 VSSC_1

2Q00 D10 2Q02 D11 2Q04 D11

EP1.1U AA

100n

2Q60

E V18 V17 V16 V15 V14 V13 U18 U17 U16 U15 U14 U13 T18 T17 T16 T15 T14 T13 R18 R17 R16 R15 R14 R13 P18 P17 P16 P15 P14 P13 N18 N17 N16 N15 N14 N13

Circuit Diagrams and PWB Layouts EN 56

SSB: Viper: Supply 7V00-3 C1 IQ07 C9 IQ08 C10 IQ09 C8 IQ10 B8 IQ11 F11

15

A

B5D A

B +3V3

B

IQ07 IQ08

+3V3

C

+2V5-VPR

D

+1V2

E

5Q08 220R RES

G G_16290_040.eps 010206

F

G

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 57

SSB: Viper: EEPROM

1

B5E

2

3

4

5

6

7

8

9

VIPER: EEPROM

B5E +3V3-STANDBY IP10 9P42 RES

A 3P37

FP36

100K

A

PDTA114EU 7P18

RESET-MAIN-NVM

2P34

+3V3-STANDBY

+3V3-STANDBY

1 2 3

SCL ADR

7 6

3P80

SCL-UP-VIP

FP35

5

SDA

SDA-UP-VIP +3V3

9P17

3P81

2P80

2P81

100n

100n

14

1

2

RXD-UP

X1 7

100R

D

7P15-2 74HC4066PW 4 1 3P85

5

UART-SWITCHn

1

3

RXD-VIPER

X1 7

100R

23 24 34 35 36 38 39

3P86 7P15-3 74HC4066PW 8 1

100R +5V2-STBY

E

9

TXD-UP

7

X1

I/O

NC

GND

UART-SWITCH

12

3P82

1

10

8 9 16 17 18 19 7

IP16

NAND-REn NAND-SEL NAND-CLE NAND-ALE NAND-WEn STBY-WP-NAND-FLASH

D

NAND-RBY

1 2 3 4 5 10 11 14 15 20 21 22

E

VSS

TXD-VIPER

X1 7

FP33

14

7P15-4 74HC4066PW 11 1

RY BY

NC

IP11

FP32

UART-SWITCHn

1

10K

3P88

6

14

TXD

RE CE CLE ALE WE WP

48 25 13

13

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

VCCQ

EEPROM (32Mx16)

6

100R

26 28 30 32 40 42 44 46 27 29 31 33 41 43 45 47

Φ

C

7P80 TC58DVM92F1TGI0

10K

3P84

14

FP23

NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7) NAND-D(8) NAND-D(9) NAND-D(10) NAND-D(11) NAND-D(12) NAND-D(13) NAND-D(14) NAND-D(15)

100n

37

12

VCC 2P35

RXD

NAND-RBY

2K2

+5V2-STBY

3P83

NAND-SEL

10K

C

7P15-1 74HC4066PW 1 1

B

+3V3

FP22 FP34

4

0 1 2

WC

RES

Φ (8Kx8) EEPROM

MAIN NVM

9P16

B

100n 8

7P14 M24C64

7P16 PDTC114EU

F

F

10K 3P57 7P17 PDTC114EU

G_16290_041.eps 010206

3104 313 6095.3

1

2

3

4

5

6

7

8

9

2P35 C3 2P80 C7 2P81 C8 3P37 A4 3P57 F3 3P80 B8 3P81 C8 3P82 F7 3P83 D2 3P84 D2 3P85 D2 3P86 E2 3P88 E2 7P14 B3 7P15-1 D2 7P15-2 D3 7P15-3 E2 7P15-4 E2 7P16 F1 7P17 F2 7P18 A3 7P80 C8 9P16 B4 9P17 C4 9P42 A3 FP22 B4 FP23 D1 FP32 E2 FP33 F1 FP34 B4 FP35 B4 FP36 A3 IP10 A3 IP11 E7 IP16 D8

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 58

SSB: Miscellaneous

1

B5F

2

3

4

5

6

7

8

MISCELLANEOUS

B5F

A

A +5V2-STBY +5V2-STBY

7M06 LD3985M122

3

4

INH

9M09

2 10K

RESET-STBY

1 2

100n

IM09

0V

7M11 2M86

PDTC144EU

D FM55

100R

1 2 3 4 5 6

3M52 FM57 100R

FM58

220R

100p

RC

5M00

+5V2-STBY 100n

3M51

2M80

FM56 100p

100R

2M83

10K

3M02

+5V2-STBY

1M21

3M50

2M84

2M85

LIGHT-SENSOR

100p

6M10

3M71 FM53 3

680R

100p

3M72

2M87

C

FM52 BZX384-C3V9

FM51

FM54

B6B-PH-K

LED2 FM59 STANDBY

100R 7M01

+3V3-STANDBY IM05 0V8

10K

0V2 BC847BW IM08

1M01 FM60 ON-MODE

1 2 3

3M54

KEYBOARD

2M81

3M00

E

3M53

LED1

100p

IM06

0V2

100p

E

2M82

D

B

+3V3-STANDBY

+5V2-STBY

C

+1V2-STANDBY

4

BP

COM

2

COM

FM50

5

OUT

1u0

IN

10n

B

BP

1

+3V3-STANDBY

2M94

INH

5

1u0

3

OUT

10n 2M92

IN

2M91

1

2M93

7M05 LD3985M33

10R

B3B-PH-K

F

F G_16290_042.eps 010206

3104 313 6095.3

1

2

3

4

5

6

7

8

1M01 E7 1M21 D7 2M80 E7 2M81 F6 2M82 E5 2M83 E5 2M84 E5 2M85 D4 2M86 D3 2M87 D1 2M91 B2 2M92 B2 2M93 B5 2M94 B5 3M00 E2 3M02 E2 3M50 D4 3M51 D5 3M52 E5 3M53 E5 3M54 E7 3M71 C2 3M72 D1 5M00 E6 6M10 C1 7M01 E2 7M05 A1 7M06 A4 7M11 D2 9M09 D2 FM50 B5 FM51 C1 FM52 C2 FM53 C2 FM54 D1 FM55 D4 FM56 D5 FM57 E6 FM58 E4 FM59 E4 FM60 E4 IM05 E2 IM06 E2 IM08 F2 IM09 D2

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 59

SSB: Video DAC 1

2

3

4

5

6

7

8

9

10

11

VIDEO-DAC

B6

12

B6

A

A 7G42 LD3985M33 +5V

+3V3DAC

1

120R

3

+3V3DAC

5

OUT

INH

100u 4V

IG21

4

BP

COM

B

1u0

2

100u

2R2

RES 2G69

2G65

3G78

B

IN

2G67

9G49

FG01

10n

5G10

2G68

IG19

+3V3

+3V3DAC

2G60 100n 2G61

7G40

F

IG14

IOB 28 IOB

DV-CLKIN DV-OUT-HS DV-OUT-VS DV-OUT-DE DV-OUT-FFIELD

cG10 cG11 cG12 cG13 cG14

MP-CLKOUT MP-OUT-HS MP-OUT-VS MP-OUT-DE MP-OUT-FFIELD

DV-ROUT-0 DV-ROUT-1

cG15 cG16

MP-ROUT-0 MP-ROUT-1

DV-ROUT-2 DV-ROUT-3 DV-ROUT-4 DV-ROUT-5

cG17 cG18 cG19 cG20

MP-ROUT-2 MP-ROUT-3 MP-ROUT-4 MP-ROUT-5

DV-ROUT-6 DV-ROUT-7 DV-ROUT-8 DV-ROUT-9

cG21 cG22 cG23 cG24

MP-ROUT-6 MP-ROUT-7 MP-ROUT-8 MP-ROUT-9

DV-GOUT-0 DV-GOUT-1

cG25 cG26

MP-GOUT-0 MP-GOUT-1

DV-GOUT-2 DV-GOUT-3 DV-GOUT-4 DV-GOUT-5

cG27 cG28 cG29 cG30

MP-GOUT-2 MP-GOUT-3 MP-GOUT-4 MP-GOUT-5

DV-GOUT-6 DV-GOUT-7 DV-GOUT-8 DV-GOUT-9

cG31 cG32 cG33 cG34

MP-GOUT-6 MP-GOUT-7 MP-GOUT-8 MP-GOUT-9

DV-BOUT-0 DV-BOUT-1

cG35 cG36

MP-BOUT-0 MP-BOUT-1

DV-BOUT-2 DV-BOUT-3 DV-BOUT-4 DV-BOUT-5

cG37 cG38 cG39 cG40

MP-BOUT-2 MP-BOUT-3 MP-BOUT-4 MP-BOUT-5

DV-BOUT-6 DV-BOUT-7 DV-BOUT-8 DV-BOUT-9

cG41 cG42 cG43 cG44

MP-BOUT-6 MP-BOUT-7 MP-BOUT-8 MP-BOUT-9

AV-GOUT

IOG_ 31 75R

IOG

RES 3G74

R

75R

IOR_ 33 IOG 32

IOB_ 27

AV-BOUT 38 PSAVE_

PSAVE

IG17

35 COMP

COMP VREF CLOCK SYNC BLANK

IG10

37 RSET

RSET

36 VREF 24 CLOCK 12 SYNC_ 11

75R

G

IG08

IG18

3G70

IG20

0V

+3V3DAC

10K 7G41 BC847BW

BLANK_

B

IG09

3G76

ON-MODE

100K

GND 25 26 +3V3DAC DV-CLKIN IG01

9G48

DV-OUT-VS

9G36

RES

+3V3DAC

G

FG99

3999

D

IG12

100K

0 1 2 3 4 5 6 7 8 9

VIDEO DAC

RES 3G75

B0 B1 B2 B3 B4 B5 B6 B7 B8 B9

IOR 34 IOR

3G77

IG07

14 15 16 17 18 19 20 21 22 23

0 1 2 3 4 5 6 7 8 9

30

470R

IG06

G0 G1 G2 G3 G4 G5 G6 G7 G8 G9

Φ

3G79

RES 9G42 9G43 RES

DV-BOUT-0 DV-BOUT-1 DV-BOUT-2 DV-BOUT-3 DV-BOUT-4 DV-BOUT-5 DV-BOUT-6 DV-BOUT-7 DV-BOUT-8 DV-BOUT-9

1 2 3 4 5 6 7 8 9 10

13 29 VAA 0 1 2 3 4 5 6 7 8 9

47R

IG05

R0 R1 R2 R3 R4 R5 R6 R7 R8 R9

100n

IG04

39 40 41 42 43 44 45 46 47 48

3G72

E

IG03

100n 2G64

RES 9G40 9G41 RES

DV-GOUT-0 DV-GOUT-1 DV-GOUT-2 DV-GOUT-3 DV-GOUT-4 DV-GOUT-5 DV-GOUT-6 DV-GOUT-7 DV-GOUT-8 DV-GOUT-9

AV-ROUT

100n

ADV7123KSTZ140

2G63

D

RES 9G38 9G39 RES

IG16

RES 3G73

IG02 DV-ROUT-0 DV-ROUT-1 DV-ROUT-2 DV-ROUT-3 DV-ROUT-4 DV-ROUT-5 DV-ROUT-6 DV-ROUT-7 DV-ROUT-8 DV-ROUT-9

C

100n 2G62

9G35

9G34

9G33

9G32

9G31

9G30

C

9G47 9G37

IG00

E

F

DV-OUT-DE

G

RES

FG98

100R

H

H

I

I G_16290_043.eps 010206

3104 313 6095.3 1

2

3

4

5

6

7

8

9

10

11

12

2G60 C5 2G61 C5 2G62 C5 2G63 E6 2G64 E6 2G65 B3 2G67 B7 2G68 B6 2G69 B3 3999 H3 3G70 E7 3G72 F6 3G73 D7 3G74 D7 3G75 E7 3G76 E7 3G77 F7 3G78 B2 3G79 E6 5G10 B3 7G40 C4 7G41 F6 7G42 A6 9G30 C3 9G31 C3 9G32 C3 9G33 C3 9G34 C3 9G35 C3 9G36 G5 9G37 G5 9G38 D2 9G39 D3 9G40 D3 9G41 D3 9G42 E3 9G43 E3 9G47 G6 9G48 F6 9G49 B2 FG01 B3 FG98 H3 FG99 H2 IG00 G6 IG01 F5 IG02 C3 IG03 D3 IG04 D3 IG05 D3 IG06 E3 IG07 E3 IG08 E6 IG09 E7 IG10 E6 IG12 D7 IG14 D7 IG16 C7 IG17 E6 IG18 E6 IG19 B2 IG20 E6 IG21 B6 cG10 D10 cG11 D10 cG12 D10 cG13 D10 cG14 D10 cG15 D10 cG16 D10 cG17 D10 cG18 D10 cG19 D10 cG20 D10 cG21 E10 cG22 E10 cG23 E10 cG24 E10 cG25 E10 cG26 E10 cG27 E10 cG28 E10 cG29 E10 cG30 E10 cG31 E10 cG32 F10 cG33 F10 cG34 F10 cG35 F10 cG36 F10 cG37 F10 cG38 F10 cG39 F10 cG40 F10 cG41 F10 cG42 F10 cG43 G10 cG44 G10

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 60

SSB: HDMI: Supply 1

2

B7A

3

4

5

6

7

9

8

10

11

12

13

HDMI + SUPPLY

B7A

A

A

B

B

1I06 5B17

3B03

6

ADR

5

SDA

47K

47K

100n

100n 2B17

100n 2B16

100n 2B15

100n 2B14

100n 2B13

2B12 FB18 3V3-PLL

+3V3 220R 100n

3B07 100R

C

PARX-DDC-SDA

2B26

7

WC SCL

D

3B08 100R FB19

100n

100n 2B21

2B18

100n

100n 2B25

2B22

100n 2B20

3V3-DIG

3V3-DIG

100n 2B19

3V3-DIG 220R

100n 2B24

5B12 +3V3

100n 2B23

4

0 1 2

3V3-AVI

IB00 5B11

3B06

(256x8) EEPROM

1 2 3

FB04

10K

8

Φ

3B05

DDC NVM HDMI 1

HDMI CONNECTOR 1

3B04

100R 7B02 M24C02-WDW6

2B11

PARX-DDC-SCL

IB11

FB14

3V3-AVI 47u 4V

IB02

ARX-HOTPLUG

1-1734011-2

D

3B02 100R

AIN-5V

FB16

220R

100n

ARX-DDC-SCL ARX-DDC-SDA

FB12 FB13 21 20 23 22

5B10 +3V3-AV

600R

RES FB10 FB11

100n

2B10 5B00 AIN-5V

ARXCP50-HDMI

2B01

9B00

ARX-DDC-SDA

100n

FB09

ARX-DDC-SCL

2B00

ARX0ARXC+

3V3-APLL 220R

1B04

ARX1ARX0+

FB17

+3V3

ARX2ARX1+

1B03

C

ARX2+

1B00

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

E

E

FB20

F

100n

100n 2B39

100n

100n 2B37

100n 2B36

2B38

+1V8

+1V8 2B35

+1V8

F

7B25 LD3985M18 5

OUT

INH

1V8-PLL 220R

4

BP

1u0

10n

2B46

2

2B31

COM

100n

IN

100n

3

2B33

1

FB21

2B32

+3V3

5B18

G

G

H

FB45

9B38 RES

+3V3

H

7B45 LD1117DT33 2

+3V3-AV

2B40 RES

10n

10K

100u 4V

OUT

RES 2B41

IN

COM

HPD-HIRATE

100u 4V

3B18

2B45

IB20 7B20 BC847BW 2B04

4n7 1B20

100K 2B03

6B20 3B20

BAS316

PDZ24-B

1K0 6B21

3B19

I

3

+5V 22R

1

ARX-HOTPLUG

IB19

1u0

3B17

I

AIN-5V

G_16290_044.eps 010206

3104 313 6095.3 1

2

3

4

5

6

7

8

9

10

11

12

13

1B00 C3 1B03 C4 1B04 C4 1B20 I5 1I06 B1 2B00 C4 2B01 C5 2B03 I4 2B04 I6 2B10 B10 2B11 C9 2B12 C11 2B13 C11 2B14 C12 2B15 C12 2B16 C12 2B17 C12 2B18 E13 2B19 E13 2B20 E13 2B21 E13 2B22 E11 2B23 E11 2B24 E12 2B25 E12 2B26 D10 2B31 G9 2B32 G10 2B33 G11 2B35 F12 2B36 F12 2B37 F12 2B38 F13 2B39 F13 2B40 I10 2B41 I10 2B45 I9 2B46 G10 3B02 C6 3B03 C7 3B04 D5 3B05 D6 3B06 D6 3B07 D5 3B08 D6 3B17 H5 3B18 I6 3B19 I4 3B20 I4 5B00 C5 5B10 C9 5B11 D9 5B12 D9 5B17 B9 5B18 F10 6B20 I4 6B21 I4 7B02 D4 7B20 I5 7B25 F9 7B45 H10 9B00 C2 9B38 H10 FB04 D5 FB09 C2 FB10 C2 FB11 C2 FB12 C2 FB13 C2 FB14 D2 FB16 C10 FB17 B10 FB18 D10 FB19 D10 FB20 F10 FB21 F11 FB45 H10 IB00 C7 IB02 C6 IB11 C5 IB19 H5 IB20 I6

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 61

SSB: HDMI: I/O + Control 1

2

3

4

5

6

7

8

9

10

11

12

13

HDMI: I/O + CONTROL

B7B

B7B

A

A

7B50-3 TDA9975HS/8/C1

7B50-1 TDA9975HS/8/C1

133 IB53

3B54

HDMI-COAST M135-CLK

72 124 125 126 135 116 115

9B50

12K

C

POWERDOWN-HDMI

2B55

IB67 1K0

1u0

10p 3B66

5B65

2B57

3B65 470R

1p5

PR

2B56

10n

2B52

10n

10n

2B51

2B50

93 78 65

2B58

10n

10n 2B64

1u0

2B70

2B75 1K0

470R

IB68 10p 3B68

5B67

10n

10n

2B78

Y

10n

2B80 10n

2B79

Y1

2B60

2B59

3B67

1p5

3B52

PR1 39R

3B51 39R

39R

D

3B50

10n

130 131 132 127 128 129

H-SYNC-VGA

5B75

470R

1u0

IB58

1K0 1K0

10n

117

ARX0ARX0+

167 168

ARX1ARX1+

173 174

ARX2ARX2+

179 180 165 164

2B67

IB73

2B69

3B75

10n

2B76

1K0

1u0

V-SYNC-VGA

10n

171 170 177 176

IB75

2B77

161 162

ARXCARXC+

10n +3V3

1K0

470R

10p 3B70

2B63 5B73 1p5

3B73

10p 3B72

2B66

IB70

10p 3B74

1p5 1p5

2B65

1u0

2B61

3V3-DIG

10p 3B76

PB1

5B71

2B68

PB

F

3B71 470R

1p5

Y1

1u0

2B72

E

2B62

470R

2B71

Y

90 89 88

10n

IB69

5B69

3B69

96 95 94 81 80 79 68 67 66

159 158

JTAG-TD-PNX2015-HDMI JTAG-TD-HDMI-CON JTAG-TD-HDMI-CON JTAG-TMS JTAG-TRST JTAG-TCK

FB80

9B51 RES

G

3B89

10K

3B81

3B80

IB81

1K0 IB82 3B82 1K0

9B52 9B53

IB86

22R

3B60 100R

SCL-MM SDA-MM

109 110 55 108 107 138 118 143 142

3B61 100R

145 146

PARX-DDC-SDA PARX-DDC-SCL

H

153 152

148 149 139

Φ

VIDEO CONVERTER INTERFACE CKEXT VPP

VREF

208

0 1 2 3 4 5 VPA 6 7 8 9 10 11

R_Pr G_Y REF B_Pb 1 2 R_Pr 3 1 2 G_Y 3 1 2 B_Pb 3

0 1 2 3 4 5 VPB 6 7 8 9 10 11

1 2 G_Y 3 1 2 H_C_SYNC 3 1 2 VSYNC 3

0 1 2 3 4 5 VPC 6 7 8 9 10 11

HE RXA0 + RXA1 + RXA2 +

VCLK VAI

RXB0 +

R_V OR G_Y B_U

RXB1 +

0 1 CTL 2 3

RXB2 + RXAC1 +

HREF FREF

RXBC +

PL DE HS VS CS WS

A RRX B TCK TDI TDO TMS TRST

AP

DIS A0 SCL SDA

0 1 2 3

ACLK 0 X 1 2

HSDAA HSCLA

RES

3B55

DV-VREF

33R

71 99 84

DV4-VALID 1K0 IB83

5 6 7 8 9 10 15 16 17 18 19 20

HPD-HIRATE 87

3B56-1

33R

3B56-3

33R 33R

3B59-1

33R

3B56-4

33R

3B59-2

33R

3B59-4

33R

3B57-2

33R 3B59-3 33R 3B57-1 33R

23 24 25 26 27 28 31 32 33 34 35 36

3B57-3 33R 3B62-1 33R 3B62-3 33R 3B58-1

3B56-2

3B62-2 33R 3B62-4 33R 33R 3B58-2 33R

73 102 12 141 191 136 105 111 112 113 114

DV5-DATA0_SOP DV5-DATA1_ERR DV5-DATA2_0 DV5-DATA3_1 DV5-DATA4_2 DV5-DATA5_3 DV5-DATA6_4 DV5-DATA7_5 DV5-DATA8_6 DV5-DATA9_7

3B57-4

3B58-3

39 40 41 42 43 44 47 48 49 50 51 52

DV4-DATA0_SOP DV4-DATA1_ERR DV4-DATA2_0 DV4-DATA3_1 DV4-DATA4_2 DV4-DATA5_3 DV4-DATA6_4 DV4-DATA7_5 DV4-DATA8_6 DV4-DATA9_7

33R

33R

Φ

IGND1 IGND2

GND

OGND1 OGND2 OGND3 OGND4 OGND5 OGND6 OGND7 OGND8 OGND9

AGNDB_Pb AGNDR_Pr AGNDG_Y

HGND1 HGND2 HGND3 HGND4 HGND5 HGND6 HGND7

AGNDSOG_Y AGNDBIAS AGNDPLL CGND1 CGND2 CGND3 CGND|TCLK CGND|TST0 CGND|TST2 CGND|TST3 CGND|TST4 CGND|TST5

HGNDAPLL CGND|TST6 CGND|TST7 CGND|TST8 CGND|TST9 CGND|TST10 CGND|TST11

144 150

B

4 14 22 30 38 46 54 189 197 61 151 155 160 166 172 178

C

59 119 120 121 122 123 134

D

33R

3B58-4

2 206

IB85

3B53

3V3-DIG

BIAS COAST GAIN CLAMP MCLK OE PD

AGND1 AGND2 AGND3 AGND4 AGND5 AGND6 AGND7 AGND8 AGND9

3V3-DIG

137

63 69 74 76 82 86 91 97 100

E 10K

IB57

3B83

B

3B84

FB84 FB83

DV4-CLK IRQ-HIRATE

15R

IB59 IB60 IB61

203 205 204

F

192 193 194 195 1 207

3B85

33R RES

DV-HREF DV-FREF

3B86 33R

198 199 200 201 202 182 183 184 185 186

IB62 IB63 3B87 3B88

33R 33R

DV-HREF DV-VREF

G

IB64 IB84

9B54

SPDIF-HDMI

7B50-2 TDA9975HS/8/C1

Φ

187 56 57 58

HSDAB HSCLB

1V8-PLL

103

+1V8

11 140 190

3V3-DIG

106 147

3V3-AVI

64 70 75 77 83 85 92 98 101 104

NC

I

3V3-PLL

VDDA10_18 VDDC1_18 VDDC2_18 VDDC3_18 VDDI|TST1 VDDI_33 VDDA1_33 VDDA2_33 VDDA3_33 VDDA4_33 VDDA5_33 VDDA6_33 VDDA7_33 VDDA8_33 VDDA9_33 VDDA11_33

VDD

VDDH1_18 VDDH3_18 VDDH4_18 VDDH2_33 VDDH5_33 VDDH6_33 VDDH7_33 VDDH8_33 VDDH9_33 VDDO1_33 VDDO2_33 VDDO3_33 VDDO4_33 VDDO5_33 VDDO6_33 VDDO7_33 VDDO8_33 VDDO9_33

60 154 156

1V8-PLL

62 157 163 169 175 181

3V3-APLL

3 13 21 29 37 45 53 188 196

+1V8

H

3V3-DIG

3V3-DIG

I

G_16290_045.eps 010206

3104 313 6095.3 1

2

3

4

5

6

7

8

9

10

11

12

13

2B50 D1 2B51 D1 2B52 D1 2B55 C3 2B56 D2 2B57 D3 2B58 D6 2B59 D2 2B60 D3 2B61 E3 2B62 E2 2B63 E3 2B64 D6 2B65 E2 2B66 F3 2B67 F3 2B68 F2 2B69 F3 2B70 D6 2B71 G2 2B72 G3 2B75 D3 2B76 E3 2B77 F3 2B78 D5 2B79 D5 2B80 D6 3B50 D1 3B51 D1 3B52 D1 3B53 C8 3B54 C5 3B55 C8 3B56-1 C8 3B56-2 C9 3B56-3 C8 3B56-4 C9 3B57-1 D8 3B57-2 D9 3B57-3 D8 3B57-4 D9 3B58-1 D8 3B58-2 E8 3B58-3 E8 3B58-4 E8 3B59-1 C8 3B59-2 C9 3B59-3 C8 3B59-4 D9 3B60 H4 3B61 H5 3B62-1 D8 3B62-2 D9 3B62-3 D8 3B62-4 D9 3B65 C2 3B66 D3 3B67 D2 3B68 D3 3B69 E2 3B70 E3 3B71 E2 3B72 E3 3B73 F2 3B74 F3 3B75 F2 3B76 G3 3B80 G6 3B81 G5 3B82 G6 3B83 E8 3B84 F8 3B85 G8 3B86 G9 3B87 G8 3B88 G8 3B89 G4 5B65 C3 5B67 D3 5B69 E3 5B71 E3 5B73 F3 5B75 F3 7B50-1 B7 7B50-2 G11 7B50-3 B11 9B50 C5 9B51 G4 9B52 G5 9B53 G5 9B54 G9 FB80 G4 FB83 F8 FB84 F8 IB53 C6 IB57 B6 IB58 E6 IB59 F8 IB60 F8 IB61 F8 IB62 G8

IB63 G8 IB64 G8 IB67 C3 IB68 D3 IB69 E3 IB70 E3 IB73 F3 IB75 F3 IB81 G6 IB82 G6 IB83 C8 IB84 G8 IB85 C9 IB86 G4

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 62

SSB: Analog I/O 2

1

3

4

6

5

7

8

9

10

11

12

13

ANALOG I/O

B7C

14

B7C

A

A

B

+12VSW

II17

AV1_CVBS

AV7_Y-CVBS

3I12

3

5

6I0V

6I0A

PDZ24-B

FI05

BLUE 4 +12VSW

75R

AV2_Y-CVBS 75R

3I0P

1I04-2

RED6

+12VSW

YLC21-3020N

1I0M

1I0B

PDZ24-B

6I0P

3I04 100R 75R

RED

PB1

3I02

6

PB

75R

BLUE

3I0J

4

II02

II0D

3I0K 100R

D

+12VSW

PDZ24-B

3I13

5

FI0P

1I0K

FI0H

C

FI0K

SVHS

+12VSW

1I03-2

1

FI12

+12VSW

D

Y / CVBS 4

100R

75R

3I0F

1I0H

6I11

II12

1I17

3I0G 100R

PDZ24-B

6I0T 1I01 YKF51-5564

AV2_C

FI0J

2

3I0N

1I0A

3I01

3I0L

3

V_NOM

FI0F

PDZ24-B

YELLOW

YELLOW

2

75R

3

YLC21-3020N

1

+12VSW

PDZ24-B

2

GREEN

1I04-1

GREEN

YLC21-3020N +12VSW

1

FI04

C

75R

1I0J 1I03-1

6I0J

C

3I06 100R

1I0L

Y1

6I09

II01

Y

PDZ24-B

II0C

3I0M 100R

75R

6I0N

PDZ24-B

+12VSW

FI0I

E

B

+12VSW

E

5

1I08

100K

3I0A

2I06

100p

100p

3I0C

100K 2I07

1I0E

1I02 3

YELLOW

1

BLACK

FI01 2

FI0E

5I02

12p

2I09

1I0G

F

II08

II13

3I68 220R

120R

YKC21-4374

3I69

100R

2I53

II14

SPDIF-OUT1

100n

120R

3I08

AUDIO-IN4-R

PDZ24-B

II06

AUDIO-IN1-R

6I0H

6I02

II07

3I0B 100R

+12VSW

PDZ24-B

FI0C

PDZ24-B

6I0D

YLC21-3020N

F

+12VSW +12VSW

AUDIO-IN1-L

6I00

II05

3I07

AUDIO-IN4-L

FI00

1

3I66

RED WHITE

100K

3

G

+12VSW

YKC21-4374 1I07

100K

3I09

2I05

100p

100p

3I0E

100K 2I08

AUDIO-IN2-R 100p

1I00

2

100R

100R

1I0F

PDZ24-B

PDZ24-B

II11

3I0D

II15

3I0Q 100R

YLC21-3020N

FI0D

PDZ24-B

FI0N 8

2I0F

YLC21-3020N

WHITE 9

FI0M

PDZ24-B

1I09

+12VSW

1I04-3

6I10

RED 7

6I0Y

6I08

FI03

75R

+12VSW

3I03 100R

1I0P

PR1

PDZ24-B

II03

PR

3I00

WHITE

6I0F

G

9

II10

3I0I 100R 3I0H

8

FI0G

RED

75R

7

1I0I

1I03-3

PDZ24-B

6I0L

+12VSW

II16

3I60

AUDIO-IN2-L

H

100K

3I67

100p

AV3

2I0E

AV1

AV2

1I0N

100R

H

I

I

G_16290_046.eps 010206

3104 313 6095.3 1

2

3

4

5

6

7

8

9

10

11

12

13

14

1I00 G9 1I01 C9 1I02 E9 1I03-1 C1 1I03-2 E1 1I03-3 G1 1I04-1 B8 1I04-2 E8 1I04-3 G8 1I07 G7 1I08 F7 1I09 G7 1I0A C7 1I0B E7 1I0E F2 1I0F G2 1I0G F10 1I0H D2 1I0I G2 1I0J C2 1I0K E2 1I0L C10 1I0M E10 1I0N H10 1I0P G10 1I17 D7 2I05 G6 2I06 F6 2I07 F3 2I08 G4 2I09 F11 2I0E H12 2I0F G12 2I53 F12 3I00 G6 3I01 C6 3I02 E6 3I03 G6 3I04 D6 3I06 C6 3I07 G6 3I08 E6 3I09 G6 3I0A F6 3I0B E3 3I0C F3 3I0D G3 3I0E G3 3I0F D3 3I0G D3 3I0H G3 3I0I G3 3I0J E3 3I0K D3 3I0L C3 3I0M C3 3I0N C11 3I0P E11 3I0Q G12 3I12 D6 3I13 D6 3I60 H12 3I66 G12 3I67 H12 3I68 F12 3I69 F12 5I02 F11 6I00 G7 6I02 E7 6I08 F7 6I09 B7 6I0A D7 6I0D E2 6I0F G2 6I0H F10 6I0J C2 6I0L F2 6I0N B2 6I0P D2 6I0T B11 6I0V D11 6I0Y G11 6I10 G11 6I11 C7 FI00 G7 FI01 F7 FI03 G7 FI04 C7 FI05 D7 FI0C E2 FI0D G2 FI0E F10 FI0F D2 FI0G G2 FI0H D2 FI0I C2 FI0J C9 FI0K C10 FI0M H10 FI0N G10 FI0P D9 FI12 D7

II01 B5 II02 D5 II03 G5 II05 G6 II06 E6 II07 E4 II08 F12 II0C B4 II0D D4 II10 G4 II11 G4 II12 C4 II13 F12 II14 F13 II15 G13 II16 H13 II17 C5

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 63

SSB: UART

1

B7D

2

3

Personal Notes:

UART

B7D

6I01-1 2

1

+3V3-STANDBY

BAV99S

A 3I10

TXD 3I11

RXD

100R

100p

2I02

1I11

6

A

1M16

FI11 FI10

5 100p

4

UART SERVICE CONNECTOR

S3B-PH-SM4-TB

B

3

B

2I03

1I10

100R

1 2 3

1I10 B2 1I11 A2 1M16 A3 2I02 A3 2I03 B3 3I10 A2 3I11 B2 6I01-1 A1 6I01-2 B1 FI10 B2 FI11 A2

BAV99S 4

5

+3V3-STANDBY

6I01-2

C

C

D

D

E

E

G_16290_047.eps 010206

3104 313 6095.3

1

2

3 E_06532_012.eps 131004

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 64

SSB: Audio: Amplifier 1DM1 H8 2D11 B2 2D14 E7 2D15 E7 2D17 E15 2D18 E15 2D19 F2 2D20 F7 2D21 G14

2D22 H14 2D23 E14 2D26 F2 2D27 F9 2D28 H7 2D30 F3 2D31 F11 2D32 F6 2D35 G2

2D36 G9 2D37 G6 2D38 H2 2D39 G13 2D40 G13 2D41 H7 2D42 H7 2D43 H14 2D44 H15

2D45 H3 2D46 H10 2D47 H2 2D48 H3 2D49 H10 2D50 H10 2D51 C8 2D52 E6 2D53 F7

1

2D54 F14 2D55 F2 2D56 F6 2D57 F14 2D58 G14 2D59 G6 2D60 H9 2D61 H9 2D62 H9

2D63 C6 2D64 E9 2D65 F9 2D66 F9 2D70 C4 2D71 G1 2D72 F10 3D10 A3 3D12 A4

2

3D39-1 G4 3D39-2 E4 3D39-3 G3 3D39-4 E5 3D40-1 G11 3D40-2 G11 3D40-3 E11 3D40-4 E13 3D42 C3

3D22 C5 3D23 D4 3D24 C4 3D25 C3 3D26 D3 3D34 E3 3D35 E4 3D37 E10 3D38 E11

3D13 B2 3D14 B2 3D15 B4 3D16 B5 3D17 B2 3D18 B2 3D19 C4 3D20 C5 3D21 C2

3

3D43 E1 3D44 F5 3D45 F12 3D46 F6 3D47 F13 3D49 E1 3D50 F1 3D51 F9 3D54 F1

4

5

3D78 E12 3D79 G12 3D81 G4 3D82 C7 3D83 C7 3D84 B8 3D85 B8 3D86 C9 3D87 C10

3D69 H10 3D70 H11 3D71 H3 3D72 H11 3D73 H3 3D74 H10 3D75 B9 3D76 G5 3D77 E6

3D56 G2 3D57 G9 3D58 G11 3D60 F6 3D61 F13 3D64 G4 3D65 G11 3D67 H3 3D68 H3

6

5D15 G15 5D16 G2 5D18 F6 5D19 F14 6D10 B4 6D11 C4 7D10-1 B3 7D10-2 F3 7D10-3 F10

3D88 C10 3D89 B4 3D90 E9 3D91 E9 5D10 E7 5D11 E15 5D12 F6 5D13 F14 5D14 G7

7

7D17 G4 7D18-1 E5 7D18-2 G5 7D19 F11 7D20 E12 7D21-1 F12 7D21-2 F12 7D22 G12 7D23-1 E12

7D10-4 B3 7D11-1 B5 7D11-2 C5 7D12-1 D4 7D12-2 C3 7D14 F4 7D15 E5 7D16-1 F5 7D16-2 F4

8

7D23-2 G12 7D24 E2 7D25-1 C8 7D25-2 B9 7D26-1 C9 7D26-2 B10 7D30 F6 7D31 F13 9D03-1 F6

9D03-2 F6 9D03-3 G6 9D03-4 G6 9D04-1 F13 9D04-2 F13 9D04-3 F13 9D04-4 G13 9D48 E2 FD26 F2

9

ID15 F12 ID16 F6 ID17 F13 ID20 F2 ID21 F11 ID22 F12 ID23 F4 ID24 F9 ID25 F1

FD27 G10 FD49 B3 FD54 B3 FD73 C9 ID10 E7 ID11 E15 ID12 E11 ID13 E4 ID14 F5

10

11

ID46 H3 ID47 H11 ID48 B5 ID50 B4 ID51 B4 ID52 B2 ID53 B4 ID55 C5 ID56 C4

12

AUDIO: AMPLIFIER

B8A

ID37 G11 ID38 G10 ID39 G2 ID40 G7 ID41 G15 ID42 G3 ID43 G10 ID44 H2 ID45 G13

ID28 G4 ID29 G12 ID30 C7 ID31 B8 ID32 G5 ID33 G12 ID34 G3 ID35 G5 ID36 G4

ID57 C3 ID60 B4 ID61 C4 ID62 F1 ID63 C7 ID64 F14 ID65 F6 ID66 F9 ID67 E9

ID81 F1 ID82 F5 ID83 F5 ID86 F4 ID87 F4 ID91 C10 ID92 E6 ID93 E6 cD01 D15

ID70 B8 ID71 C10 ID72 C10 ID74 F9 ID75 F11 ID76 F11 ID77 F14 ID78 F13 ID80 E1

13

cD04 D15 cD05 E15

14

15

B8A

overcurrent ** = protection

PROT-AUDIOSUPPLY

2D70

ID61 6 7D12-1

47K

ID71 -18V4

47K

100K

3D87

3D86

6 2

7D26-1 BC847BPN 1

ID72 33K

**

U-VOLT-DETECT

CPROT

BC847BS

MUTE

-12_20V 2K2

1

-12_20V

-12_20V

1n0

U-VOLT-DETECT

2K2

3D26

INV-MUTE

3D23

2

U-VOLT-DETECT

47K

3D75

47K

3D84 ID63

1n0

47K

ID91

FD73

7D25-1 BC847BPN 1

SOUND-ENABLE

5 4

D

6 2

5

3 -17V4

ID30

3D82

ID55

4 BC847BPN 7D26-2

3D88

10K

3D24

7D12-2 3 BC847BS

ID57

3

ID56

47K

3D42

18V4

GND-D

3D83

6D11

*

GND-D

5

3D22

2K2

3D25

GND-D

3D85

3

7D11-2 BC847BS 4

4 BC847BPN 7D25-2

ID31

47K 2D51

2K7

3D21

7D11-1 BC847BS 1

VN

*

5

10n

+12_20V

+12_20V

C

2

ID51

12

BZX384-C18

2u2

2D11

ID53

6

47K

ID70 ID48 0V7

3D20

FD54

3D18

+3V3-STANDBY

6

7D10-4 LM339P 1

2D15 2D18 2D22 2D23 2D26 2D27 2D28 2D42 2D44 2D48 2D50 2D52 2D53 2D54 2D55 2D56 2D57 2D58 2D59 3D25 3D35 3D38 3D49 3D50 3D51 3D54 3D64 3D65 3D90 3D91 5D12 5D13 5D18 5D19 6D11 7D18 7D23 7D24 9D48

+12_20V

22K

VP 3 7

220K

0V ID50

POS

2K2

BAS316

VN ID52

3D17

RIGHT-SPEAKER

ID60 22K

12

B

5K6

3D12 3D89

8

47K

FD49

47K

2K7

GND-D

220K

3D19

3D14

7D10-1 LM339P 14

9

6D10 3D15

3

3D13 LEFT-SPEAKER

VP

47K

3D10

+3V3-STANDBY

10K 2D63

+12_20V

3D16

A

SOUND-ENABLE

DIVERSITY LIST 2x8W (8 ohm)

A

2x15W (8 ohm )

100uF/16V 100uF/16V ----------------------100nF/16V 100nF/16V -----------100uF/16V 100uF/16V 2n2 2n2 --------------------------------------------2n2 2n2 2n2 2n2 2K2 1K2 1K2 -----------10K 10K -----------1K2 1K2 -----------1K2 ----------------------BEAD 0805 220 E 100MHz BEAD 0805 220 E 100MHz BZX384-C18 SI4532 SI4532 -----------JMP

----------------------100uF/25V 100uF/25V 100nF/25V 100nF/25V 100uF/25V ----------------------1n5 1n5 100uF/25V 470nF/25V 470nF/25V 1n5 --------------------------------------------1K0 1K0 1K0 15K 3K9 3K9 47K 1K0 1K0

B

C

33uH 33uH ----------------------BZX384-C27 SI4559 SI4559 BC817-25W ------------

D

ID39 VN

RIGHT-SPEAKER

CPROT

FEEDBACK-RL

MUTE

FEEDBACK

2K2

22K

10n 12

2

VN

GND-DL

3D40-2

8 ID29

7D23-2

5

*

7 8

GND-DR ID33 2 3 1

7D22

SI4532ADY

ID37

7

BC817-25W

100u 16V

2D17

GND-DR GND-DR

*

F

33u

*

2n2

470n 2D57

*

*

ID64

2D58

5

ID45 2D40

22K

*

100n 2D18

2D23

*

2D54

6R8

4

220R 5D13

GND-DR GND-DR

1n5

ID38

ID40

5D19

*

G

220n

4

3D40-1

** 8 9D04-2 ** 2 7 ** 9D04-3 3 6 ** 9D04-4 9D04-1

1

ID78

4

5D14

ID41

5D15 -12_20V

GND-DL

3D71

GND-DL

16V 100u

2D44

100n

GND-DR GND-DR

3D72

220R

H

GND-DR

10K GND-DL

560R

3D74

560R

*

ID47

GND-DR

100n 2D62

2D22

1u0

2D46

2D50

2n2

100K

*

1n5

100n 2D61

GND-DL

*

2D43

3D70

3K9 2D60

10K 3D73

ID43

3D69

1DM1 EMC HOLE

ID46

H

220R

2D49

2D42

*

16V 100u

100n

2D41

25V 100u

1u0

2D45

2n2

*

2D48

1n5

2D47

*

100K

3K9

GND-D

3D68 2D28

100n

2D38

ID42

3D67

ID44

25V 100u

-12_20V

220R

100n

G_16290_048.eps 010206

GND-D

3104 313 6095.3 1

2

3

4

5

6

7

E

2n2

1u0

1

0R1

3D47

FD27

7D21-2 BC847BPN

ID75

2D31

**

ID17

2D39

7D10-3 LM339P 2

3D45

3

5

7D21-1 BC847BPN 1

330R

2p2

2D72

10K

2D27

3D61

1n5

ADAC2

ID74

680R

GND-DL

ID77

GND-DR SI4532ADY

ID22

ID76

*

ID24 3D51

2D59

7D19 BC847BW

3D58

ID65

*

-17V4 VP

100u 25V

5 3D40-4 4

22K

1K2

3D78

3D38

3K3

3D37

22K

3D90

220R

3D91

100n 2D15

100u 16V

2D14 2D20

2n2 2D53

2D56

2p2

1n5

1n5

FEEDBACK-RL

**

2D21

1K2

3D64

5D16 -12_20V

BC817-25W

SI4532ADY

* 7D31 BC857BW

22K

22K

*

330R ID32

7D17

ID36

6

ID35

2

*

2

ID15

3D79

3D39-3

GND-DL

*

7D23-1

ID21

1K2

3

3

ID16 33u

2p2 2D66

3D65

2p2

G

5 ID28 BC847BPN

7D20

ID66

15K 2D36

ID34

7D18-2

** ** ** **

ID12

6

3D57

22K

10n

12

*

8

2D32

3D39-1

4

* *

9D03-1 8 1 9D03-2 7 2 9D03-3 6 3 9D03-4 5 4

*

6

2D65

1n5

10

1

7D16-2 7 8

ID86

2D30

2D37

FEEDBACK

ID87 -16V9

7D10-2 LM339P 13

ID83

0R1

3D40-3

1

1u0

2D71

3 11

680R

FD26 GND-D

3D81

*

2D26

1n5

10K

ID62

15K 2D35

ADAC1

*

3D50

3D56

ID25

ID23

**

3

22K

-12_20V

3D46

7D14 BC847BW

3D76

100n

2D19

-17V4

7D16-1 BC847BPN 1

3D60 6R8

2

ID82

3D44

VP 1n5

2D55

47K

3D54

F

*

220R 5D12

FEEDBACK-LR

GND-DL 5D11 +12_20V

BC807-25W GND-DL GND-DL

GND-DR

220R

22K

*

cD05

GND-D

2p2 FEEDBACK

cD04

ID11

ID67

2D64

GND-DL

5 6 ID20

*

SI4532ADY

*

220n

**

5D18

ID14 6

*

470n

7D30 BC857BW

2n2

3

ID93

4

22K

BC817-25W

ID81

2D52

7D18-1

7D15 BC807-25W

INV-MUTE

100u 25V

*

*

22K

22K

ID13

3D77

4

**

5

3D39-2

3D39-4

7

* 2

15K

*

3D49

10R

1K2

+12_20V

*

3D35

7D24

ID10

3K3

ID80

3D43

* 3D34

9D48

5D10

ID92

E

*

-12_20V

33K

LEFT-SPEAKER

CPROT

MUTE

FEEDBACK-LR

cD01 +12_20V

8

9

10

11

12

13

14

15

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 65

SSB: Audio: Connectors

1

B8B

2

3

4

5

6

7

AUDIO: CONNECTORS

B8B

-12-16V-NF

A 1M02

1n0

5M10

2M11

220R 5M11

1n0 2M12

220R 5M12

1n0

220R

FM10

1 2 3 4 5 6 7

FM12 GND-D FM13 FM14

B

IM10

2x8W (8 ohm)

-12_20V

FM11

B7B-PH-K

A

2M10

+12-16V-NF

2M11 2M13 2M14 3M04 5M09 5M11

IM11

-------------------------------------------------------

2x15W (8 ohm) 1nF 1nF 1nF 100E 220E 100MHz 220E 100MHz

+12_20V

5M09

B

2M13

FM15

220R 1n0 3M04 100R

2M14

0V7

PROT-AUDIOSUPPLY

IM12

1n0

2M17 1740

C

1 2 3 4 B4B-EH-A

IM15

2M15 2n2

2n2

FM16 FM17

2M18 GND-D

IM16

2M16 2n2

2n2

FM18

5M02 220R

5M03 220R

C

0M99

0M98

LEFT-SPEAKER IM13

RIGHT-SPEAKER IM14

1MM2 EMC HOLE

D

D

G_16290_049.eps 010206

3104 313 6095.3

1

2

3

4

5

6

7

0M98 C6 0M99 C6 1740 C1 1M02 A1 1MM2 D6 2M10 A3 2M11 A3 2M12 B3 2M13 B3 2M14 B2 2M15 C3 2M16 C3 2M17 C3 2M18 C3 3M04 B3 5M02 C4 5M03 C4 5M09 B4 5M10 A4 5M11 A4 5M12 B4 FM10 A2 FM11 A3 FM12 B2 FM13 B2 FM14 B2 FM15 B2 FM16 C2 FM17 C2 FM18 C2 IM10 A4 IM11 B4 IM12 B3 IM13 C4 IM14 C4 IM15 C3 IM16 C3

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 66

SSB: SRP List Part 1

SRP List: Not available at the time of writing. As soon as it becomes available, a Service Info or Service Manual update will be issued via the appropriate channels.

3104 313 6095.3

G_16290_096.eps 030206

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 67

SSB: SRP List Part 2

SRP List: Not available at the time of writing. As soon as it becomes available, a Service Info or Service Manual update will be issued via the appropriate channels.

3104 313 6095.3

G_16290_096.eps 030206

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 68

Layout SSB (Top Side Overview)

Part 1 G_16290_050a.eps

Part 2 G_16290_050b.eps

3104 313 6095.3

G_16290_050.eps 270106

1C51 A2 1C52 A3 1C61 A3 1C62 A3 1E41 A4 1P02 G1 1T41 A2 1T44 A1 1T55 A2 1TG0 A1 1TG1 B1 1U02 F3 1Z55 E1 2A01 B4 2A25 B4 2A29 A4 2A33 A4 2A34 A4 2A35 A4 2A36 A4 2A37 A4 2A38 A4 2A39 A4 2A40 A4 2A41 B4 2A42 B4 2A43 B4 2A44 B4 2A45 B4 2A46 B4 2A47 B4 2A48 A4 2A49 A4 2A50 A4 2A51 A4 2A52 A4 2A53 A4 2A54 A4 2A55 A4 2A56 A4 2A57 A4 2A58 A4 2A59 A4 2A60 A4 2A61 A4 2A62 A4 2A63 A4 2A64 A4 2A65 A4 2A66 A4 2A67 A4 2A68 A4 2A69 B4 2A70 B4 2A71 B4 2A72 B4 2A73 B4 2A74 B4 2A75 A4 2A76 A4 2A77 A4 2A78 A4 2A79 B2 2A81 A2 2A82 A4 2A83 A2 2A84 A2 2A89 A2 2A90 B2 2A92 A4 2A93 A2 2A97 A4 2A98 A2 2A99 A2 2AA3 B3 2AA5 B2 2AA6 B2 2AA8 B4 2AA9 B4 2AAA B4 2AAB B4 2AB1 B2 2AB2 A2 2AB3 B2 2AB5 A3 2AB6 B4 2AB8 A3 2B00 C1 2B01 C1 2B02 C1 2B37 B1 2B38 B1 2BA0 B1 2BA2 B1 2BA3 B1 2BA8 B1 2C03 A3 2C04 A3 2C05 A3 2C06 A3 2C07 A3 2C08 A3 2C09 A3 2C11 A3 2C12 A3 2C13 A3

2C14 2C15 2C16 2C17 2C18 2C19 2C20 2C22 2C23 2C27 2C28 2C31 2C35 2C36 2C39 2C40 2C41 2C44 2C45 2C46 2C50 2C55 2C57 2C58 2C60 2C63 2C65 2C67 2C68 2C70 2C72 2C78 2C79 2C83 2H00 2H02 2H03 2H11 2H12 2H13 2J30 2J31 2J32 2J33 2J34 2J35 2J40 2J41 2J42 2J43 2J44 2J45 2J46 2J47 2J48 2J49 2J57 2J66 2J71 2J72 2J73 2J74 2J76 2K40 2K41 2K43 2K45 2K46 2K47 2K64 2K65 2L50 2L51 2L52 2L53 2L54 2L55 2L56 2L57 2LT1 2LT3 2LT4 2LT5 2LT6 2LT7 2M90 2M91 2M92 2M93 2M94 2N05 2N06 2N08 2N10 2N11 2P02 2P03 2P04 2P06 2P07 2P09 2P10 2P15 2P16 2P18 2P19

A3 A3 B3 B3 B3 B3 B3 B3 B3 B3 B3 A3 A3 A3 A3 B3 A3 B3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 D2 D3 D2 E2 E2 E2 B4 B4 B4 B4 B3 B3 C4 C4 C4 C4 C4 C4 C4 C4 C4 C4 C4 C4 C4 C4 C4 B4 C4 A3 A3 A3 A3 A3 A3 A3 A3 C3 C3 B3 B3 B3 C4 B3 B3 B4 C3 C4 C4 C2 C3 B2 B2 B2 A2 A1 C1 C1 C1 C1 C1 F1 G1 G1 F1 F1 G1 F1 G1 F1 G1 G1

2P20 F1 2P22 G1 2P23 G1 2P24 F2 2P25 G2 2P31 F2 2P32 G1 2P33 G1 2P34 F1 2P35 F1 2P40 F1 2P41 F1 2P50 F1 2P51 G2 2P76 F1 2P77 F1 2P80 F1 2P81 F1 2P82 F1 2Q60 D2 2Q61 D2 2Q62 D2 2Q67 D3 2Q68 E2 2Q76 E4 2Q85 E4 2Q86 D4 2Q91 F4 2Q92 F3 2T01 A1 2T02 A1 2T04 A1 2T05 A1 2T06 A1 2T07 A1 2T08 A2 2T09 A1 2T10 A1 2T11 A1 2T12 A1 2T13 A1 2T14 A1 2T15 A1 2T16 A1 2T17 A1 2T18 A2 2T19 A1 2T20 A1 2T21 A1 2T23 A1 2T24 A1 2T25 A1 2T27 A1 2T28 A1 2T30 A1 2T31 B1 2T32 B1 2T33 B1 2T34 B1 2T35 A1 2T43 A1 2T45 A1 2T48 A1 2T51 A1 2T53 A1 2T55 A2 2T56 A2 2T58 A1 2T98 A1 2TG0 B1 2TG1 A1 2TG2 A1 2TG3 A1 2TG4 B1 2TG5 A1 2TG6 B1 2TG7 A1 2TG8 B1 2TG9 B1 2TJ0 A1 2TJ1 A1 2TJ2 A1 2TJ3 B1 2TJ4 A1 2TJ5 A1 2TJ6 A1 2TJ7 A1 2TJ8 A1 2TJ9 A1 2TK0 A1 2TK1 A1 2TK2 A1 2TK3 A1 2TK4 B1 2TK5 A1 2TK6 A1 2TK7 A1 2TK8 A1 2TK9 A1 2TL0 A1 2TL7 A1 2TL9 B1 2TM2 A1 2TM3 A1 2TM4 A1 2TM5 A1

2TM7 A1 2TM8 A1 2TN0 B1 2TN1 A1 2TN3 A1 2TN4 B1 2U08 G2 2U09 G3 2U10 G3 2U11 G3 2U12 G2 2U13 G3 2U14 G2 2U15 G3 2U16 G3 2U18 G3 2U19 G3 2U20 G3 2U21 G3 2U23 G3 2U26 G3 2U31 G3 2U32 G3 2U33 G4 2U37 G2 2U38 G3 2U39 G4 2U40 G3 2U41 G3 2U43 G2 2U44 G2 2U47 G3 2U55 G3 2U60 F2 2U61 F2 2U63 F2 2U64 F2 2U65 F3 2U66 F3 2U71 G4 2U72 G3 2U73 G3 2U85 G3 2V00 E3 2V01 D3 2V16 D3 2V17 D3 2V18 E3 2V19 D4 2V20 D3 2V21 E4 2V22 E3 2V23 D3 2V24 E3 2V25 E4 2V26 D3 2V27 D3 2V28 E3 2V29 E3 2V30 D3 2V31 E3 2V39 E3 2V40 E3 2V41 E4 2Z20 E1 2Z22 E1 2Z26 E1 2Z28 E1 3A03 A4 3A07 B3 3A08 B3 3A09 B3 3A10 B3 3A11 B3 3A12 B3 3A14 B2 3A20 A2 3A21 A2 3A22 A2 3A23 A2 3A24 B2 3A25 B2 3A26 A2 3A27 A2 3A29 A2 3A30 A2 3A37 A2 3A38 A2 3A41 A2 3A42 B2 3A43 A2 3A44 B2 3A45 B2 3A56 A2 3A59 A2 3A60 A3 3A61 A3 3A62 A2 3A63 A2 3A64 A2 3A65 A2 3A67 A2 3A68 A2 3A69 A2 3A71 A2 3A72 A2

3A73 3A74 3A75 3A76 3A77 3A80 3A81 3A82 3A83 3A84 3A85 3A86 3AA3 3B00 3B01 3B02 3B03 3B04 3B05 3B06 3B07 3B08 3B23 3B40 3B60 3B61 3B90 3B92 3B93 3B99 3C30 3C32 3C34 3C39 3C40 3C41 3C45 3C50 3C53 3C55 3C56 3C57 3C58 3C59 3C60 3C61 3C65 3C66 3C67 3C71 3G08 3G09 3G10 3G11 3G15 3G16 3G17 3G18 3G57 3G58 3G59 3G60 3G77 3G78 3H04 3H05 3H24 3H25 3H26 3H40 3H41 3H50 3H51 3H89 3H92 3J02 3J05 3J06 3J14 3J25 3J26 3J28 3J49 3J60 3J61 3J62 3J63 3J64 3J65 3J66 3J67 3J68 3J69 3J70 3J71 3J72 3J73 3J74 3J75 3J76 3J77 3J86 3J92 3J99 3L06 3L50

A2 A2 A2 A2 A4 B2 B2 B2 B2 B2 B2 B4 A4 C1 C1 C1 C1 C1 C1 C1 C1 C1 C1 B1 C1 B1 B1 B1 B1 B1 A3 A3 A3 B3 B3 B3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 F4 F4 F4 F4 F4 F4 F4 F4 F4 F4 F4 F4 F3 F3 E2 E2 D2 D2 D2 D3 D3 D2 D3 D3 E2 C3 C3 C2 C2 C4 C4 C4 C4 B4 B4 B4 B4 B4 B4 B4 B4 B4 B3 B4 B4 B3 B3 B4 B3 B3 B3 C4 C4 C4 C2 B3

3L51 3L52 3L56 3L57 3L58 3L59 3L60 3L61 3L62 3L63 3L64 3L65 3L66 3L67 3L68 3L69 3L70 3L71 3L89 3L99 3LA9 3LE1 3LG2 3LH2 3LH7 3LK9 3LM0 3LM1 3LM2 3LM3 3LM4 3LM5 3LM6 3LM7 3LN0 3LN1 3LN2 3LN3 3LN4 3LN5 3LN6 3LN7 3LQ6 3LR0 3LR1 3LR3 3LR4 3LR5 3LR6 3LR7 3LR8 3LR9 3LS0 3LS1 3LS3 3LS4 3LS5 3LS6 3LS7 3LT3 3LT4 3LT5 3LT6 3LT7 3LT8 3LU4 3LU5 3LU6 3LU7 3LU8 3LU9 3LV0 3LV1 3LV2 3LV3 3LV4 3LV5 3LV6 3LV7 3LV8 3M00 3M01 3M02 3M03 3M04 3M05 3M09 3M14 3M70 3M71 3M72 3M73 3M74 3M75 3M76 3M77 3M78 3M79 3M80 3M81 3M82 3M85 3M86 3N20 3N25 3P10

C4 B3 B3 B3 B3 B3 B3 B3 B3 C3 C3 C3 C3 C3 C3 C3 C3 C3 B3 C3 C2 C2 C2 C2 C2 C2 B2 B1 B2 B1 B2 B1 B1 B2 C1 C2 C2 C2 C2 C2 C2 C2 C2 C2 C2 C2 C2 C2 C2 C2 C2 C2 C2 C2 B1 B1 B1 B1 B1 B4 B4 B4 B4 B4 B4 C3 C3 C3 C3 C3 C4 C4 C4 C4 C4 C4 C4 C4 C4 C4 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 B2 A2 B2 A2 A2 B2 A2 B2 B2 B2 B1 B1 C1 C1 G1

3P11 3P12 3P13 3P14 3P15 3P16 3P17 3P18 3P19 3P20 3P21 3P22 3P23 3P24 3P25 3P26 3P27 3P28 3P29 3P30 3P31 3P32 3P33 3P35 3P36 3P37 3P38 3P40 3P43 3P45 3P50 3P51 3P52 3P53 3P57 3P60 3P61 3P62 3P63 3P73 3P74 3P75 3P76 3P77 3P78 3P79 3P80 3P81 3P82 3P83 3P84 3P85 3P86 3P88 3Q01 3Q02 3Q10 3Q16 3Q20 3Q21 3Q23 3Q24 3Q29 3Q30 3Q31 3Q32 3Q42 3Q62 3Q64 3Q95 3Q97 3Q98 3T02 3T03 3T04 3T05 3T06 3T07 3T08 3T09 3T10 3T11 3T12 3T13 3T14 3T15 3T16 3T17 3T18 3T19 3T20 3T21 3T22 3T23 3T24 3T25 3T26 3TG2 3TG3 3TG4 3TG5 3TG6 3TG8 3TG9 3TH0 3TH3

G1 F1 G1 G1 G1 G1 G1 G1 G1 G1 F2 F2 F2 F2 F2 F2 G2 G2 G2 G2 G2 F1 G1 F1 F1 F1 F1 F1 G1 F1 G1 G1 G1 G1 F1 F2 F2 G1 G1 F1 G1 G1 F1 F1 F1 F1 F1 F1 F1 F1 F1 F2 F2 F1 E2 F4 F2 D4 D3 D3 D3 D3 E4 E4 F3 F3 D4 E1 E2 E4 F3 F3 A1 A1 A1 A1 A1 A1 A1 B1 A1 A1 B1 B1 B1 A1 A1 A1 A1 B1 B1 B1 B1 B1 B1 A1 B1 A1 A1 A1 A1 A1 B1 B1 A1 A1

3TH4 3TH5 3TH6 3TH7 3TH9 3TJ0 3TJ1 3TJ2 3TJ3 3TJ4 3TJ5 3TJ6 3TJ7 3U00 3U01 3U02 3U03 3U04 3U05 3U06 3U07 3U08 3U09 3U10 3U11 3U12 3U13 3U14 3U15 3U16 3U17 3U18 3U19 3U22 3U23 3U24 3U26 3U27 3U28 3U29 3U30 3U31 3U32 3U33 3U34 3U35 3U36 3U37 3U38 3U39 3U41 3U42 3U43 3U45 3U46 3U52 3U53 3U54 3U55 3U56 3U57 3U60 3U61 3U62 3U63 3U64 3U65 3U66 3U67 3U68 3U69 3U70 3U71 3U72 3U73 3U74 3U75 3U76 3U77 3U80 3U82 3U83 3U85 3U86 3U87 3U88 3U89 3U90 3U91 3U92 3U93 3U94 3U95 3U96 3U97 3U98 3U99 3UA1 3UA2 3UA3 3UA4 3UA5 3UA6 3UA8 3UA9 3V00

A1 A1 B1 B1 A1 B1 B1 A1 B1 A1 A1 B1 B1 G3 G3 G3 G3 G3 G3 G3 G3 G3 G2 G3 G3 G3 G3 G3 G3 G3 G3 G3 G2 G3 G3 G3 G3 G3 G3 G3 G3 G3 G3 G3 G4 G4 G3 G3 G3 G2 G3 G3 G4 G3 G3 G4 G4 G2 G2 G2 G2 G2 G2 G3 G3 G3 G3 G3 G3 G3 G3 G3 G3 F2 F2 F2 F2 F2 F2 G3 G3 G3 G2 G2 G2 G2 G2 F3 F3 F3 G2 G2 G2 G3 G3 F3 F2 G3 G3 G3 G3 G3 G2 G4 G4 E3

3V01 3V02 3V03 3V04 3V05 3V06 3V07 3V08 3V09 3V10 3V11 3V12 3V13 3V14 3V15 3V16 3V17 3V18 3V19 3V20 3V21 3V22 3V23 3V32 3V33 3V34 3V35 3V36 3V37 3V38 3V39 3V40 3V41 3V42 3V43 3V47 3V48 3Z00 3Z10 3Z11 3Z47 3Z48 3Z53 5A01 5A02 5A03 5A04 5A05 5A08 5A10 5B00 5B02 5B20 5C01 5C03 5C33 5C35 5C36 5C57 5H02 5H03 5H04 5H05 5J08 5J09 5J13 5J15 5J16 5P02 5P08 5Q06 5Q07 5Q08 5Q11 5Q12 5Q13 5T10 5T11 5T42 5T44 5T45 5T46 5T47 5T48 5T49 5T50 5T51 5T53 5T55 5TG0 5TG1 5TG2 5TG3 5TG4 5TG5 5TG6 5TG7 5TG8 5U10 5U11 5U12 5U13 5U14 6A00 6A01 6A10

D3 E3 D3 E3 D3 E3 D3 E3 D3 E3 D3 E3 D3 E3 D3 E3 D3 E3 E3 E3 D3 E3 E3 E3 D3 E3 E3 E3 D3 E3 E3 E3 D3 E3 D3 E3 E3 E1 E1 E1 E1 E1 D1 A4 A4 A4 A4 A4 B4 B4 C1 C1 B1 B3 B3 A3 B3 B3 A3 D3 D3 D3 D2 B4 B4 C2 B4 B4 F1 F1 E2 D2 D2 D4 D4 D4 A1 B1 A2 A1 A1 A1 A1 A1 A1 A1 A1 A1 A2 A1 A1 A1 A1 A1 A1 A1 B1 A1 G4 G4 G4 G4 G4 A2 A2 A4

6B22 6B23 6C51 6C52 6C59 6H07 6H08 6H09 6J01 6J06 6L00 6L01 6L02 6M10 6M11 6P00 6U00 6U01 6U12 6U17 6U21 6U22 6U23 7A01 7A02 7A04 7A06 7A10 7A12 7A13 7A14 7A20 7A21 7B00 7B01 7B02 7B11 7B30 7B31 7B38 7C31 7C53 7C54 7C55 7G04 7H01 7H02 7J00 7J06 7J07 7J08 7J10 7J11 7J12 7J13 7LA2 7LB0 7LB1 7LB2 7LB4 7LB5 7M01 7M03 7M04 7M05 7M06 7M07 7M10 7M11 7M12 7N00 7O00 7P00 7P03 7P10 7P13 7P14 7P15 7P16 7P17 7P18 7P31 7P32 7P34 7P74 7P76 7P77 7P80 7P81 7Q01 7Q05 7T00 7T10 7T11 7T12 7T41 7T43 7TG0 7TG1 7TG3 7TG4 7U00 7U05 7U07 7U10 7U11

B1 B1 A3 A3 A3 C3 D3 D3 C4 C4 C4 C4 C3 A2 A2 F1 G2 G2 G3 G3 G3 G4 G4 B4 B3 A2 B2 A2 A2 B3 B2 B4 B4 C1 C1 C1 B1 B1 B1 B1 A3 A3 A3 A3 F4 F4 D3 C2 C4 C4 C2 B4 B4 B3 B4 B1 C4 C4 C3 B4 B4 A2 A2 A2 B2 A1 A2 A2 A2 A2 C1 D1 F1 G1 G2 F2 F1 F1 F1 F1 F1 F2 G1 G2 G1 F1 F1 F1 F1 D3 F3 A2 B1 A1 B1 A1 A1 B1 A1 A1 A1 G3 G3 G4 G3 G3

7U13 7U14 7U15 7U17 7U18 7U19 7U20 7U21 7U22 7U24 7U27 7U28 7U29 7V00 7Z00 7Z02 7Z10 7Z11 7Z12 9A08 9A19 9A29 9A75 9A77 9A78 9A79 9A82 9A83 9A86 9A90 9B03 9B30 9B31 9B38 9C46 9C50 9C51 9C52 9C53 9C54 9C56 9C57 9C58 9C59 9C60 9C61 9H14 9H40 9J18 9J20 9J21 9LA5 9M00 9M01 9M02 9M04 9M05 9M06 9P01 9P05 9P06 9P07 9P08 9P09 9P10 9P16 9P17 9P18 9P19 9P30 9P31 9P32 9P33 9P34 9P35 9P36 9P37 9P38 9P39 9P40 9P41 9P42 9P45 9P46 9P47 9P48 9P49 9P50 9P51 9P52 9P53 9P54 9P55 9P56 9P79 9Q13 9Q14 9Q15 9Q16 9Q17 9Q18 9Q20 9Q62 9Q63 9T04 9T10

G2 G4 G2 G3 G3 G3 F2 F2 F2 G2 G4 G4 G3 E3 E1 E1 D1 D1 D1 A4 A4 A4 B4 B4 B4 B3 A2 A2 B2 B2 C1 B1 B1 B1 B4 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 E2 D3 C4 B3 B3 B1 A2 B2 B1 B1 B2 A2 F1 F1 F1 F1 F1 F1 G1 F1 F1 F1 F2 G1 G1 G1 F2 F2 G1 F2 F2 F1 F1 F1 F1 F1 F1 F1 F1 F1 F1 F1 F1 F1 F1 F1 F1 F1 F1 D3 D3 D3 D3 D3 C3 E4 F3 F3 A1 B1

9T11 9TG2 9TG3 9U01 9U02 9U03 9U07 9U13 9U14 9U15 9U16 9Z47

B1 A1 A1 F3 F3 G3 F3 F2 F2 F3 F2 E1

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 69

Layout SSB (Top Side Part 1)

Part 1

G_16290_050a.eps 270106

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 70

Layout SSB (Top Side Part 2)

Part 2

G_16290_050b.eps 270106

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 71

Layout SSB (Overview Bottom Side)

Part 1 G_16290_051a.eps

Part 2 G_16290_051b.eps

3104 313 6095.3

G_16290_051.eps 270106

1A10 1T01 1T11 1U02 2A01 2A02 2A10 2A11 2A12 2A13 2A14 2A15 2A16 2A17 2A18 2A20 2A21 2A26 2A27 2A30 2A31 2A32 2A33 2A34 2A35 2A38 2A39 2A40 2A41 2A43 2A44 2A45 2A51 2A55 2A60 2A61 2A62 2A63 2A64 2A65 2A66 2A67 2A68 2A69 2A71 2A73 2A76 2A97 2B12 2B13 2B14 2B15 2B16 2B17 2B18 2B19 2B20 2B21 2B22 2B23 2B24 2B25 2B35 2B36 2B37 2B38 2B39 2B45 2B50 2B51 2B52 2B55 2B56 2B57 2B58 2B59 2B60 2B61 2B62 2B63 2B64 2B65 2B66 2B67 2B68 2B69 2B70 2B71 2B72 2B75 2B76 2B77 2B78 2B79 2B80 2D11 2D19 2D26 2D27 2D30 2D31 2D35 2D36 2D38 2D45 2D46 2D47 2D48 2D49

A3 A3 A2 E2 A3 A3 A4 A4 A4 A4 A4 A4 A4 A4 A4 A4 A4 A4 A4 A4 A4 A3 A3 A3 A4 A4 A4 A4 A4 A4 A4 A4 A4 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A4 A4 A4 A4 A2 A2 A2 A2 A2 A2 A1 A1 A2 A2 A2 A2 A1 A1 A1 A1 A1 A1 A1 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 F2 F1 E1 F1 E1 F1 E1 F1 F1 E1 F1 E1 E1 F1

2D50 2D51 2D55 2D63 2D64 2D65 2D66 2D70 2D71 2D72 2G35 2H07 2H10 2H11 2H12 2J40 2J41 2J42 2J43 2J44 2J45 2J46 2J47 2J48 2J49 2J72 2J73 2J77 2L50 2L51 2L52 2L53 2L54 2L55 2L56 2L57 2LA2 2LT0 2M10 2M11 2M12 2M13 2M14 2M15 2M17 2P35 2P80 2P81 2T10 2T11 2T12 2T13 2T14 2T15 2T16 2T17 2T18 2T19 2T20 2T21 2T22 2T23 2T24 2T25 2T26 2T27 2T30 2T31 2T37 2T39 2T40 2T41 2T42 2T43 2T45 2T46 2T47 2T48 2T49 2T50 2T52 2T53 2T54 2T60 2T61 2T65 2T66 2T67 2U09 2U10 2U11 2U12 2U13 2U14 2U15 2U16 2U18 2U19 2U20 2U21 2U23 2U26 2U31 2U32 2U37 2U41 2U52 2U60 2U63

F1 F2 F1 E2 E2 E2 E2 F2 E1 F2 E4 D1 D3 D3 D3 C4 C4 C4 C4 C4 C4 C4 C4 C4 C4 C4 C4 E3 B3 B3 B3 B3 B3 B4 B3 B3 C2 B3 F4 F4 F4 F4 F4 F4 F4 E1 C1 D1 A1 A1 A2 A1 A1 A2 A3 A3 A1 A3 A3 A3 A3 A2 A1 A1 A2 A1 A3 A3 A3 A3 A3 A3 A2 A2 A3 A2 A3 A3 A2 A2 A2 A2 A2 A2 A2 A3 A3 A3 F2 F3 F3 F2 F3 F2 F3 F3 F3 F3 F3 F3 F3 F3 F2 F3 F2 E2 E4 E2 E2

2U64 2U65 2U66 2U72 2U73 2U85 2V00 2V01 2V16 2V17 2V18 2V20 2V21 2V22 2V23 2V24 2V25 2V26 2V27 2V28 2V29 2V30 2V31 3999 3A04 3A10 3A11 3A12 3A13 3A14 3A15 3A16 3A17 3A18 3A19 3A23 3A24 3A25 3A26 3A27 3A28 3A29 3A33 3A34 3A35 3A60 3A61 3A62 3A63 3B50 3B51 3B52 3B53 3B54 3B55 3B56 3B57 3B58 3B59 3B60 3B61 3B62 3B65 3B66 3B67 3B68 3B69 3B70 3B71 3B72 3B73 3B74 3B75 3B76 3B80 3B81 3B82 3B83 3B84 3B85 3B86 3B87 3B88 3B89 3D10 3D12 3D13 3D14 3D15 3D16 3D17 3D18 3D19 3D20 3D21 3D22 3D23 3D24 3D25 3D26 3D34 3D35 3D37 3D38 3D39 3D40 3D42 3D43 3D44

E2 E2 E2 F3 F3 F3 D3 C3 C3 C3 D3 D3 D4 D3 C3 D3 D4 C3 C3 D3 D3 D3 D3 F3 A4 A4 A4 A4 A4 A4 A4 A4 A3 A4 A4 A4 A4 A4 A4 A3 A3 A3 A3 A3 A4 A4 A4 A4 A4 A2 A2 A2 A1 A2 A1 A1 A1 A2 A1 A1 A1 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A1 A2 A1 A1 A1 A1 A1 A1 A1 A2 F2 E2 F2 F2 E2 E2 F2 F2 E2 E2 F2 E2 F2 E2 F2 F2 E1 E1 F1 F1 E1 F1 F2 F1 E1

3D45 3D49 3D50 3D51 3D54 3D56 3D57 3D58 3D64 3D65 3D67 3D68 3D69 3D70 3D71 3D72 3D73 3D74 3D75 3D76 3D77 3D78 3D79 3D81 3D82 3D83 3D84 3D85 3D86 3D87 3D88 3D89 3D90 3D91 3H04 3H05 3H52 3H53 3H71 3H90 3H97 3I69 3J15 3J16 3J17 3J18 3J19 3J20 3J21 3J22 3L00 3L01 3L02 3L03 3L21 3L22 3L50 3L51 3L52 3L56 3L57 3L58 3L59 3L60 3L61 3L62 3L63 3L64 3L65 3L66 3L67 3L68 3L69 3L70 3L71 3L75 3L76 3L83 3L85 3L89 3L99 3LA0 3LA2 3LA3 3LA4 3LA5 3LA7 3LA9 3LB7 3LB8 3LB9 3LC9 3LD2 3LE1 3LG2 3LH2 3LH7 3LK9 3LL3 3LL8 3LL9 3LM0 3LM2 3LM3 3LM4 3LM5 3LM7 3LN0 3LN1

F1 F1 E1 F1 F1 E1 F1 F1 E1 F1 E1 E1 F1 F1 E1 F1 E1 F1 F2 E1 E1 F1 F1 E1 F2 F2 F2 F2 F2 F2 F2 F1 E2 E2 D1 D1 D3 D3 C3 C3 E3 E1 E4 E4 E4 E4 E3 E4 E4 E4 B3 B3 B4 B3 B3 B3 B3 B4 B3 B3 B3 B3 B3 B3 B3 B3 B3 C3 B3 C3 B3 C3 B3 C3 B4 B1 B1 C2 C1 B4 B3 B2 B2 B2 B2 B2 B1 B2 C2 C2 C2 B2 B2 C2 C2 C2 C2 C2 C2 C2 C2 B2 B2 B2 B2 B2 B2 B2 B2

3LN2 3LN3 3LN4 3LN5 3LN6 3LN7 3LQ6 3LR3 3LR4 3LU7 3LU8 3LV7 3LV8 3M04 3P57 3P80 3P81 3P82 3P83 3P84 3P85 3P86 3P88 3Q12 3Q13 3Q17 3Q27 3T10 3T15 3T18 3T20 3T21 3T22 3T23 3T25 3T27 3T28 3T29 3T31 3T35 3T36 3T37 3T38 3T39 3T40 3T41 3T43 3T44 3T48 3T51 3T52 3T53 3T54 3T55 3T56 3T57 3T58 3U00 3U01 3U02 3U03 3U04 3U05 3U06 3U07 3U08 3U09 3U10 3U11 3U12 3U13 3U14 3U15 3U16 3U17 3U18 3U19 3U22 3U23 3U24 3U26 3U27 3U28 3U29 3U30 3U31 3U32 3U33 3U37 3U38 3U54 3U55 3U56 3U72 3U73 3U74 3U75 3U76 3U77 3U82 3U83 3U85 3U86 3U87 3U88 3U89 3U90 3U91 3U92

B2 C2 C2 C2 C2 C2 C2 B2 B2 C2 C2 C2 C2 F4 E1 D1 D1 D1 E1 E1 E1 E1 E1 D1 D1 D1 C1 A1 A2 A2 A1 A2 A2 A2 A2 A2 A2 A2 A3 A3 A3 A3 A3 A3 A2 A3 A2 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 F2 F2 F3 F2 F2 F3 F3 F3 F3 F2 F2 F3 F3 F3 F3 F3 F3 F3 F3 F2 F3 F3 F3 F3 F3 F3 F3 F3 F3 F3 F3 F2 F2 F2 F2 F2 E2 E2 E2 E2 E2 E2 F3 F3 F2 F2 F2 F2 F2 E3 E3 E2

3U93 3U94 3U95 3U96 3U97 3U98 3U99 3UA1 3UA2 3UA3 3UA4 3UA5 3UA8 3UA9 3V00 3V01 3V02 3V03 3V04 3V05 3V06 3V07 3V08 3V09 3V10 3V11 3V12 3V13 3V14 3V15 3V16 3V17 3V18 3V19 3V20 3V21 3V22 3V23 3V24 3V25 3V32 3V33 3V34 3V35 3V36 3V37 3V38 3V39 3V40 3V41 3V42 3V43 5A11 5A12 5A13 5A14 5A15 5A18 5A64 5A65 5B10 5B65 5B67 5B69 5B71 5B73 5B75 5D16 5M02 5M09 5M10 5M11 5M12 5T11 6A11 6D10 6D11 6H01 6H03 6H07 6J07 6J08 6U11 6U21 6U22 6U23 6U25 7A08 7A10 7A11 7A14 7A15 7A16 7A20 7B45 7B50 7D10 7D11 7D12 7D14 7D15 7D16 7D17 7D19 7D20 7D21 7D22 7D24 7D25

F2 F2 F2 F3 F3 E3 E2 F3 F3 F3 F3 F3 F3 F3 D3 C3 D3 C3 D3 C3 D3 C3 D3 C3 D3 C3 D3 C3 D3 C3 D3 D3 D3 D3 D3 D3 D3 D3 D3 D3 D3 D3 D3 D3 D3 D3 D3 D3 D3 D3 D3 C3 A3 A4 A4 A4 A4 A2 A4 A4 A2 A2 A2 A2 A2 A2 A2 F1 F4 F4 F4 F4 F4 A1 A4 E2 E2 E3 E3 D4 B4 B4 F2 F3 F3 F3 F4 A4 A4 A3 A3 A3 A3 A4 A2 A1 F2 E2 F2 E1 E1 E1 E1 F1 F1 F1 F1 F1 F2

7D26 7D30 7D31 7J00 7J01 7J02 7J05 7J06 7P15 7P16 7P17 7T10 7T12 7T13 7T22 7T23 7U00 7U05 7U07 7U10 7U13 7U15 7U20 7U21 7U22 7U27 7U28 7U29 7V00 9A01 9A02 9A10 9A15 9A19 9B38 9B50 9B51 9B52 9B53 9B54 9D03 9D04 9D48 9H03 9H04 9H07 9H08 9H13 9H16 9J21 9J23 9LA0 9LA1 9LA2 9P24 9P25 9T10 9T11 9T12 9T13 9U01 9U02 9U03 9U07 9U13 9U14 9U15 9U16

F2 E2 F2 C2 B3 B3 E4 E3 E1 E1 E1 A1 A2 A3 A3 A3 F3 F3 F3 F3 F2 F2 E2 E2 E2 F3 F4 F3 D2 A3 B3 A4 A4 A3 A2 A2 A2 A2 A2 A1 E1 F1 F1 C3 C3 C3 C3 C3 C3 E4 C2 B2 B2 B2 B4 B4 A3 A3 A3 A3 E2 E2 F3 E2 E2 E2 E2 E2

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 72

Layout SSB (Bottom Side Part 1)

Part 1

G_16290_051a.eps 270106

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 73

Layout SSB (Bottom Side Part 2)

Part 2

G_16290_051b.eps 270106

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 74

Side I/O Panel: (42” & 50”)

D

2

3

5

4

SIDE I/O (37”, 42”, & 50”)

6

7

D

1

F002

TO 1H01

1 2 3 4

3004

5 I009 6003

F003

1 2 3 4

9012 9013

B4B-PH-K

1005

6

F014

F015

1050

F017

F016

5

DLW31S

5

6

1 2 3 4

USB CONNECTOR

TO 1M36

1 1002-1 YELLOW

1M36

2

GND_AUD

9003

1u0

RES 2003

C

13

2007

33K

3013

D

PDZ6.8-B

6007

1M65

5

4

1 2 3

GND_AUD

F007 1109

F024

E

GNDB

GNDB

E

I008

F025

10n

2011

9010 I014

10K

3020

PDZ6.8-B

F019

GNDB

GNDB

GNDB

I006 9006

10n

2009

10K

3016

9008

I011

I013 GNDB 6009

F018

F

3999

9007

150R

I012

GNDB

PDZ6.8-B

GNDB

PDZ6.8-B

1110

22n

2008

GNDB

I005

6008

GNDB

GND_AUD

F010

F011

GNDB

G_16290_055.eps 010206

3104 313 6137.1 1

2

3

4

5

1M36 B8 1M37 B8 1M60 A5 1M65 D8 2003 C5 2004 C3 2005 C4 2006 D3 2007 D4 2008 F2 2009 F5 2010 E2

6

7

8

9

F005 C2 F006 D2 F008 E2 F009 E2 F010 F8 F011 F9 F012 A6 F013 A7 F014 A6 F015 A7 F016 A6 F017 A7 F018 F7 F019 F2 F020 B4 F021 C6 F022 C6 F023 C6 F024 E6 F025 E6 I001 C2 I002 C3 I003 D2 I004 A3 I005 F4 I006 F4 I007 E4 I008 E4 I009 B3

3012 D4 3013 D4 3016 F5

I010 D3 I011 F7 I012 F8

3020 E5 3999 F9 5000 A6 6000 A3

I013 F3 I014 E3

6001 A3 6002 B3 6003 B3 6004 C3 6005 C3 6006 D3

6010 E3 6011 F3 9003 C6

GNDB

9009

F

F007 E2

6007 D3 6008 F3 6009 F3

GNDB

GNDB

6011

F009

I007 6010

PDZ6.8-B

3 7 8 1

F008

1111

5 4 2

22n

1010

2010

9011

1102 B3 1106 C3 1108 D3

3008 C5 3009 C4 3010 C4 3011 C5

SSB JAGUAR

GND_AUD

9013 A6 F001 A2 F002 A2 F003 B2 F004 C2

3000 A4 3004 B3

I010 GND_AUD

9012 A6

1002-1 B1 1002-2 C1 1002-3 D1 1005 A8 1010 E1 1050 A7 1101 A3

2011 E5 2012 A7

SCART 3 EMGT OR B11B-PH-SM4-TBT(LF) TO 1M36

GNDB

3012

2006

I003

D

SSB EMGT OR TO 1M36

1K0

PDZ6.8-B

9

6006

8

1108

9005

7

680p

F006

1002-3 RED

GND_AUD

F023

1 2 3 4 5 6 7 8 9 10 11 12

100p

6005

GND_AUD

PDZ6.8-B

I001

3K9

I002

2K2

9004

6

3008

100p

2005

33K

F021

3011

5

3010

F005

680p

C

1K0 2004

GND_AUD

PDZ6.8-B

1106

F004

6004

4 1002-2 WHITE

1 2 3 4 5 6 7 8 9 10 11

F022

3009

1M37

1001 B2

1109 E3 1110 F3 1111 E3 1112 A7 1H01 A6

B

PDZ6.8-B

B

A

75R

PDZ6.8-B

6002

1102

VIPER

2012

1H01

1M60

F020

1001

F013

1112

75R

3000

I004 PDZ6.8-B

3

5000 220R

6001

4

2

PDZ6.8-B

1101

Y / CVBS

A

6000

F001

9

JAGUAR ONLY F012

C

8

100u 6.3V

1

9004 C2 9005 D2 9006 F7 9007 F8 9008 F4 9009 F4 9010 E4 9011 E4

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 75

Layout Side I/O Panel: (42” & 50”) (Top Side)

Layout Side I/O Panel: (42” & 50”) (Bottom Side)

1001 1002 1005 1010 1050 1H01 1M36 1M37 1M60 1M65 2012 5000

3104 313 6137.1

G_16290_056.eps 300106

2003 2004 2005 2006 2007 2008 2009 2010 2011 3000 3004 3008 3009 3010 3011 3012 3013 3016 3020 3999 6000 6001 6002 6003 6004 6005 6006 6007 6008 6009 6010 6011 9003 9004 9005 9006 9007 9008 9009 9010 9011 9012 9013

B1 A1 A1 A1 A1 A1 B1 B1 A1 A1 A1 A1

3104 313 6137.1

G_16290_057.eps 300106

A1 A1 A1 A1 A1 A1 A1 A1 A1 B1 B1 A1 A1 A1 A1 A1 A1 A1 A1 B1 B1 B1 B1 B1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 B1 A1 A1 A1 A1 A1 A1

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 76

Control Panel (42” & 50”) 1701 A1 1702 A1 1703 A2

1704 A2 1705 A1 1706 A3

1M01 A4 3002 C2 3003 C2

3007 C1 3008 C1 3009 C2

3004 C1 3005 C1 3006 C1

1

3999 C4 9001 C3 9002 C1

9003 C2 F001 A4 F002 A4

2

F003 C4 F004 C4 I006 C1

I007 C1 I008 C1 I009 C2

I010 C2 I100 B1 I101 B1

3

I102 B1 I103 B2 I104 B2

Personal Notes:

4

CONTROL BOARD

E

I105 B3

E To 1M01

1M01 KEYBOARD

F001

LED PANEL

F002

1 2 3

A

OR TO 1K02

A

*

I009

SKQNAB

OR TO 1M01

ON / OFF

1706

SKQNAB

CHANNEL+ 1703

SKQNAB

1704 CHANNEL-

SKQNAB

*

I008

I104

3002

*

I007

I103

3003

*

3004

MENU

1705

SKQNAB

I102

I006

EXTERNALS

B

I105

*

I010

9001

*

9003

*

3009

*

3008

*

3007

F003 9002

C

1702 VOLUME-

I101

3005

I100

3006

B

VOLUME+

1701

SKQNAB

SSB LC4.x

3999

F004

10K

D

C

D

F_15890_053.eps 071105

3104 313 6129.1

1

2

3

4

E_06532_012.eps 131004

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 77

Layout Control Panel (42” & 50”) (Top Side)

3104 313 6129.1 F_15890_057.eps 071105

Layout Control Panel (42” & 50”) (Bottom Side)

3104 313 6129.1 F_15890_058.eps 071105

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 78

LED Panel (42” ME5FL) 1

2

3

4

5

6

7

8

9

10

11

12

13

14

+8V

A

9121

9120 9064

9012

B

LED2 F038 I053

F039

3999

I062

1 6051 2

OPT_LED

9065

10K SML512BC4T

3061

+5V2-STBY

3062

F016 F018

560R

14

3052

F013 F014

J

0002 EMC HOLE

560R

RC LIGHT-SENSOR

3051

F017

330R

LED1

9017

(RES)

9016

F015

"RED"

+8V

100R

F012

0001 EMC HOLE

+8V

"BLUE" or "GREEN"

COM-SND

+5V2-STBY

KEYBOARD

LED1

9015 3011

F011

+5V2-STBY

1 2 3 4 SSB JL2.x / LC4.x 5 6 OR TO 1M20 7 8 9 10 EXTERNALS 11 FTx2.x / Bx2.x 12 13

B

F010

1M20

TO 1M20

330R

A

STATUS-POWER

LED PANEL

J

9053 7062 BC857B

TO 1M01

7051 BC847BW

I065

10K

3055

100R

10K

3053 9056

10K

9054 I051

RC

8 +5V2-STBY

E

+5V2-STBY

3040 7032 BC847BW BAS316

9070

F

8

4

TEMD5000

6070

7 6 4

8

9122

100u 16V

+8V

I073

7070-2 LM358P

I076

3075 4K7

3073 3K3

3076

1K0

3077

3K3 3072

3K3 2071

2040

I072

10K

I074

BCP53 7031 BLACKLIGHT-TC

5 1 LM358P 7070-1

10u 16V

BC857BW 7030

1K0

4M7

I048

3074 +8V

2 3

3070

1K0

100K 3032 180K

3033

2M2

I040

3078

BAS316 I033 6031

3031

2030

I047

10u 16V

I039

10K

6030

9042

I049

3034 I037

3096

I075

I042 3041

2R2

2R2

3037

3036

4K7

3035 I038

GND TSOP34836YA1

9071

I071

I045

OUT

9040

9031 I011

10K

3091

G

4K7

3030 9093

+8V

STATUS-POWER

330R

I043 VS

"LED DIMMING"

6K8

9043

3042

9041

+5V2-STBY

1040

3071 4M7

10K

10K

+5V2-STBY

7092 BC847BW

+5V2-STBY

COM-SND

3094

I094

I093

10K

I010

470n

3093

F

E

I026

2070

I044

10K

3092

+5V2-STBY

I046

9072

7

I013 9081

F089

9082

I054

LIGHT-SENSOR

I012 F086

D

LIGHT-SENSOR

F084

LIGHT-SENSOR KEYBOARD RC BLACKLIGHT-TC LED1 LED2

LED1

9111 9113 9115 9117

3056

F083

LED1

1 2 3 4 5 6

(RES)

I064

0345 9110 9112 9114 9116 9118 9119

7052 BC847BW

9066

100R

10K

9083

+5V2-STBY

TOP CONTROL

3064

3063

D

I063

7061 BC847BW

LED2

(RES)

9063 I061

3054

I095 6060

2014

9062

5

TO 0345

C

I052

(RES)

4

KEYBOARD

9052

F021

SML512BC4T

1 2 3

100n

CONTROL BOARD

9011

1M01

C

G

I041

"IR RECEIVER"

"LIGHT SENSOR" H

H F_15400_070.eps 090505

3104 313 6074.3 1

2

3

4

5

6

7

8

9

10

11

12

13

14

0001 A10 0002 A11 0345 D2 1040 F9 1M01 C2 1M20 A2 2014 C4 2030 G5 2040 F9 2070 F12 2071 G12 3011 A4 3030 G4 3031 G5 3032 G5 3033 G5 3034 G6 3035 G6 3036 G7 3037 G7 3040 F9 3041 G9 3042 F9 3051 B8 3052 B8 3053 C8 3054 C8 3055 C8 3056 D6 3061 B6 3062 B6 3063 D5 3064 D5 3070 G11 3071 F12 3072 G13 3073 G13 3074 F13 3075 F14 3076 G14 3077 G12 3078 G11 3091 G2 3092 F2 3093 F3 3094 F2 3096 G3 3999 B12 6030 G4 6031 G4 6051 C8 6060 C6 6070 G11 7030 G6 7031 G7 7032 G4 7051 C8 7052 D8 7061 D6 7062 C6 7070-1 F12 7070-2 G13 7092 F2 9011 C6 9012 B4 9015 A4 9016 A4 9017 A4 9031 G4 9040 G9 9041 F9 9042 G9 9043 F9 9052 C9 9053 C8 9054 D9 9056 D7 9062 D7 9063 D6 9064 B7 9065 B7 9066 D7 9070 F11 9071 F11 9072 G11 9081 E4 9082 E3 9083 D3 9093 G2 9110 D2 9111 D4 9112 D2 9113 D4 9114 E2 9115 E4 9116 E2 9117 E4 9118 E2

9119 E2 9120 B10 9121 B11 9122 F11 F010 A3 F011 A3 F012 A3 F013 B3 F014 B3 F015 A3 F016 B3 F017 B3 F018 B2 F021 C3 F038 B12 F039 B12 F083 D3 F084 D3 F086 E3 F089 E3 I010 F2 I011 G2 I012 E3 I013 E4 I026 F12 I033 G4 I037 G7 I038 G6 I039 G4 I040 G5 I041 G9 I042 G9 I043 F9 I044 F9 I045 F9 I046 E9 I047 G4 I048 G5 I049 G7 I051 D8 I052 C8 I053 B9 I054 D7 I061 D6 I062 C6 I063 D7 I064 D5 I065 C9 I071 F11 I072 F14 I073 G12 I074 G12 I075 F12 I076 F13 I093 F2 I094 F3 I095 C6

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 79

Layout LED Panel (42” ME5FL) (Top and Bottom Side) 1040 3031 3032 3033 3055 3056 3070 6030 6031 6051 6060 6070 7030 7031 7052 7062 9011 9031 9054 9056 9066 9110 9112 9114 9116 9118 9119 9120

3104 313 6074.3

0345 1M01 1M20 2014 2030 2040 2070 2071 3011 3030 3034 3035 3036 3037 3040 3041 3042 3051 3052 3053 3054 3061 3062 3063 3064 3071 3072 3073 3074 3075 3076 3077 3078 3091 3092 3093 3094 3096 3999 7032 7051 7061 7070 7092 9012 9015 9016 9017 9040 9041 9042 9043 9052 9053 9062 9063 9064 9065 9070 9071 9072 9081 9082 9083 9093 9111 9113 9115 9117 9121 9122

-----------------------------

F_15400_071.eps 090505

------------------------------------------------------------------------

Personal Notes:

E_06532_012.eps 131004

Circuit Diagrams and PWB Layouts

EP1.1U AA

7.

EN 80

Front IR / LED Panel (42” & 50” ME6) 1870 B1 2801 D4 2802 D4 2803 E3 3801 B3

3802 A4 3803 C4 3804 B3 3805 C4 3807 E2

3808 E3 3809 E4 3810 E4 3811 E4 3812 D4

1

J

4806 E4 4807 E3 4808 D3 4809 D4 6801-1 B4

Layout Front IR / LED Panel (42” & 50” ME6) (Top Side)

2

3

1870 A1

I811 E4

I804 C4 I805 A4 I806 B4 I809 E3 I810 E4

F805 C1 F806 B1 I801 B3 I802 B4 I803 B3

7808 E4 F801 C1 F802 C1 F803 B1 F804 B1

7802 C3 7803 B4 7804 C4 7805 B3 7807 E3

6801-2 B4 6802 E4 6803 C3 6809 D3 7801 B4

6801 A1

7802 A1

7808 A1

4

IR/LED/LIGHT-SENSOR (32”, 37”, & 42”)

J

+3V3STBY

A

A 3802 330R

I805

7805 BC847B

7801 7803 BC857B BC847B

1 2 3 4 5 6

F806

LIGHT-SENDOR-SDM

F804 F805 F802 F801

IR LED_SEL +3V3STBY PC-TV-LED

3804 0R

3801 3K3

F803

B

I802 3

1870

6801-2 GREEN SPR-325MVW

2

TO 1K00 OF SSB BD

C

I803

1

B

2

I801

I806

6801-1 RED SPR-325MVW

+3V3STBY

7804 BC847B

6803 BZX384-C3V9

3805 0R

C

3803 220R

Layout Front IR / LED Panel (42” & 50” ME6) (Bottom Side) 2801 A1 2802 A1 2803 A1

I804

3V5 1 6809 RES

2

7802 VS

2801 10u 6.3V

OUT

6808 (ITV ONLY)

TSAL4400-MS21

7807 RES

4807 A1 4808 A1 4809 A1

4815 A1 6802 A1 6803 A1

6809 A1 7801 A1 7803 A1

7804 A1 7805 A1 7807 A1

3812 220R (ITV ONLY) 3810 RES

7808 BPW34 4806

E

6802

I809

3811 A1 3812 A1 4806 A1

D

I810

3808 RES

3808 A1 3809 A1 3810 A1

+3V3STBY

4808 (ITV ONLY)

+3V3STBY

3804 A1 3805 A1 3807 A1

2802 10u

GND TSOP34836LLIB

D

3801 A1 3802 A1 3803 A1

4809

3V5 3

E

G_16290_065.eps 300106

3139 123 6171.1

I811

3807 RES

RES 2803 1u0

3809 2M2

3811 RES

4807

G_16290_064.eps 300106

3139 123 6171.1

1

2

3

4

3139 123 6171.1

G_16290_066.eps 300106

Alignments

EP1.1U

8.

EN 81

8. Alignments Index of this chapter: 8.1 General Alignment Conditions 8.2 Hardware Alignments 8.3 Software Alignments 8.4 Option Settings

8.1

General Alignment Conditions

8.1.1

Start Conditions Perform all electrical adjustments under the following conditions: • Power supply voltage: 120 VAC / 60 Hz (± 10%). • Connect the set to the AC Power via an isolation transformer with low internal resistance. • Allow the set to warm up for approximately 15 minutes. • Measure voltages and waveforms in relation to chassis ground (with the exception of the voltages on the primary side of the power supply). Caution: It is not allowed to use heatsinks as ground. • Test probe: Ri > 10 Mohm, Ci < 20 pF. • Use an isolated trimmer/screwdriver to perform alignments.

8.1.2

Notes: • All changes must be stored manually. • If an empty EAROM (permanent memory) is detected, all settings are set to pre-programmed default values. 8.3.1

General For the next alignments, supply the following test signals via a video generator to the RF input: NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3). Tuner AGC Purpose: To keep the tuner output signal constant as the input signal amplitude varies. For this chassis, no alignment is necessary, as the AGC alignment is done automatically (standard value: “32”).

8.3.2

White Point • •

Alignment Sequence •

• •

8.2

Software Alignments Put the set in SAM mode (see the "Service Modes, Error Codes and Fault Finding" section). The SAM menu will now appear on the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below.

Initial Settings Perform all electrical adjustments with the following initial settings (via the "Active Control" button on the RC): 1. To avoid the working of the lightsensor, set ACTIVE CONTROL to OFF. 2. Set SMART PICTURE to NATURAL/ECO.

8.1.3

8.3

First, set the correct options: – In SAM, select (SERVICE) OPTIONS -> OPT. NO, – Fill in the option settings according to the set sticker (see also paragraph "Option Settings"), – Select STORE OPTIONS and push OK on the remote control, – After storing, the set must be restarted! Warming up (>10 minutes). White point alignment.

Hardware Alignments For the specific PDP screen alignments, see the

•

Set ACTIVE CONTROL to OFF. In the [MENU] -> PICTURE user menu, set: – DYNAMIC CONTRAST to OFF. – COLOUR ENHANCEMENT to OFF. – COLOUR to "0". – CONTRAST to "100". – BRIGHTNESS to "50". Go to the SAM and select ALIGNMENTS -> WHITE POINT.

Method 1 (with color analyzer): • Use a 100% white screen as input signal and set the following values: – COLOR TEMPERATURE: "Tint to be aligned". – All WHITE POINT values to: "127". – RED BL OFFSET value to: "9". – GREEN BL OFFSET value to: "8". • Measure with a calibrated (phosphor- independent) color analyzer in the centre of the screen. Consequently, the measurement needs to be done in a dark environment. • Adjust, by means of decreasing the value of one or two white points, the correct x,y coordinates (see table "White D alignment values"). Tolerance: dx,dy: ± 0.004. • Repeat this step for the other Color Temperatures that need to be aligned. • When finished press STORE (in the SAM root menu) to store the aligned values to the NVM. • Restore the initial picture settings after the alignments. Table 8-1 White D alignment values Color Temp. (degr. K)

Cool (11000)

Normal (9100)

Warm (6500)

x

0.276

0.285

0.313

y

0.282

0.293

0.329

When such equipment is not available, use “method 2”.

EN 82

8.

Alignments

EP1.1U

Method 2 (without color analyzer): If you do not have a color analyzer, you can use the default values. This is the next best solution. The default values are average values coming from production (statistics). 1. Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM). 2. Set the RED, GREEN and BLUE default values according to the values in the "Tint settings" table. 3. When finished press STORE (in the SAM root menu) to store the aligned values to the NVM. 4. Restore the initial picture settings after the alignments. Table 8-2 Tint settings Colour Temp.

R

G

B

125

120

91

Normal

127

121

74

Warm

124

78

35

Cool

Alignments 8.4

Option Settings

8.4.1

Introduction

8.

EN 83

which ICs to address. The presence / absence of these specific ICs (or functions) is made known via the option codes. Notes: • After changing the option(s), save them via “STORE”. • The new option setting is only active after the TV is switched "off" and "on" again with the Mains switch (the EAROM is then read again).

2

The microprocessor communicates with a large number of I C ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know 8.4.2

EP1.1U

Dealer Options Table 8-3 Dealer options Menu item

Subjects

Options

Description

Personal Options

Picture Mute

On

Picture mute active in case no picture detected

Off

Noise in case of no picture detected

Virgin Mode

On

TV starts up (once) with a language selection menu after the Mains switch is turned "on" for the first time (virgin mode)

Off

TV does not start up (once) with a language selection menu after the Mains switch is turned "on" for the first time (virgin mode)

2CS Korea (only for AP On region) Off

8.4.3

(Service) Options Select the sub menu's to set the initialization codes (options). Table 8-4 Service options Menu-item

Subjects

Options

Description

PIP/DS

Dual Screen

None / 1 tuner / 2 tuners

no DS / DS with one tuner / DS with two tuners

Data Display

Video Repro

Source Selection

Audio Repro

EPG

On / Off

Feature present / not present

RRT

Yes / No

Parental control is enabled via the Regional Rating Table (RRT)

Screen

“Value”

Used screen size, type, and resolution (see table “Display code overview” in chapter “Service Modes”for the values)

Scanning Backlight

On / Off

Feature present / not present

Dimming Backlight

On / Off

Feature present / not present

Picture Processing

Spider / No Spider

Feature present / not present

Combfilter

None / 2D / 3D

Only selectable with Columbus in set: No/without RAM/with RAM

Ambient Light

None / Mono / Stereo

Inverter not present / two inverters mono / two inverters stereo

MOP

On / Off

Feature present / not present (for sets with AmbiLight this is “on”)

HDMI 1

None / Audio / No Audio

No HDMI / HDMI with analog audio / HDMI without analog audio

HDMI 2

None / Audio / No Audio

No HDMI / HDMI with analog audio / HDMI without analog audio

USB version

None / 1.1 / 2.0 + CR

No USB / USB 1.1 in side I/O panel / USB 2.0 in cardreader panel

IEEE1394

Yes / No

Connector present / not present

Ethernet

Yes / No

Connector present / not present

S/PDIF inputs

None / 1 conn. / 2 conn.

None / 1 connector present (in)/ 2 connectors present (in/out)

Subw. Internal Present

Yes / No

Acoustic System (Cabinet design, None used for setting dynamic audio Entry ME5 15W parameters). (Soft) Wrap

Miscellaneous Opt. no.

8.4.4

Internal sub woofer present / not present n.a. e.g. 32/37PF7320A n.a.

Top

e.g. 42PF9830A

Entry+

e.g. 32PF9630A, 42PF9730A

Eco ME5 5W

e.g. 26PF5321D

Eco ME5 15W

e.g. 32/37/42PF5321D

Eco ME6 5W

e.g.

Others

n.a.

Alternative Tuner

Philips / Alps

Tuner brand

Tuner Type

TD1336S

Tuner type

Group 1

xxxxx xxxxx xxxxx xxxxx (see set sticker)

Group 2

xxxxx xxxxx xxxxx xxxxx (see set sticker)

Opt. No. (Option numbers) Select this sub menu to set all options at once (expressed in two long strings of numbers). An option number (or "option byte") represents a number of different options. When you change these numbers directly, you can set all options very quickly. All options are controlled via eight option numbers. When the EAROM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set.

Example: The options sticker gives the following option numbers (depending on the model): • 00016 00006 00033 14979 • 01035 00000 04768 00000 The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicates software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number.

EN 84

8.

EP1.1U

Alignments

Table 8-5 Option code overview Byte Bit (dec. value) Subject

Options

Settings (in decimal values)

Remarks

1

Picture Processing

0= No Spider, 1= Spider

Spider availability, influences, digital options.

Comb Filter

0= None, 8= 2D Comb (Columbus without DRAM), 16= 3D Comb (Columbus with DRAM)

Ambient Light

0= None, 32=Ambi-light Stereo, 64= Ambi-light Mono

Dual Screen

0= None, 256= One Tuner DS, 512= Two Tuner DS

0 (1)

Video Repro

1 (2) 2 (4) 3 (8) 4 (16) 5 (32) 6 (64) 7 (128) 8 (256) 9 (512) 10 (1024)

MOP

0= Off, 1024= On

Matrix Output Processor (or EBILD)

11 (2048)

JOP

0= Off, 2048= On

Jaguar Output Processor (or EBILD) Reserved for future use

12 (4096)

POD

0= Off, 4096= On

13 (8192)

n.a.

14 (16384)

n.a.

15 (32768) 2

0 (1)

n.a. Sound Repro

Acoustic System (Cabinet) 0= None, 1= Entry_ ME5_5W, 2= Entry_ME5_15W, 3= (Soft)Wrap, 4= Top, 5= Entry+, 15= Others

Cabinet design, used for setting dynamic audio parameters.

4 (16)

Aux Headphone Sound

Dual AC3 sound in Aux available.

5 (32)

n.a.

6 (64)

n.a.

7 (128)

n.a.

1 (2) 2 (4) 3 (8)

8 (256)

n.a.

9 (512)

Sub woofer Internal

0= Not Present, 512= Present

10 (1024)

Centre Mode Support

0= Not Supported, 1024= Supported

11 (2048)

n.a.

12 (4096)

n.a.

13 (8192)

n.a.

14 (16384)

n.a.

15 (32768) 3

0= Off, 16= On

0 (1)

n.a. Source Select

HDMI1

0= None, 1= With analog audio, 2= Without analog audio

HDMI2

0= None, 4= With analog audio, 8= Without analog audio

1 (2) 2 (4) 3 (8) 4 (16)

n.a.

5 (32)

USB Version

0= None, 32= USB 1.1, 64= USB 2.0 + Card reader

USB support.

6 (64) 7 (128)

IEEE1394

0= Not Present, 128= Present

8 (256)

Ethernet

0= LAN not present, 256= LAN present

9 (512)

RRT

0= Off, 512= On

10 (1024)

S/PDIF Inputs

0= None, 1024= 1 Connector, 2048= 2 Connectors

12 (4096)

LCOS I/O

0= Not Present, 4096= Present

13 (8192)

n.a.

14 (16384)

n.a.

Regional Rating Table (RRT)

11 (2048)

15 (32768) 4

0 (1)

n.a. Region

Region

0= EU, 1= AP-P, 2= AP-N, 3= US, 4= Latam

Interconnect

China IF

0= Off, 8= On

1 (2) 2 (4) 3 (8) 4 (16)

Alternative Tuner

0= Philips, 16= Alps

Tuner make.

5 (32)

Tuner Type

0= TD1336s (B-Chassis US), 32= TD1331(J-Chassis US), 64= UV1318 (Analogue EU), 96= TD1316 (Hybrid EU)

Tuner type (B-chassis US is e.g "BP2.3U").

AV1

0= CVBS/RGB, 256= CVBS/YC/LR, 512= CVBS/YC/YPbPr/HV/LR

Input type.

AV2

0= CVBS/YC/RGB/P50, 1024= CVBS/YC/LR

Input type.

AV3

0= Not Available, 4096= CVBS, 8192= YPbPr

Input type.

AV4

0= Not Available, 16384= YPbPr

Input type.

6 (64) 7 (128) 8 (256)

Source Select

n.a.

9 (512) 10 (1024) 11 (2048) 12 (4096) 13 (8192) 14 (16384) 15 (32768)

Alignments

EP1.1U

8.

EN 85

Byte Bit (dec. value) Subject

Options

Settings (in decimal values)

Remarks

5

Screen

See table “Display code overview” in chapter “Service Modes”for the values.

Screen size, type, and resolution.

0 (1)

Display

1 (2) 2 (4) 3 (8) 4 (16) 5 (32) 6 (64) 7 (128) 8 (256)

n.a.

9 (512)

n.a.

10 (1024)

Dimming Backlight

0= Off, 1024= On

11 (2048)

Scanning Backlight

0= Off, 2048= On

12 (4096)

n.a.

13 (8192)

n.a.

14 (16384)

n.a.

15 (32768) 6

0 (1)

n.a. Miscellaneous

1 (2) 2 (4)

Stand Alone

3 (8)

n.a.

4 (16)

n.a.

5 (32)

n.a.

6 (64)

Proximity Sensor

7 (128)

n.a.

8 (256)

Touch Pad

9 (512)

n.a.

10 (1024)

n.a.

11 (2048)

n.a.

12 (4096)

n.a.

13 (8192)

n.a.

14 (16384)

n.a.

15 (32768) 7

Monitor

0 (1)

0= Off, 2= On

Reserved for future use

0= Off, 4= On

Reserved for future use

n.a.

0= Off, 64= On

0= Off, 256= On

Reserved for future use

n.a. Personal

Self Learning TV

0= Off, 1= On

Reserved for future use

Auto Store Mode

0= None, 2= PDC/VPS, 4= TXT Page, 6= PDC/VPS/TXT Page

Fixed to: "None" in the AP-N and US versions.

2CS Korea

0= Off, 8= On, 16= Auto

5 (32)

Picture Mute

0= Off, 32= On

6 (64)

n.a.

1 (2) 2 (4) 3 (8) 4 (16)

7 (128)

Virgin Mode

0= Off, 128= On

8 (256)

Hotel Mode

0= Off, 256= On

9 (512)

Content Browser

0= Not Present, 512= Present

10 (1024)

Connected Planet

0= Off, 1024= Full Connected Planet + logo support

11 (2048) 12 (4096)

n.a.

13 (8192)

EPG

0= None, 8192= TXT Guide only, 16384= NextView 2C3, 24576 = NexTView 2

TV Guide USA (Gemstar)

0= Off, 32768= On

14 (16384) 15 (32768) 8

0 (1)

n.a.

n.a.

1 (2)

n.a.

n.a.

2 (4)

n.a.

n.a.

3 (8)

n.a.

n.a.

4 (16)

n.a.

n.a.

5 (32)

n.a.

n.a.

6 (64)

n.a.

n.a.

7 (128)

n.a.

n.a.

8 (256)

n.a.

n.a.

9 (512)

n.a.

n.a.

10 (1024)

n.a.

n.a.

11 (2048)

n.a.

n.a.

12 (4096)

n.a.

n.a.

13 (8192)

n.a.

n.a.

14 (16384)

n.a.

n.a.

15 (32768)

n.a.

n.a.

EN 86

9.

EP1.1U

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9. Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.1

Index of this chapter: 9.1 Introduction 9.2 Abbreviation List 9.3 IC Data Sheets

When the input channel is a digital channel, it is processed via the QAM demodulator and then passed to the multi-media processor (VIPER), which handles the synchronization and display of audio-visual material.

Notes: • Only new circuits (circuits that are not published recently) are described. For other descriptions see the BP2.xU manual (3122 785 15540). • Figures can deviate slightly from the actual situation, due to different set executions. • For a good understanding of the following circuit descriptions, please use the wiring, block (chapter 6) and circuit diagrams (chapter 7). Where necessary, you will find a separate drawing for clarification.

Signal Processing The AVIP together with the MPIF device is used to perform the input decoding of a single stream of analog audio and video broadcast signals. In addition, the AVIP is used for decoding and presentation of audio output streams. The main data connection between MPIF and AVIP is done via an I2D bus. The AVIP converts the incoming video data to ITU-656 format for communication to the VIPER IC. The audio data is transferred between the AVIP and VIPER using I2S. The AVIP IC is controlled by the VIPER via the I2C bus. The key part in the system, the VIPER, performs almost all key features, like video quality enhancement, motion compensation, picture-in-picture processing, and others. It is a completely digital IC with a TriMedia DSP (Digital Signal Processor) core and a MIPS microcontroller core. The DSP and some additional cores are used to do the video feature processing and some auxiliary sound feature processing. The MIPS microcontroller core is used for all internal and external controlling tasks including a system wide I2C bus. The VIPER provides a primary digital (YUV or RGB) output to the LVDS transmitter.

Introduction This chassis is specifically developed for ATSC reception without CableCARDTM, and is in fact derived from the BL2.xU/ BP2.xU chassis. The key components are: • MPIF (PNX3000). • AVIP/COLUMBUS (PNX2015). • VIPER 2 (PNX8550). Some delta’s with respect to the BL2.xU/BP2.xU chassis: • No POD, so only unscrambled ATSC channels. • Audio Amplifier is integrated on the SSB. • I/O’s are integrated on the SSB. • One HDMI connector (i.o. two). • One USB1.1 connector (i.o. USB2.0). • No card reader. • No MOP (EPLD), due to the fact that these sets do not come with AmbiLight.

9.1.1

Features The main features for this chassis are: • The move from the analog world to the digital world. W.o.w. from signal processing via "hardware circuits" to signal processing via "software algorithms". This means: no software = no picture and sound! • Fit for both analog and digital signal processing, this by converting analog signals into digital transport streams and allowing seamless zapping between all possible signal sources. This makes the chassis applicable for e.g. receiving ATSC in an integrated product form. • The internal digital processing allows new "Multi-Media" applications such as Content Browser, Memory Card Slot, Local Area Network support and all kinds of streaming applications. • The chassis can be upgraded in the future with internal functionality such as Personal Video Recording, DVD/RW.

9.1.2

Chassis Block Diagram Description below refers to the block diagrams in chapter 6 “Block Diagrams, Test Point Overview, and Waveforms”. Analog Reception The TV receives multimedia information by tuning the Hybrid tuner (for analog and digital reception) to one of many 6 MHz input channels available via a cable connection. When the input channel is an analog channel, the signal is processed via the NTSC decoder and the VBI data decoder of the MPIF. Digital Reception The TV receives multimedia information by tuning to one of many 6 MHz input channels available via a cable connection.

Circuit Descriptions, Abbreviation List, and IC Data Sheets SSB Cell Layout

Figure 9-1 SSB top view

Figure 9-2 SSB bottom view

EP1.1U

9.

EN 87

EN 88 9.2

9.

EP1.1U

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Abbreviation List 0/6/12

2DNR 3DNR AARA

ACI

ADC AFC

AGC

AM ANR AP AR ASF

ATSC

ATV Auto TV

AV AVIP B/G BTSC

B-TXT C CA(M) CEC

CIS

CL COLUMBUS ComPair CP CSM CSS

CTI

CVBS SCART switch control signal on A/V board. 0 = loop through (AUX to TV), 6 = play 16:9 format, 12 = play 4:3 format Spatial (2D) Noise Reduction Temporal (3D) Noise Reduction Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page Analogue to Digital Converter Automatic Frequency Control: control signal used to tune to the correct frequency Automatic Gain Control: algorithm that controls the video input of the feature box Amplitude Modulation Automatic Noise Reduction: one of the algorithms of Auto TV Asia Pacific Aspect Ratio: 4 by 3 or 16 by 9 Auto Screen Fit: algorithm that adapts aspect ratio to remove horizontal black bars without discarding video information Advanced Television Systems Committee, the digital TV standard in the USA See Auto TV A hardware and software control system that measures picture content, and adapts image parameters in a dynamic way External Audio Video Audio Video Input Processor Monochrome TV system. Sound carrier distance is 5.5 MHz Broadcast Television Standard Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries Blue TeleteXT Centre channel (audio) Conditional Access (Module) Consumer Electronics Control bus: remote control bus on HDMI connections Card Information Structure: Protocol which identifies the card in a POD module Constant Level: audio output to connect with an external amplifier COlor LUMinance Baseband Universal Sub-system Computer aided rePair Connected Planet / Copy Protection Customer Service Mode Content Scrambling System; An encryption method for MPEG-2 video on DVDs. The algorithm and keys required to decode the disc are stored on the DVD-player Color Transient Improvement: manipulates steepness of chroma transients

DAC DBE DDC D/K DFU DMR DNR DRAM DRM DSP DST

DTCP

DVD DVI(-d) EAS

ECM E-DDC

EDID EEPROM EMI EMM EPLD EU EXT FAT FBL FDC FDS FDW FLASH FM FTV Gb/s G-TXT H HD HDD HDCP

HDMI HP

Composite Video Blanking and Synchronization Digital to Analogue Converter Dynamic Bass Enhancement: extra low frequency amplification See "E-DDC" Monochrome TV system. Sound carrier distance is 6.5 MHz Directions For Use: owner's manual Digital Media Reader: card reader Digital Noise Reduction: noise reduction feature of the set Dynamic RAM Digital Rights Management Digital Signal Processing Dealer Service Tool: special remote control designed for service technicians Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394 Digital Versatile Disc Digital Visual Interface (d= digital only) Emergency Alert Signalling; A cable TV standard (SCTE18) to signal emergency information to digital terminal devices Entitlement Control Message Enhanced Display Data Channel (VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display. Extended Display Identification Data (VESA standard) Electrically Erasable and Programmable Read Only Memory Electro Magnetic Interference Entitlement Management Message Erasable Programmable Logic Device Europe EXTernal (source), entering the set by SCART or by cinches (jacks) Forward Application Transport channel Fast BLanking: DC signal accompanying RGB signals Full Dual Screen (same as FDW) Full Dual Window (same as FDS) FLASH memory Field Memory or Frequency Modulation Flat TeleVision Giga bits per second Green TeleteXT H_sync to the module High Definition Hard Disk Drive High-bandwidth Digital Content Protection: A "key" encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a "snow vision" mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP "software key" decoding. High Definition Multimedia Interface HeadPhone

Circuit Descriptions, Abbreviation List, and IC Data Sheets I I2 C I2D I2S IB IF Interlaced

IR IRQ ITU-656

ITV JOP LS

LATAM LCD LED L/L'

LORE LPL LS LVDS Mbps M/N MOP MOSFET MPEG MPIF MUTE NC NICAM

NTC NTSC

NVM O/C OOB OSD

Monochrome TV system. Sound carrier distance is 6.0 MHz Integrated IC bus Integrated IC Data bus Integrated IC Sound bus In Band channel Intermediate Frequency Scan mode where two fields are used to form one frame. Each field contains half the number of the total amount of lines. The fields are written in "pairs", causing line flicker. Infra Red Interrupt Request The ITU Radio communication Sector (ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a. SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing, uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz. Institutional TeleVision; TV sets for hotels, hospitals etc. Jaguar Output Processor Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences Latin America Liquid Crystal Display Light Emitting Diode Monochrome TV system. Sound carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I LOcal REgression approximation noise reduction LG.Philips LCD (supplier) Loudspeaker Low Voltage Differential Signalling Mega bits per second Monochrome TV system. Sound carrier distance is 4.5 MHz Matrix Output Processor Metal Oxide Silicon Field Effect Transistor, switching device Motion Pictures Experts Group Multi Platform InterFace MUTE Line Not Connected Near Instantaneous Compounded Audio Multiplexing. This is a digital sound system, mainly used in Europe. Negative Temperature Coefficient, non-linear resistor National Television Standard Committee. Color system mainly used in North America and Japan. Color carrier NTSC M/N= 3.579545 MHz, NTSC 4.43= 4.433619 MHz (this is a VCR norm, it is not transmitted off-air) Non-Volatile Memory: IC containing TV related data such as alignments Open Circuit Out Of Band channel On Screen Display

OTC P50 PAL

PCB PCM PCMCIA PDP PFC PIP PLL

POD

POR Progressive Scan

PSIP

PTC PWB PWM QAM QTNR QVCP RAM RGB

RC RC5 / RC6 RESET ROM R-TXT RRT

SAM S/C SCART

SCL SCL-F SD SDA SDA-F SDI SDRAM

EP1.1U

9.

EN 89

On screen display Teletext and Control; also called Artistic (SAA5800) Project 50: communication protocol between TV and peripherals Phase Alternating Line. Color system mainly used in West Europe (color carrier= 4.433619 MHz) and South America (color carrier PAL M= 3.575612 MHz and PAL N= 3.582056 MHz) Printed Circuit Board (same as "PWB") Pulse Code Modulation Personal Computer Memory Card International Association Plasma Display Panel Power Factor Corrector (or Preconditioner) Picture In Picture Phase Locked Loop. Used for e.g. FST tuning systems. The customer can give directly the desired frequency Point Of Deployment: A removable CAM module, implementing the CA system for a host (e.g. a TV-set) Power On Reset, signal to reset the uP Scan mode where all scan lines are displayed in one frame at the same time, creating a double vertical resolution. Program and System Information Protocol: A standard for (broadcast) digital television. PSIP consists of channel mapping data, program guide data, information about closed captions and content advisory ratings, and other data related to the current and future programs. Positive Temperature Coefficient, non-linear resistor Printed Wiring Board (same as "PCB") Pulse Width Modulation Quadrature Amplitude Modulation; modulation method Quality Temporal Noise Reduction Quality Video Composition Processor Random Access Memory Red, Green, and Blue. The primary color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are reproduced. Remote Control Signal protocol from the remote control receiver RESET signal Read Only Memory Red TeleteXT This is one of the PSIP tables received via an ATSC compliant transport stream. In case of the OpenCable compliant transport stream, RRT is received via the out of band SI Service Alignment Mode Short Circuit Syndicat des Constructeurs d'Appareils Radiorecepteurs et Televisieurs Serial Clock I2C CLock Signal on Fast I2C bus Standard Definition Serial Data I2C DAta Signal on Fast I2C bus Serial Digital Interface, see “ITU-656” Synchronous DRAM

EN 90

9.

SECAM

SIF SMPS SOG SOPS S/PDIF SRAM SSB STBY SOG SVGA SVHS SW SWAN SXGA TFT THD TMDS TXT TXT-DW uP UXGA V VCR VESA VGA VL VSB WYSIWYR

WXGA XTAL XGA Y Y/C YPbPr

YUV

EP1.1U

Circuit Descriptions, Abbreviation List, and IC Data Sheets

SEequence Couleur Avec Memoire. Color system mainly used in France and East Europe. Color carriers= 4.406250 MHz and 4.250000 MHz Sound Intermediate Frequency Switched Mode Power Supply Sync On Green Self Oscillating Power Supply Sony Philips Digital InterFace Static RAM Small Signal Board STandBY Sync On Green 800x600 (4:3) Super Video Home System Software Spatial temporal Weighted Averaging Noise reduction 1280x1024 Thin Film Transistor Total Harmonic Distortion Transmission Minimized Differential Signalling TeleteXT Dual Window with TeleteXT Microprocessor 1600x1200 (4:3) V-sync to the module Video Cassette Recorder Video Electronics Standards Association 640x480 (4:3) Variable Level out: processed audio output toward external amplifier Vestigial Side Band; modulation method What You See Is What You Record: record selection that follows main picture and sound 1280x768 (15:9) Quartz crystal 1024x768 (4:3) Luminance signal Luminance (Y) and Chrominance (C) signal Component video. Luminance and scaled color difference signals (B-Y and R-Y) Component video

Circuit Descriptions, Abbreviation List, and IC Data Sheets 9.3

EP1.1U

9.

EN 91

IC Data Sheets This section shows the internal block diagrams and pin configurations of ICs that are drawn as "black boxes" in the electrical diagrams (with the exception of "memory" and "logic" ICs).

9.3.1

Diagram A3, AVS1ACP08 (IC 7H05)

Block Diagram AVS1ACP08

VSS 1 VDD 4 VM 8

Supply

Reset MR

Parasitic Filter

Peak Voltage Dectector

Zero Crossing Detector

A2

Mains mode CP Controller Q

2

S

5

Triggering Q CP Time Controller

OSC/IN 2 OSC/OUT 3

AVS12CB

MODE 7

VG

G 3 1

Oscillator

4

V DD

A1

Pin Configuration

VSS

1

8

VM

Osc/In

2

7

Mode

Osc/Out

3

6

N.C.

VDD

4

5

VG G_16290_081.eps 020206

Figure 9-3 Internal block diagram and pin configuration

EN 92 9.3.2

9.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

EP1.1U

Diagram A4, MC34067P (IC 7U01)

Block Diagram VCC

15

Enable / 9 UVLO Adjust 1 Osc Charge 2 Osc RC Oscillator 3 Control Current One–Shot

VCC UVLO / Enable

11

MC34067

5

5.0 V Reference

Vref

16 One–Shot RC

Osc Charge 1

Vref UVLO

Variable Frequency Oscillator

15 VCC

Osc RC 2 14

16

Error Amp 6 Output Noninverting 8 Input Inverting Input 7 Soft–Start

Pin Configuration

Steering Flip–Flop

One–Shot

Osc Control Current 3 Output A

12 Output B

2.5 V Clamp

13 Pwr Gnd

14 Drive Output A

Gnd 4

13 Power Gnd

Vref 5

12 Drive Output B

Error Amp Out 6

11 CSoft–Start

Inverting Input 7

10 Fault Input Enable/UVLO 9 Adjust

Noninverting Input 8

Error Amp

10

Soft–Start

4

(Top View)

Fault Input

Fault Detector

Ground F_15710_163.eps 230905

Figure 9-4 Internal block diagram and pin configuration Diagram B1A, NCP5422ADR2G (IC 7U00)

Block Diagram

VCC

ROSC

BIAS

VCC

+

8.6 V − 7.8 V

CURRENT SOURCE GEN

− +

RAMP2

RAMP1

BST

IS+1 CLK1

+ IS−1

−

CLK2

S Reset Dominant

70 mV FAULT

PWM Comparator 1

+

non−overlap VCC

GATE(H)1

GATE(L)1

R

−

+

−

FAULT

70 mV

Q FAULT

S

−

+

Set Dominant

RAMP1 BST

0.425 V

R

− +

+

− 0.25 V

PWM Comparator 2

− + +

FAULT

non−overlap VCC

GATE(L)2

R FAULT GND E/A OFF

0.425 V

1.2 mA

−

E/A1

−

1.0 V

Reset Dominant

RAMP2

E/A OFF

5.0 A

GATE(H)2

S

−

+

IS+2 IS−2

BST

OSC

−

+

9.3.3

+

FAULT

E/A2

1.0 V

VFB1

COMP1

VFB2

COMP2

Pin Configuration SO−16 16

1

A WL Y WW

NCP5422A AWLYWW

GATE(H)1 GATE(L)1 GND BST IS+1 IS−1 VFB1 COMP1

GATE(H)2 GATE(L)2 VCC ROSC IS+2 IS−2 VFB2 COMP2

= Assembly Location = Wafer Lot = Year = Work Week

F_15400_129.eps 240505

Figure 9-5 Internal block diagram and pin configuration

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.

Diagram B2A, NXT2004 (IC 7T22)

Block Diagram

IF In

VSB/QAM text Demodulator

A/D text

32K x 8 text SRAM

AGC text

IF AGC

MPEG Transport

FEC text

Sense RF Gain

BERT text

RF AGC

Crystal

µC text

OSC text

Tuner Control

I2 C Compatible Interface

I2C text Slave

GPIO

DGND

DGND

VDD1.2

VDD3.3

I2C_SLAVE_ADDR_0

I2C_SLAVE_ADDR_1

DGND

82

81

80

79

78

77

76

Smart Antenna (CEA 909)

DGND

GPIO_5

DGND

85

84

83

GPIO_3

GPIO_4 86

88

87

GPIO_2

VDD3.3

89

GPIO_1

GPIO_0

91

92

90

DGND

VDD1.2

93

AVDD

DGND

95

96

94

AVDD

AG N D

97

AGND

BIAS_RES 98

DVDD_PLL

99

100

Pin Configuration

AVDD_PLL

1

75

DGND

DGND

2

74

DGND

AGND

3

73

DGND

ADC_VREF_N

4

72

DGND

ADC_VREF_P

5

71

MPEG_DATA_0

ADC_INCM

6

70

VDD3.3

ADC_INP

7

69

MPEG_DATA_1

ADC_INN

8

68

MPEG_DATA_2

67

MPEG_DATA_3

66

MPEG_DATA_4

65

DGND

64

VDD2.5

AVDD_ADC

9

AVDD_ADC

10

AVDD_ADC

11

AGND

12

AGND

13

AGND

14

NXT2004 100-pin LQFP

63

VDD1.2

62

MPEG_DATA_5

61

DGND

60

DGND

NC

15

VDD1.2

16

DGND

17

59

/POWER_RESET

VDD2.5

18

58

MPEG_DATA_6

DGND

19

57

DGND

AGND

20

56

MPEG_DATA_7/SER_DATA

AVDD

21

55

MPEG_DATA_EN

NC

22

54

DGND

VDD1.2

23

53

MPEG_PKT_SYNC

DGND

24

52

VDD1.2

AGND

25

51

MPEG_CLK

41

42

43

44

45

46

47

48

49

50

UC_EN

I2C_SDA

VDD3.3

VDD1.2

DGND

GPIO_7

GPIO_6

MPEG_ERR

VDD3.3

40

I2C_SCL

39 DGND

RF_AGC

37

34 IF_AGC

38

33 VDD1.2

A U X_ AGC

32 VDD3.3

P DE T _ CO M P _ I N

31 AVDD_OSC

35

30

36

29 OSC_X TAL_ IN

O S C _ XT A L _ O U T

DGND

28 OSC_CLK

PDET_REF_OUT

26

27

AVDD

(14 x 14 x 1.4 mm)

AGND

9.3.4

EP1.1U

Figure 9-6 Internal block diagram and pin configuration

G_16290_085.eps 020206

EN 93

EN 94 9.3.5

9.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

EP1.1U

Diagram B3A/B/C/D, PNX 3000H (IC 7A00)

Block Diagram

CVBSOUTB 2NDSIFEXT (FMRAD) CVBSOUTIF

SIFAGC

SIF AMP

2

SIFIN

CVBSOUTA

1×

QSS MIXER & AM SND DEMOD

2nd SIF internal

DTV 1st IF

2

SWITCH

Fpc

DTVOUT

2

VIFIN

2

DTVIFIN

IF SWITCH

VIF AMP

2

DTVIFAGC TUNERAGC DTVIFPLL VIFPLL CVBS0

VIF PLL & DTVIF MIXER

DTV 2nd IF SNDTRAP & GROUP DELAY

PNX3000

CVBS_IF

CVBS1 CVBS2 CVBS/Y3 C3 CVBS/Y4 C4 YCOMB CCOMB CVBS_DTV

CVBS/Y_PRIM A

CVBS PRIM. SWITCH

10 DATA LINK 1

C

D

VIDEO IDENT

CLK

4

DLINK1

297 MHz

ICLP CLP_PRIM 2ndSIF AGC DET

AM sound CVBS OUT SWITCH & CVBS SEC. SWITCH

2NDSIFAGC

VCA A

10

DATA LINK 3

D

CVBS_SEC

4

DLINK3

CLK 297 MHz

ICLP CLP_SEC CLP_YUV

ICLP A

ICLP Yyuv

R1/PR1/V1 G1/Y1/Y1 B1/PB1/U1

RGB/YUV MATRIX & SWITCH

R2/PR2/V2 G2/Y2/Y2 B2/PB2/U2

U L1/AMint

A

L

R1/AMext

A

R

L2/MIC1/PipMono

2

MIC2

A

R2/MIC2/AM

2

R

MIC1

MIC2

AUDIO SWITCH (DIGITAL OUT)

VDEFL

VAUDO VAUDS

DATALINK PLL

VAUD

RREF VD2V5

27 MHz 13.5 MHz 54 MHz

D

AM int

VDEFLS BAND GAP REF

297 MHz

2

BGDEC VDEFLO

CLK

secondary digital audio L

A

297 MHz

DLINK2

10

D MIC AMPS

4

D

primary digital audio

2

D

MIC1

CLK A

V

D

DATA LINK 2

10 D

6.75 MHz ADC CLOCK PLL

AUDIO SWITCH (ANALOG OUT)

DIVIDER

HV_PRIM

CLP_PRIM TIMING CIRCUIT

CLP_YUV

HV_SEC

CLP_SEC

AUDIO AMPS

VOLTAGE TO CURRENT

XREF 13.5 or 27 MHz

I2C-BUS INTERFACE

IRQ

MCE430

R1 R2 R3 R4 R5 L1 L2 L3 L4 L5 AM EXT

REW DSNDL1

LINEL

SCART2R

LINER DSNDR1 SCART2L DSNDL2 SCART1L DSNDR2 EWVIN SCART1R

ADR SCL SDA

EWIOUT

Pin Configuration

F_15400_131.eps 240505

Figure 9-7 Internal block diagram and pin configuration

Circuit Descriptions, Abbreviation List, and IC Data Sheets 9.3.6

EP1.1U

9.

Diagram B4A/B/C/D/E/F, PNX 2015 (IC 7J00)

Block Diagram 16-BIT 225 MHz DDR

16

PNX2015 MEMORY CONTROLLER

video coprocessor

NORTH TUNNEL

DV4

SOUTH TUNNEL

PNX8550

VIP

HD input (TDA9975) DV5

MEMORY BASED SCALER

VO-1

VIDEO MPEG DECODER

VO-2 HUB

12 × DACS

AUDIO1 DEMDEC PNX3000

AUDIO1 DSP

speakers

PNX8550

I2D1 DV1 VIDDEC1 2D/3D COMB FILTER

MUX

DV2

PNX8550

VIDDEC2 DV3 PNX3000

I2D2 AUDIO2 DEMDEC

AUDIO2 DSP

PNX8550

PNX8550

to LCD panel

LVDS

TV MICROCONTROLLER SUBSYSTEM

001aab086

remote control

keyboard

I 2 C-bus

UART

AV link

Pin Configuration index area

2 1

B D F H K M P T V Y AB AD AF AH AK

4 3

6 5

7

8 10 12 14 16 18 20 22 24 26 28 30 9 11 13 15 17 19 21 23 25 27 29

A C E G J

PNX2015

L N R U W AA AC AE AG AJ Transparent top view

Figure 9-8 Internal block diagram and pin configuration

F_15400_132.eps 240505

EN 95

EN 96 9.3.7

9.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

EP1.1U

Diagram B5C, VIPER (IC 7V00)

Block Diagram Optional External Video Improvement Processing

32-Bit 225 MHz DDR

PNX8550

Memory Controller

DVD-CSS

Tunnel TS Output TS Out Video/TS Router

3x656 TS Inputs

10 20

1SD+1HD YUV422 Video In

2-Layer Secondary Video Out

Dual Cond. Access

Scaler and De-interlacer

Streaming Interface from Tunnel

5-Layer Primary Video Out HD/VGA/656

Analog DENC S-Video or CVBS

Temporal Noise Redux

2x Smartcard 2x I2S SPDIF

Audio Out

Audio In

30 (dig)

2x I2S SPDIF

250 MHz MIPS32 CPU

2D DE Dual SD Single HD MPEG2 Decoder

2x 240 MHz TM3260 Media Processor

MemoryStick/ UARTs USB1.1 GPIO MultiMedia Card

PCI2.2

Flash

IDE

Pin Configuration AK AH AF AD AB Y V T P M K H F D B

AJ AG AE AC AA W U R N L J G E C A 1

shape 2 optional (4x)

3

5 4

7 6

9 11 13 15 17 19 21 23 25 27 29 8 10 12 14 16 18 20 22 24 26 28 30

Figure 9-9 Internal block diagram and pin configuration

E_14700_088.eps 250505

Circuit Descriptions, Abbreviation List, and IC Data Sheets 9.3.8

EP1.1U

9.

EN 97

Diagram B5F, LD3985M33 (IC 7M05/6) Diagram B6, LD3985M33 (IC 7G42) Diagram B7A, LD3985M33 (IC 7B25)

Block Diagram

Pin Configuration

TSOT23-5L/SOT23-5L

Flip-Chip G_16290_084.eps 020206

Figure 9-10 Internal block diagram and pin configuration

EN 98

Circuit Descriptions, Abbreviation List, and IC Data Sheets

EP1.1U

Diagram B6, ADV7123KSTZ140 (IC 7G40)

Block Diagram VAA

BLANK

BLANK AND SYNC LOGIC

SYNC

R9–R0

G9–G0

B9–B0

PSAVE

10

10

10

IOR

DATA REGISTER

10

DATA REGISTER

10

DATA REGISTER

10

DAC IOR IOG DAC IOG IOB DAC

IOB

VOLTAGE REFERENCE CIRCUIT

POWER-DOWN MODE

CLOCK

VREF

ADV7123 RSET COMP

GND

R0

PSA VE RSET

R1

R2

R4 R3

R5

R7 R6

R9 R8

Pin Configuration 48 47 46 45 44 43 42 41 40 39 38 37

G0 1 G1 2 G2 3

36 V REF 35 COMP

PIN 1 IDENTIFIER

34 IOR

G3 4

33 IOR

G4 5 G5 6

32 IOG

ADV7123

31 IOG

TOP VIEW (Not to Scale)

G6 7 G7 8

30 VAA 29 VAA

G8 9 G9 10

28 IOB 27 IOB

BLANK 11 SYNC 12

26 GND 25 GND

CL OCK

B9

B7 B8

B5 B6

B3 B4

B1 B2

B0

13 14 15 16 17 18 19 20 21 22 23 24

VA A

9.3.9

9.

G_16290_083.eps 020206 Figure 9-11 Internal block diagram and pin configuration

Circuit Descriptions, Abbreviation List, and IC Data Sheets

EP1.1U

9.

9.3.10 Diagram B7A, LD1117DT33 (IC 7B45)

Block Diagram

Pin Configuration LD1117DT

DPAK

F_15710_166.eps 230905

Figure 9-12 Internal block diagram and pin configuration 9.3.11 Diagram B8A, LM339P (IC 7D10)

Block Diagram

Pin Configuration

G_16290_082.eps 020206

Figure 9-13 Internal block diagram and pin configuration

EN 99

EN 100

9.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

EP1.1U

9.3.12 Diagram B7B, TDA9975H (IC 7B50)

Block Diagram I²C

AGC

REFG/Pb B/Pb1 B/Pb2 B/Pb3

τ

ORR/V

τ

ORB/U

τ

ORG/Y

ADC 10 I²C

10/12

I²C

G/Y CHANNEL 10 10/12 I²C

REFR/Pr

I²C

R/Pr1 R/Pr2 R/Pr3

(GAIN)

R/Pr CHANNEL (CLAMP)

10 I²C

I²C

I²C

VPA[11:0]

VIDEO PORT SELECTION

I²C

G/Y1 G/Y2 G/Y3

I²C

4:2:2 FORMATTER

COLOUR CONVERSION

REFG/Y

I²C

RANGE CONTROL

I²C

B/Pb CHANNEL

4:2:2 DOWNSAMPLE FILTERS

BIAS CONTROL

BIAS

I²C

CLAMP

VPB[11:0]

VPC[11:0]

I²C

10/12

I²C

I²C

+

CLAMP

VHREF TIMING GENERATOR

GAIN

I²C (CLKPIX)

LINE TIME MEASUREMENT

MCLK

-

FREF

I²C + -

VREF

I²C + -

HREF

I²C

(CLKFOR) (CLKOUT)

I²C

VCLK COAST

SOG/Y1 SOG/Y2 SOG/Y3

SYNC SLICERS

(COAST)

I²C

I²C

AVI CLOCKS GENERATOR

PL I²C

I²C

UPSAMPLE

I²C

I²C

I²C

SDRS

VSYNC1 VSYNC2 VSYNC3

τ

SYNC SELECTION

ACTIVITY DETECTION

H(C)SYNC1 H(C)SYNC2 H(C)SYNC3

I²C

I²C

I²C

TDA9975

VAI

+

I²C

-

VS

I²C

PARALLEL RECOVERY

XOR

(CTL3)

I²C

2

I²C I²C I²C

MEMORY TERMINATION RESISTANCE CONTROL

I²C

SERIAL INTERFACE

AUDIO PLL I²C

FRO

DE

τ

CTL[3:0]

AP[3:0] WS ACLK

I²C I²C

HDMI RECEIVER

I²C

I²C

SERIAL INTERFACE

POWER MANAGEMENT

OE I²C

PD

2

4

AUDIO FIFO

HDCP CIPHER

-

I²C

I²C

DIS

2

CS

I²C

I²C

A0

2

+

τ

(HDMI CLOCK)

SCL

2

8 (HDMI CLOCKx2)

-

I²C I²C

AUDIO FORMATTER

PARALLEL RECOVERY

PACKET EXTRACTION

I²C

2

+ I²C

SDA

RXBC+ RXBC-

2

8

HSCLB

RXAC+ RXAC-

I²C

8

HSDAB

RXB2+ RXB2-

τ I²C

HS

I²C

HSCLA

RXA2+ RXA2-

DEREPEATER

HSDAA

RXB1+ RXB1-

DECODER/ ALIGNEMENT

RXA1+ RXA1-

PARALLEL RECOVERY

2

RRXB

RXB0+ RXB0-

-

I²C

&

RRXA

RXA0+ RXA0-

+

I²C I²C

Pin Configuration

F_15400_135.eps 240505

Figure 9-14 Internal block diagram and pin configuration

Spare Parts List

10. Spare Parts List Not available at the time of writing. As soon as they become available, a Service Info or Service Manual update will be issued via the appropriate channels.

11. Revision List Manual xxxx xxx xxxx.0 • First release.

EP1.1U

10.

EN 101