Mvs-lc-slides01-fp2005-ver1.0

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MVS (Day 1)

Objectives •

To introduce mainframes – Hardware and Software



To introduce internals of MVS



To introduce VSAM and non-VSAM data sets



To introduce job management in MVS



To introduce various subsystems and facilities



To introduce TSO and ISPF

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Prerequisites • • •

Knowledge about basic computer architecture Basic knowledge in Operating System concepts Knowledge about I/O and communications

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Evaluation Strategy Component

Marks

Schedule

Mock Quiz (Optional)

Not Evaluated

Day 3 (Day 1 and Day 2 topics)

Module Test

100

Day 4 (All topics)

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References 1. Robert. H. Johnson, MVS – Concepts and Facilities, McGraw-Hill Book Company, 1989. • Doug Lowe, MVS JCL - Mike Murach & Associates, 1994. • MVS/DFP - IBM Manual 4. Doug Lowe , MVS TSO PART1 CONCEPTS AND ISPF, Mike Murach & Associates, 1991. 5. Jay Ranade, Hirday Ranade, VSAM Concepts, Programming, and Design McGraw-Hill 6. IBM On-line Manuals - IGG3L100, IGG3U100 and IGG3V400. On MVS.

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Course Plan Day 1 •

Introduction to Mainframes –

• • • •

Hardware & Software Evolution

Distinguishing characteristics of a mainframe OS Basic Mainframe Architecture Address spaces Mechanisms in Multiple Virtual Storage

Day 2 •

Data set management – –



Describe the organization of data sets VSAM and Non-VSAM

Job Management – – –

How does JCL specify its processing requirements ? Job Entry Subsystem Phases of a job

Day 3 • • •

Various subsystems & facilities most commonly found on a typical Mainframe system System generation & initialization TSO/ISPF

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Agenda – Day1 •

Introduction – Comparison of computer types • Personal, Mini & Mainframes

– – – –



Evolution of Mainframe hardware and software Distinguishing characteristics of a mainframe OS Basic Mainframe architecture I/O device structure

Concepts & terminology – Idea of address spaces – Mechanisms in Multiple Virtual Storage – MVS address space organizations ( Memory maps )

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Basic Components of Computer Systems

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Classification of computers

Personal Computer

Mainframe Computer

Super Computer Copyright © 2005, Infosys Technologies Ltd

Mini Computer 9

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Personal Computers

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Minicomputer

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Mainframe

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Super Computers

. High Processing capacity

Uses: . Scientific computations . Military applications

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Mainframe Hardware Evolution

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Mainframe System Software Evolution … •

DOS/VSE



OS/360



PCP



OS/MFT

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Mainframe System Software Evolution •

OS/MVT



OS/VS1 and SVS



MVS



Z/OS

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Mainframe OS - characteristics • • • • •

Virtual storage Multiprogramming Spooling Batch processing Time sharing

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Virtual storage • • •

Technique that lets a processor simulate a large amount of main storage from a smaller installed real storage. Uses disk storage as an extension of real storage. At any given moment only one program and its data need be in real storage.

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Multiprogramming • • •

More than one program executing at the same time. Key : I/O waits take a long time compared to CPU operations. Only a simulation again.

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Spooling • • •

Intercepts and redirects printer output to a disk file. Each programs’ output stored separately. Facilitates effective sharing of I/O devices and better system throughput.

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Batch processing •

Batch processing is – Non interactive – Off line

• •

JCL describes a batch job - programs, data and resources required. Job scheduler : submits jobs for execution based on scheduling algorithm.

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Time sharing • • • •

Time sharing makes on-line, interactive processing possible. Each user has access to the system and a gets a time slice repeatedly. TSO used to login, create, maintain and store JCLs. Processing is generally as a batch job in background.

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Basic Mainframe architecture … channel 0 channel 1

Processor

channel 2 channel 3

CPU

Main storage

channel 4 channel 5 channel 6 channel 7

A family of processors from IBM

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Basic Mainframe architecture ... •

Processor-CPUs+Main store+channels – –



cache expanded storage

Multiprocessing (more than one CPU) – PR/SM - Processor resource / systems manager

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Basic Mainframe architecture ... •

Channels – provides a path between a processor and an I/O device. ( 4.5 MB/sec, 400-foot ) – Each channel can connect to upto 8 control units each of which is connected to an I/O device. – A channel is intelligent ( a CPU in itself )



ESCON - Enterprise System Connection - based on fiber optics ( 17 MB/sec,26 miles )

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I/O Devices •

Unit record devices –



card devices & printers

Magnetic tape devices – sequential access only



Direct access devices – disk drive, DASD, auxiliary, .secondary storage – random access possible

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Magnetic Tapes • • • • •

It is one of the commonly used I/O. Coated with a magnetic material on both sides of the tape. Data is stored by Magnetizing the ferrite coating. Sequential access of records. Used for bulk storage and easy transportation.

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Direct Access Storage Device (DASD) • •

A DASD consists of many disk packs or volumes: Data on both sides

Platters

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DASD - Tracks & Cylinders

TRACK 807

TRACK 000

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DASD - Actuator

READ-WRITE HEADS

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DASD: Data format … There are two types of Data Formats: Fixed block data format Count Key data format (CKD format)

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DASD - Data format •

CKD ( count-key-data) devices – Store data in variable-length blocks – Each data block preceded by a count area and a key area ( which should be met before data in dir of rotation ) – Gaps to separate count, key and data areas.

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DASD - control units … •

Each type of DASD requires two types of control units to connect to a channel : – String controller : • attaches a group of DASDs of same type ( a string )



Storage control : • connects upto 8 DASD strings to a channel

• •

Cache between processor & drive. Support for more than one channel connection to processor.

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DASD - Control units

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Data communications equipment … •

Lets local & remote terminals access a system : – – – – –

host system communications controller modems telecommunication lines terminal systems

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Data communications equipment

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Terminals • • •

3270 terminals are the standard. It is a subsystem of many terminals, printers and controllers Terminals can be emulated on PCs which accesses the mainframe over wide area links.

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Concepts & terminologies

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Address space •

What is an Address Space? – An address space is a complete range of addresses that can be accessed by a processor.

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Addressability of different Systems •

Depends on number of bits used for addressing : – System 370 : 24 bit addressing, 16 MB max – 370 XA, ESA 370,390 : 31 bit addressing, 2GB max. – Z series – 64 bit addressing

16 EB

64 bit Addressing

2 GB “Bar”

(z/OS) 31-bit Addressing

16 MB “ Line” 24 bit Addressing

(MVS/XA)

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Multiple Virtual Storage … • •

MVS simulates several address spaces, each independent of the other and representing an user, job or a OS subsystem. Mechanisms used to support MVS : – Paging – Swapping

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Multiple Virtual Storage ...

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Paging … • • • •

Pages are 4K sections on virtual store ( DASD ). Page frames are 4K sections in real store ( main memory ). Page table maps pages to page frames. Page fault when program refers to data in a storage location not in real store.

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Paging • • •

Page-in when MVS loads a new page into a page frame Page-out when data in a page-frame is written back to DASD. OS code responsible for paging cannot be paged out.

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Expanded Storage: • •

Acts as large buffer between real storage and page data sets ( virtual store ). Improves efficiency of virtual storage operations.

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Swapping … • •

Transfer of entire address spaces in and out of virtual store. Swapping is like paging, only at a higher level and across address spaces.

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Swapping

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Program modes •

Real mode – not pageable or swappable – OS part responsible for implementing virtual memory, always resident



Virtual mode – Other processes that can be paged or swapped

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MVS/370-Memory map … •

System area – OS programs & data, common to all address spaces, nucleus, real mode



Private area – User region + unallocated



Common area – OS programs & data, common to all address spaces – SQA, PLPA and CSA

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MVS/370 - Memory map ...

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MVS/370 - Memory map

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Storage map in an Address Space •

System area – OS programs & data, common to all address spaces, nucleus, real mode



Private area – User region + unallocated



Common area – OS programs & data, common to all address spaces

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Memory map - XA and ESA • •

31 bit addresses => 2 GB total First 16 MB can be addressed using either 24 or 31 bit addressing – address space logically divided at 16 MB line



No system area – MVS nucleus combined with other OS data in common area

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MVS/ESA - Dataspace • • •

ESA lets a job or user create one or more 2GB address spaces that can be used to hold large amounts of data Contents of dataspaces managed directly by user programs Dataspaces reside in normal virtual store subject to paging and swapping.

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Difference between Address space and Data space

Address space Contains instruction and data.

Data space Can contain only data. Even if program is loaded in data space, it is considered as data

Common areas and nucleus is mapped on Address space.

None of common areas and nucleus is mapped on data space.

An application can have only one address space.

An application can have access upto 7999 data space, each the size of 2GB.

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MVS/ESA - Hiperspace • • • •

Similar to dataspaces Contents of hiperspaces managed by MVS/ESA and made available to user programs in 4KB units Hiperspaces reside only in expanded storage and are never in real store Facilitates hiperbatch to improve performance of certain types of batches – hiperbatch transparent to JCL that invokes them

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The differences between data spaces and Hiperspaces Data Space

Hiperspace

Access

Access Registers

MVS System Services

Addressability

Byte

4 Kb Blocks

Storage

Central, Expanded, Auxiliary

Expanded, Auxiliary

Language Support

Assembler

Assembler and High Level

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Summary •

Introduction – Comparison of computer types • Personal, Mini & Mainframes

– – – –



Evolution of Mainframe hardware and software Distinguishing characteristics of a mainframe OS Basic Mainframe architecture I/O device structure

Concepts & terminology – Idea of address spaces – Mechanisms in Multiple Virtual Storage – MVS address space organizations ( Memory maps )

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Thank You! Copyright © 2005, Infosys Technologies Ltd

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