541 B.E. 5th Semester (Compt. Science) Examination, December-2006 MICRO-PROCESSOR Paper-EE-309- C
Time allowed: 3 hours
Maximum marks: 100
Note: Attempt any five questions. All questions carry equal marks. 1.
(a) Explain the working of 8086 microprocessor in maximum mode.
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(b) Design a programmable system to interlace 4K ROM, 16 K RAM with 8086 J..tp. The system should also interface one ADC and one DAC. 10 2. 10
(a) Discuss the application of J..t p 8085 in stepper motor control. (b) Discuss how four-digit, seven-segment LED display can be interfaced with 8085 .. 6 (c) ~llustrate the contents of the 'address bus and the data bus and timing of control signals in an 8085, when the instruction is executed:
following
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Memory address Machine code
Mneumonics
. 0051
ADI, F24
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3. (a) Write an assembly language program for generating a delay of 1 'msec : 5 (b) Write short notes on : (i)
Interrupt system of 8085
(ii) 8255 PPI chip (ill) DMA data transfer technique. 4 •. (a) DisCuss the comparison of the impo(tant.ch~ristics of 8-bit, 16-bit and 32~bit microprocessor.
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(b) Distinguish between memory mapped I/O and I/O mapped I/O.
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(c)
Discuss the various progr~ development tools for 8086.
5.
(a) (b)
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Discuss the concept of pipeline.
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Discuss the important features of 825~ and 8257. 5
(c)
What is DMA ? Explain the intel's programmable DMA controller chip with the help of its functional block diagram.
6.
(a)
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What is handshaking? How is it used in asynchronous data transfer between CPU and I/O devices?
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(b) Why we use programmable interrupt controller ? Explain its block diagram with its interrupt operation. 10
7.
(a) Explain the execution of CALL instruction in terms of Sp, address bus, PC, data bus. (b) Give the bit pattern for RIM and SIM.
5 S
(c) Draw logic schematic diagram to generate for control signals lOR, lOW, MEMR, MEMW , using 8085 IO/M, RD, WR signals. S (d) Explain LXIH 2502 H and LDA 2501 H. 8.
Write short notes on :
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(a) Tuning diagram for memory Read Machine Cycle ,
(b) Debugging and Testing of program (c) TYpes of Interfacing (d) Difference between CPU and J..l. p. 541-P-3-Q-8 (06)
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