Laboratory Manual.docx

Laboratory manual Microprocessor 8085

Electronics Lab

Department of Physics Gauhati University

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Name of the Experiments Induction to 8085 Microprocessor

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1. INTRODUCTION TO MICROPROCESSOR 8085

Aim: To study the microprocessor 8085

Architecture of 8085 Microprocessor

a) General purpose registers 2

It is an 8 bit register i.e. B, C, D, E, H, L. The combination of 8 bit register is known as register pair, which can hold 16 bit data. The HL pair is used to act as memory pointer is accessible to program.

b) Accumulator It is an 8 bit register which hold one of the data to be processed by ALU and stored the result of the operation.

c) Program counter (PC) It is a 16 bit pointer which maintains the address of a byte entered to line stack.

d) Stack pointer (Sp) It is a 16 bit special purpose register which is used to hold line memory address for line next instruction to be executed.

e) Arithmetic and logical unit It carries out arithmetic and logical operation by 8 bit address it uses the accumulator content as input the ALU result is stored back into accumulator.

f) Temporary register It is an 8 bit register associated with ALU hold data, entering an operation, used by the microprocessor and not accessible to programs.

g) Flags Flag register is a group of fire, individual flip flops line content of line flag register will change after execution of arithmetic and logic operation. The line states flags are i) ii) iii) iv) v)

Carry flag (C) Parity flag (P) Zero flag (Z) Auxiliary carry flag (AC) Sign flag (S)

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h) Timing and control unit Synchronous all microprocessor, operation with the clock and generator and control signal from it necessary to communicate between controller and peripherals.

i) Instruction register and decoder Instruction is fetched from line memory and stored in line instruction register decoder the stored information. j) Register Array These are used to store 8 bit data during execution of some instruction

PIN Description

Address Bus 1.

The pins Ao – A15 denote the address bus.

2.

They are used for most significant bit

Address / Data Bus 1.

AD0 – AD7 constitutes the address / Data bus

2.

These pins are used for least significant bit

ALE : (Address Latch Enable) 1.

The signal goes high during the first clock cycle and enables the lower order address bits.

IO / M 1. 2.

This distinguishes whether the address is for memory or input. When this pins go high, the address is for an I/O device.

S0 – S1 S0 and S1 are status signal which provides different status and functions. 4

RD 1. 2.

This is an active low signal This signal is used to control READ operation of the microprocessor.

WR 1. 2.

WR is also an active low signal Controls the write operation of the microprocessor.

HOLD 1.

This indicates if any other device is requesting the use of address and data bus.

HLDA 1. 2.

HLDA is the acknowledgement signal for HOLD It indicates whether the hold signal is received or not.

INTR 1. 2.

INTE is an interrupt request signal IT can be enabled or disabled by using software

INTA 1. 2.

Whenever the microprocessor receives interrupt signal It has to be acknowledged.

RST 5.5, 6.5, 7.5 1. 2.

These are nothing but the restart interrupts They insert an internal restart junction automatically.

TRAP 1. 2.

Trap is the only non-maskable interrupt It cannot be enabled (or) disabled using program.

RESET IN

5

1.

This pin resets the program counter to 0 to 1 and results interrupt enable and HLDA flip flops.

X1, X2 These are the terminals which are connected to external oscillator to produce the necessary and suitable clock operation.

SID This pin provides serial input data

SOD This pin provides serial output data

VCC and VSS 1.

VCC is +5V supply pin

2.

VSS is ground pin

Pin Diagram and Pin description of 8085

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INSTRUCTION SETS OF 8085:

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1. Control 2. Logical 3. Branching 4. Arithmetic 5. Data Transfer

CONTROL INSTRUCTIONS: Opcode

NOP

HLT

DI

EI

RIM

SIM

Operand Explanation Description of Instruction No No operation is performed. The instruction is fetched none operation and decoded. However no operation is executed. Example: NOP Halt and The CPU finishes executing the current instruction and none enter wait halts any further execution. An interrupt or reset is state necessary to exit from the halt state. Example: HLT Disable The interrupt enable flip-flop is reset and all the none interrupts interrupts except the TRAP are disabled. No flags are affected. Example: DI Enable The interrupt enable flip-flop is set and all interrupts none interrupts are enabled. No flags are affected. After a system reset or the acknowledgement of an interrupt, the interrupt enable flipflop is reset, thus disabling the interrupts. This instruction is necessary to reenable the interrupts (except TRAP). Example: EI Read This is a multipurpose instruction used to read the none interrupt status of interrupts 7.5, 6.5, 5.5 and read serial data mas input bit. The instruction loads eight bits in the accumulator with the following interpretations. Example: RIM Set interrupt This is a multipurpose instruction and used to none mask implement the 8085 interrupts 7.5, 6.5, 5.5, and serial data output. The instruction interprets the accumulator contents as follows. Example: SIM

LOGICAL INSTRUCTIONS: 8

Opcode CMP

Operand R M

Explanation of Instruction Compare register or memory with accumulator

CPI

8-bit data

Compare immediate with accumulator

ANA

R

Logical AND register or memory with accumulator

M

ANI

8-bit data Logical AND immediate with accumulator

XRA

R M

Exclusive OR register or memory with accumulator

XRI

8-bit data Exclusive OR immediate with accumulator

ORA

R M

Logical OR register or memory with

Description The contents of the operand (register or memory) are M compared with the contents of the accumulator. Both contents are preserved . The result of the comparison is shown by setting the flags of the PSW as follows: if (A) < (reg/mem): carry flag is set if (A) = (reg/mem): zero flag is set if (A) > (reg/mem): carry and zero flags are reset Example: CMP B or CMP M The second byte (8-bit data) is compared with the contents of the accumulator. The values being compared remain unchanged. The result of the comparison is shown by setting the flags of the PSW as follows: if (A) < data: carry flag is set if (A) = data: zero flag is set if (A) > data: carry and zero flags are reset Example: CPI 89H The contents of the accumulator are logically ANDed with M the contents of the operand (register or memory), and the result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of HL registers. S, Z, P are modified to reflect the result of the operation. CY is reset. AC is set. Example: ANA B or ANA M The contents of the accumulator are logically ANDed with the 8-bit data (operand) and the result is placed in the accumulator. S, Z, P are modified to reflect the result of the operation. CY is reset. AC is set. Example: ANI 86H The contents of the accumulator are Exclusive ORed with M the contents of the operand (register or memory), and the result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of HL registers. S, Z, P are modified to reflect the result of the operation. CY and AC are reset. Example: XRA B or XRA M The contents of the accumulator are Exclusive ORed with the 8-bit data (operand) and the result is placed in the accumulator. S, Z, P are modified to reflect the result of the operation. CY and AC are reset. Example: XRI 86H The contents of the accumulator are logically ORed with M the contents of the operand (register or memory), and the result is placed in the accumulator. 9

accumulator

ORI

8-bit data Logical OR immediate with accumulator

RLC

none

RRC

none

If the operand is a memory location, its address is specified by the contents of HL registers. S, Z, P are modified to reflect the result of the operation. CY and AC are reset. Example: ORA B or ORA M The contents of the accumulator are logically ORed with the 8-bit data (operand) and the result is placed in the accumulator. S, Z, P are modified to reflect the result of the operation. CY and AC are reset.

Rotate accumulator left

Example: ORI 86H Each binary bit of the accumulator is rotated left by one position. Bit D7 is placed in the position of D0 as well as in the Carry flag. CY is modified according to bit D7. S, Z, P, AC are not affected.

Rotate accumulator right

Example: RLC Each binary bit of the accumulator is rotated right by one position. Bit D0 is placed in the position of D7 as well as in the Carry flag. CY is modified according to bit D0. S, Z, P, AC are not affected.

RAL

none

Rotate accumulator left through carry

Example: RRC Each binary bit of the accumulator is rotated left by one position through the Carry flag. Bit D7 is placed in the Carry flag, and the Carry flag is placed in the least significant position D0. CY is modified according to bit D7. S, Z, P, AC are not affected.

RAR

none

Rotate accumulator right through carry

Example: RAL Each binary bit of the accumulator is rotated right by one position through the Carry flag. Bit D0 is placed in the Carry flag, and the Carry flag is placed in the most significant position D7. CY is modified according to bit D0. S, Z, P, AC are not affected.

none

Complement accumulator

CMC

none

Complement carry

STC

none

Set Carry

CMA

Example: RAR The contents of the accumulator are complemented. No flags are affected. Example: CMA The Carry flag is complemented. No other flags are affected. Example: CMC Set Carry Example: STC

BRANCHING INSTRUCTIONS: 10

Opcode

Operan d 16-bit address

JMP

Opcode

Description

Flag Status

JC

Jump on Carry

CY = 1

JNC

Jump on no Carry

CY = 0

JP

Jump on positive

S=0

JM

Jump on minus

S=1

JZ

Jump on zero

Z=1

JNZ

Jump on no zero

Z=0

JPE

Jump on parity even

P=1

JPO

Jump on parity odd P = 0

16-bit address

CC

Call on Carry

CNC

Call on no Carry

CY = 0

CP

Call on positive

S=0

CM

Call on minus

S=1

CZ

Call on zero

Z=1

CNZ

Call on no zero

Z=0

CPE

Call on parity even P = 1

CPO

Call on parity odd P = 0

RET

Description

Jump conditionally

Description The program sequence is transferred to the memory location specified by the 16bit address given in the operand. Example: JMP 2034H or JMP XYZ The program sequence is transferred to the memory location specified by the 16bit address given in the operand based on the specified flag of the PSW as described below. Example: JZ 2034H or JZ XYZ

Flag Status 16-bit address CY = 1

Opcode

Explanation of Instruction Jump unconditionall y

none

11

Unconditional subroutine call

Return from subroutine unconditionall y

The program sequence is transferred to the memory location specified by the 16bit address given in the operand. Before the transfer, the address of the next instruction after CALL (the contents of the program counter) is pushed onto the stack. Example: CALL 2034H or CALL XYZ The program sequence is transferred from the subroutine to the calling program.

The two bytes from the top of the stack are copied into the program counter,and program execution begins at the new address.

none

Return from subroutine conditionally

PCHL

none

Load program counter with HL contents

RST

0-7

Restart

Opcode

Description

Flag Status

RC

Return on Carry

CY = 1

RNC

Return on no Carry CY = 0

RP

Return on positive

S=0

RM

Return on minus

S=1

RZ

Return on zero

Z=1

RNZ

Return on no zero

Z=0

RPE

Return on parity even

P=1

RPO

Return on parity odd

P=0

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Example: RET The program sequence is transferred from the subroutine to the calling program based on the specified flag of the PSW as described below. The two bytes from the top of the stack are copied into the program counter, and program execution begins at the new address. Example: RZ The contents of registers H and L are copied into the program counter. The contents of H are placed as the high-order byte and the contents of L as the low-order byte. Example: PCHL The RST instruction is equivalent to a 1byte call instruction to one of eight memory locations depending upon the number. The instructions are generally used in conjunction with interrupts and

inserted using external hardware. However these can be used as software instructions in a program to transfer program execution to one of the eight locations. The addresses are: Instruction

Restart Address

RST 0

0000H

RST1

0008H

RST 2

0010H

RST 3

0018H

RST 4

0020H

RST 5

0028H

RST 6

0030H

RST 7

0038H

The 8085 has four additional interrupts and these interrupts generate RST instructions internally and thus do not require any external hardware. These instructions and their Restart addresses are: Interrupt TRAP

Restart Address 0024H

RST 5.5 002CH RST 6.5 0034H RST 7.5 003CH

ARITHMATIC INSTRUCTIONS: 13

Opcode ADD

ADC

Operand Explanation of Instruction R Add register or memory, to accumulator M

R M

Add register to accumulator with carry

Description The contents of the operand (register or memory) are added to the contents of the accumulator and the result is stored in the accumulator. If the operand is a memory location, its location is specified by the contents of the HL registers. All flags are modified to reflect the result of the addition. Example: ADD B or ADD M The contents of the operand (register or memory) and M the Carry flag are added to the contents of the accumulator and the result is stored in the accumulator. If the operand is a memory location, its location is specified by the contents of the HL registers. All flags are modified to reflect the result of the addition. Example: ADC B or ADC M The 8-bit data (operand) is added to the contents of the accumulator and the result is stored in the accumulator. All flags are modified to reflect the result of the addition.

ADI

8-bit data

Add immediate to accumulator

ACI

8-bit data

Add immediate to accumulator with carry

Example: ADI 45H The 8-bit data (operand) and the Carry flag are added to the contents of the accumulator and the result is stored in the accumulator. All flags are modified to reflect the result of the addition.

LXI

Reg. pair, 16bit data

Load register pair immediate

Example: ACI 45H The instruction loads 16-bit data in the register pair designated in the operand.

DAD

Reg. pair

SUB

R M

Example: LXI H, 2034H or LXI H, XYZ Add register The 16-bit contents of the specified register pair are pair to H and L added to the contents of the HL register and the sum registers is stored in the HL register. The contents of the source register pair are not altered. If the result is larger than 16 bits, the CY flag is set. No other flags are affected.

Subtract register or memory from accumulator

Example: DAD H The contents of the operand (register or memory ) are subtracted from the contents of the accumulator, and the result is stored in the accumulator. If the operand is a memory location, its location is specified by the contents of the HL registers. All flags are modified to reflect the result of the 14

subtraction.

SBB

R M

SUI

8-bit data

SBI

8-bit data

INR

R M

INX

R

DCR

R M

DCX

DAA

R

none

Subtract source and borrow from accumulator

Subtract immediate from accumulator

Subtract immediate from accumulator with borrow Increment register or memory by 1

Example: SUB B or SUB M The contents of the operand (register or memory ) and M the Borrow flag are subtracted from the contents of the accumulator and the result is placed in the accumulator. If the operand is a memory location, its location is specified by the contents of the HL registers. All flags are modified to reflect the result of the subtraction. Example: SBB B or SBB M The 8-bit data (operand) is subtracted from the contents of the accumulator and the result is stored in the accumulator. All flags are modified to reflect the result of the subtraction. Example: SUI 45H The contents of register H are exchanged with the contents of register D, and the contents of register L are exchanged with the contents of register E. Example: XCHG The contents of the designated register or memory) are incremented by 1 and the result is stored in the same place. If the operand is a memory location, its location is specified by the contents of the HL registers.

Example: INR B or INR M Increment The contents of the designated register pair are register pair by incremented by 1 and the result is stored in the same 1 place.

Decrement register or memory by 1

Example: INX H The contents of the designated register or memory are M decremented by 1 and the result is stored in the same place. If the operand is a memory location, its location is specified by the contents of the HL registers.

Example: DCR B or DCR M Decrement The contents of the designated register pair are register pair by decremented by 1 and the result is stored in the 1 same place.

Decimal adjust accumulator

Example: DCX H The contents of the accumulator are changed from a binary value to two 4-bit binary coded decimal (BCD) digits. This is the only instruction that uses 15

the auxiliary flag to perform the binary to BCD conversion, and the conversion procedure is described below. S, Z, AC, P, CY flags are altered to reflect the results of the operation. If the value of the low-order 4-bits in the accumulator is greater than 9 or if AC flag is set, the instruction adds 6 to the low-order four bits. If the value of the high-order 4-bits in the accumulator is greater than 9 or if the Carry flag is set, the instruction adds 6 to the high-order four bits. Example: DAA

DATA TRANSFER INSTRUCTIONS: Opcode MOV

Operand Explanation of Instruction Rd, Rs Copy from source(Rs) to destination(Rd) M, Rs Rd, M

MVI

Rd, data

Move immediate 8-bit

M, data

LDA

LDAX

LXI

LHLD

16-bit address

Load accumulator

B/D Reg. Load accumulator pair indirect

Reg. pair, 16bit data 16-bit

Description This instruction copies the contents of the source register into the destination register; the contents of the source register are not altered. If one of the operands is a memory location, its location is specified by the contents of the HL registers. Example: MOV B, C or MOV B, M The 8-bit data is stored in the destination register or memory. If the operand is a memory location, its location is specified by the contents of the HL registers. Example: MVI B, 57H or MVI M, 57H The contents of a memory location, specified by a 16-bit address in the operand, are copied to the accumulator. The contents of the source are not altered. Example: LDA 2034H The contents of the designated register pair point to a memory location. This instruction copies the contents of that memory location into the accumulator. The contents of either the register pair or the memory location are not altered.

Load register pair immediate

Example: LDAX B The instruction loads 16-bit data in the register pair designated in the operand.

Load H and L

Example: LXI H, 2034H or LXI H, XYZ The instruction copies the contents of the 16

STA

address

registers direct

16-bit address

16-bit address

STAX

Reg. pair

Store accumulator indirect

SHLD

16-bit address

Store H and L registers direct

XCHG

none

Exchange H and L with D and E

SPHL

none

Copy H and L registers to the stack pointer

XTHL

none

Exchange H and L with top of stack

memory location pointed out by the 16-bit address into register L and copies the contents of the next memory location into register H. The contents of source memory locations are not altered. Example: LHLD 2040H The contents of the accumulator are copied into the memory location specified by the operand. This is a 3-byte instruction, the second byte specifies the low-order address and the third byte specifies the high-order address. Example: STA 4350H The contents of the accumulator are copied into the memory location specified by the contents of the operand (register pair). The contents of the accumulator are not altered. Example: STAX B The contents of register L are stored into the memory location specified by the 16-bit address in the operand and the contents of H register are stored into the next memory location by incrementing the operand. The contents of registers HL are not altered. This is a 3-byte instruction, the second byte specifies the loworder address and the third byte specifies the highorder address. Example: SHLD 2470H The contents of register H are exchanged with the contents of register D, and the contents of register L are exchanged with the contents of register E. Example: XCHG The instruction loads the contents of the H and L registers into the stack pointer register, the contents of the H register provide the high-order address and the contents of the L register provide the low-order address. The contents of the H and L registers are not altered. Example: SPHL The contents of the L register are exchanged with the stack location pointed out by the contents of the stack pointer register. The contents of the H register are exchanged with the next stack location (SP+1); however, the contents of the stack pointer 17

register are not altered.

PUSH

Reg. pair

Push register pair onto stack

POP

Reg. pair

Pop off stack to register pair

OUT

8-bit port address

IN

8-bit port address

Output data from accumulator to a port with 8-bit address Input data to accumulator from a port with 8-bit address

Example: XTHL The contents of the register pair designated in the operand are copied onto the stack in the following sequence. The stack pointer register is decremented and the contents of the highorder register (B, D, H, A) are copied into that location. The stack pointer register is decremented again and the contents of the low-order register (C, E, L, flags) are copied to that location. Example: PUSH B or PUSH A The contents of the memory location pointed out by the stack pointer register are copied to the loworder register (C, E, L, status flags) of the operand. The stack pointer is incremented by 1 and the contents of that memory location are copied to the high-order register (B, D, H, A) of the operand. The stack pointer register is again incremented by 1. Example: POP H or POP A The contents of the accumulator are copied into the I/O port specified by the operand. Example: OUT F8H The contents of the input port designated in the operand are read and loaded into the accumulator. Example: IN 8CH

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PROGRAMS: AIM: ADD TWO NUMBERS MEMORY LOCATION 8000 8001 8002 8003 8004 8005 8006 8007

LABEL

MNEMONICS HEX OPCODE OPERAND CODE MVI A,02H 3E 02 ADI 04H C6 04 STA 8050 32 50 80 HLT 76

COMMENT Load 02 in the accumulator Add 04 with 02 Store at memory location 8050 Stop

Steps for execution of the program: Reset the microprocessor by pressing “RESET” For typing the OPCODE press “Exam Memory” Then type the starting address of the program , i.e. 8000 in this case. Then press “NEXT” and enter the HEX Code for the corresponding OPCODE Then press “NEXT” and enter the HEX Code for the corresponding OPERAND e.g. enter 3E in the memory location 8000 and 02 in 8001 6. Repeat the steps 4 and 5 up to the end of the program. 7. Then press “NEXT” 8. Then press “RESET” 9. Then press “GO” 10. Then type the starting address of the program , i.e. 8000 in this case 11. Then press “EXECUTE” 12. Then press “RESET” 13. Then press “Exam Memory” 14. Enter the memory location assigned for the result, i.e. 8050 in this case. 15. Press “NEXT” 1. 2. 3. 4. 5.

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AIM: SUBTRACT TWO NUMBERS: MEMORY LOCATION 8000 8001 8002 8003 8004 8005 8006 8007

LABEL

MNEMONICS HEX OPCODE OPERAND CODE MVI A,13H 3E 13 SUI 10H D6 10 STA 8050 32 50 80 HLT 76

COMMENT Load 13H in the accumulator Subtract 10H from 13H Store at memory location 8050 Stop

Steps for execution of the program: Reset the microprocessor by pressing “RESET” For typing the OPCODE press “Exam Memory” Then type the starting address of the program, i.e. 8000 in this case. Then press “NEXT” and enter the HEX Code for the corresponding OPCODE. Then press “NEXT” and enter the HEX Code for the corresponding OPERAND. e.g. enter 3E in the memory location 8000 and 13 in 8001. 6. Repeat the steps 4 and 5 up to the end of the program. 7. Then press “NEXT” 8. Then press “RESET” 9. Then press “GO” 10. Then type the starting address of the program , i.e. 8000 in this case 11. Then press “EXECUTE” 12. Then press “RESET” 13. Then press “Exam Memory” 14. Enter the memory location assigned for the result, i.e. 8050 in this case. 15. Press “NEXT” 1. 2. 3. 4. 5.

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AIM: ADD TWO 8-BIT NUMBERS AND SAVE THE RESULT MEMORY LOCATION 8000 8001 8002

LABEL

MNEMONICS HEX OPCODE OPERAND CODE LXI H,9000H 21 00 90

8003

MOV

A,M

7E

8004

INX

H

23

8005

MOV

B,M

46

8006

ADD

B

80

8007 8008 8009

STA

8050

32 50 80

800A

HLT

76

COMMENT Load HL pair immediately with 9000H Move data from memory to A Increment the content of HL pair Move data from memory to B Add the content of B with the content of A Store the result in memory location 8050 Stop

Steps for execution of the program: 1. Reset the microprocessor by pressing “RESET” 2. For typing the OPCODE press “Exam Memory” 3. Then type the starting address of the program, i.e. 8000 in this case. 4. Then press “NEXT” and enter the HEX Code for the corresponding OPCODE 5. Then press “NEXT” and enter the HEX Code for the corresponding OPERAND 6. Repeat the steps 4 and 5 up to the end of the program. 7. Then press “NEXT” 8. Then press “RESET” 9. Then press “GO” 10. Then type the starting address of the program , i.e. 8000 in this case 11. Then press “EXECUTE” 12. Then press “RESET” 13. Then press “Exam Memory” 14. Enter the memory location assigned for the result. 15. Press “NEXT” 21

AIM: ADD TWO 8-BIT NUMBERS AND SAVE THE RESULT AND CARRY IN TWO CONSECUTIVE MEMORY LOCATIONS: MEMORY LOCATION 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014

LABEL

GO

MNEMONICS OPCODE OPERAND MVI

C,00H

LXI

H,8000H

MVI INX MOV ADD

A,M H B,M B

JNC

GO 800D

INR

C

STA

8050H

MOV

A,C

STA

8051H

HLT

HEX CODE OE 00 21 00 80 7E 23 46 80 D2 0D 90 0C 32 50 80 79 32 51 80 76

COMMENT Move immediately 00H in to C Load HL pair with 8000H Move the content of memory to A Increment content of HL pair Move memory content to B Add the content of B with A Jump to memory location 800D if carry is not zero Increment the content of C Store the content of A in memory location 8050 Move data from C to A Store the content of A in memory location 8051 Stop

Steps for execution of the program: 1. Reset the microprocessor by pressing “RESET” 2. For typing the OPCODE press “Exam Memory” 3. Then type the starting address of the program, i.e. 8000 in this case. 4. Then press “NEXT” and enter the HEX Code for the corresponding OPCODE 5. Then press “NEXT” and enter the HEX Code for the corresponding OPERAND 6. Repeat the steps 4 and 5 up to the end of the program. 7. Then press “NEXT” 8. Then press “RESET” 9. Then press “GO” 10. Then type the starting address of the program , i.e. 8000 in this case 11. Then press “EXECUTE” 12. Then press “RESET” 13. Then press “Exam Memory” 14. Enter the memory location assigned for the result. 15. Press “NEXT”

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AIM: ADD FIVE 8-BIT DATA STORED IN FIVE CONSECUTIVE MEMORY LOCATIONS MEMORY LOCATION 9000 9001 9002 9003 9004 9005 9006 9007 9008 9009 900A 900B 900C 900D 900E 900F 9010 9011 9012 9013 9014 9015 9016 9017 9018 9019 901A 901B 901C 901D 901E 901F 9020 9021

LABEL

GO

MNEMONICS OPCODE OPERAND MVI

C,00H

LXI

H,8000H

MVI INX MOV ADD INX MOV ADD INX MOV ADD INX MOV ADD INX MOV ADD

A,M H B,M B H B,M B H B,M B H B,M B H B,M B

JNC

GO 9019

INR

C

STA

8050

MOV

A,C

STA

8001H

HLT

HEX CODE 0E 00 21 00 80 7E 23 46 80 23 46 80 23 46 80 23 46 80 23 46 80 D2 19 90 0C 32 50 80 79 32 32 01 80 76

COMMENT Initialize C register Load memory location with the memory location 8000 Move memory content to A Increment HL pair Move data from memory to B Add the content of B to A Increment HL pair Move data from memory to B Add the content of B to A Increment HL pair Move data from memory to B Increment HL pair Move data from memory to B Increment HL pair Move data from memory to B Add the content of B to A Jump if carry is not zero Increment the content of C Store the content of A in the memory location 8050 Move data from C to A Store the content of A in the memory location 8001 Stop

Steps for execution of the program: 1. 2. 3. 4. 5.

Reset the microprocessor by pressing “RESET” For typing the OPCODE press “Exam Memory” Load data in five consecutive memory locations. (e.g. load in 8000 to 8004) Then type the starting address of the program, i.e. 9000 in this case. Then press “NEXT” and enter the HEX Code for the corresponding OPCODE 23

6. Then press “NEXT” and enter the HEX Code for the corresponding OPERAND 7. Repeat the steps 4 and 5 up to the end of the program. 8. Then press “NEXT” 9. Then press “RESET” 10. Then press “GO” 11. Then type the starting address of the program , i.e. 9000 in this case 12. Then press “EXECUTE” 13. Then press “RESET” 14. Then press “Exam Memory” 15. Enter the memory location assigned for the result. 16. Press “NEXT”

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MULTIPLY TWO 8-BIT NUMBERS AND SAVE THE RESULT AND CARRY IN TWO CONSECUTIVE MEMORY LOCATIONS: MEMORY LOCATION 9000 9001 9002 9003 9004

LABEL

MNEMONICS OPCODE OPERAND XRA A MOV B,A

HEX CODE AF 47 21 00 80

LXI

H,8000H

9005

MOV

C,M

4E

9006 9007 9008

INX MOV ADD

H D,M C

23 56 89

DCR

D

15

JNZ

LOOP1 (9008)

JNC

GO 9011

INR

B

STA

8050H

MOV

A,B

STA

8051H

LOOP1

9009 900A 900B 900C 900D 900E 900F 9010 9011 9012 9013 9014 9015 9016 9017 9018

GO

HLT

25

C2 08 90 D2 11 90 04 32 50 80 78 32 51 80 76

COMMENT Clear A Move the content of A to B Load HL pair with 8000 address Move the content of the memory to C Increment of HL pair Move the content of memory to D Add the content of C to A Make decrement of the content of D Jump if not zero

Jump if carry is not zero Increment the content of B Store in memory location 8050 Move the content of B to A Store in the memory location 8051 Stop