Instr Set Of 8051

8051 Microcontroller – Architecture, Intro to Assembly Programming EE4380 Fall 2002 Class 2

Pari vallal Kannan Center for Integrated Circuits and Systems University of Texas at Dallas

Class –2: Objective l l l l l l

8051 internal architecture Register Set Instruction Set Memory Map Intro to Stack, SFRs Assembly language programming

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8051 Architecture l

Programmer’s View – – –

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Register Set Instruction Set Memory map

Hardware Designer’s View – – –

Pinout Timing characteristics Current / Voltage requirements

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Programmer’s View – Register Set l

Registers – – – – – – –

A, B, R0 to R7 : 8 bit registers DPTR : [DPH:DPL] 16 bit register PC : Program Counter (Instruction Ptr) 16bits 4 sets of register bank R0-R7 Stack pointer SP PSW : Program Status Word (a.k.a Flags) SFR : Special Function Registers l

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Control the on-board peripherals

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Assembly – Absolute Basics l

Intel Assembly format Operation destination source

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Values are to be preceded by a # sign –

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#55, #32 etc

Hex values are to be followed by H –

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; comment

#55H, #32H

If the first figure in a hex quantity is a letter (AF) then a 0 must precede it –

#0FFH, #0C1H, #0D2H

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Register Set – Accumulator A, ACC l l

Commonly used for moving data around, logic and arithmetic operations on 8bit data Examples mov A, R0 push ACC mov A, #10 mov B, A mov A, 10 mov A, 0xFF mov A, 0FFH

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;copy contents of R0 to A ;store A onto stack ;A ß 10 ;B ß A ;A ß mem(10) ;A ß 0xFF ;same as above

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Register Set – B Register l l

Commonly used as a temporary register, much like a 9th R register Used by two opcodes –

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mul AB, div AB

B register holds the second operand and will hold part of the result – –

Upper 8bits of the multiplication result Remainder in case of division

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Register Set – R0 to R7 l l l l l l

Set of 8 registers R0, R1, … R7, each 8 bit wide Widely used as temporary registers Available in 4 banks (effectively 4x8 registers) Bank is chosen by setting RS1:RS0 bits in PSW Default bank (at power up) is the bank0 Examples mov R0, A mov A, R0 mov R1, #45

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;R0 ß A ;A ß R0 ;R1 ß 45

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Registers - DPTR l l l

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16 bit register, called Data Pointer Used by commands that access external memory Also used for storing 16bit values mov DPTR, #data16

; setup DPTR with 16bit ext address

movx A, @DPTR

; copy mem[DPTR] to A

DPTR is useful for string operations, look up table (LUT) operations

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Registers - PC l l l l

PC is the program counter Referred to as the Instruction Pointer (IP) in other microprocessors PC points to the next program instruction always After fetching an instruction (1 or multi byte), PC is automatically incremented to point to the next instruction

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Registers - SP l l

SP is the stack pointer SP points to the last used location of the stack – –

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push will first increment SP and then copy data pop will first copy data and then decrement SP

In 8051, stack grows upwards (from low mem to high mem) and can be in the internal RAM only On power-up, SP is at 07H Register banks 2,3,4 (08H to 1FH) is the default stack area Stack can be relocated by setting SP to the upper memory area in 30H to 7FH –

mov SP, #32H

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Registers - PSW l l

Program Status Word is a “bit addressable” 8bit register that has all the flags CY - Carry Flag –

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AC - Aux. Carry Flag –

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Carry from D3 to D4. Used for BCD operation

P - Parity Flag – –

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Set whenever there is a carry in an arithmetic operation

P=1 if A has odd number of 1s Even parity

OV - Overflow Flag –

Set if any arithmetic operation causes an overflow

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Flags - Illustration l

Addition example – –

mov A, #38 add A, #2F

38 + 2F --------67 --------CY = 0 AC = 1 P =1

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0011 1000 0010 1111 --------------0110 0111 ---------------

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Registers - SFRs l

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Control the operation of on-board peripherals Special Function Registers at direct addresses 80H to FFH 8051 Clones may have additional SFRs All registers have an address 21-Jan-03

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8051 Memory map l l

Separate Code and Data memory Code Memory – – –

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Data Memory – – –

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Upto 64K long (some maybe onboard) (0x0000 to 0xFFFF) PSEN is the controlling signal Can store Program only (Read only) Upto 64K long (0x0000 to 0xFFFF) RD/WR are the controlling signals Can store data only (Read and Write)

Internal RAM – –

128 bytes 0x00 to 0x7F (includes register banks) SFRs 0x80 to 0xFF (not all available)

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8051 - Memory Map Memory Type

Start

End

IRAM

0x00

0x7F

Data

0x0000

0xFFFF

RD, WR

movx A, @DPTR

Code

0x0000

0xFFFF

PSEN

movc A,@A+DPTR

SFRs

0x80

0xFF

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Signal

Instruction mov A, xxH mov @Ri

mov A, xxH

Internal ROM is vendor dependant On power-up PC starts at 0000H in ROM space Clones may have internal memory that may be used as both Code+Data 21-Jan-03

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8051 – Instruction Set l

Data Transfer – –

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Logical – –

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Perform arithmetic operations on data add, addc, subb, inc, dec, mul, div

Program control – –

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Perform logic operations on data anl, orl, xrl, clr, cpl, rl, rlc, rr, rrc, swap

Arithmetic –

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Move/Copy data from one location to another mov, movc, movx, push, pop, xch, xchd

Control the program flow (jumps, subroutine calls) jmp, ajmp, ljmp, sjmp, jc, jnc, jb, jnb, jbc, jz, jnz, acall, lcall, cjne, djnz, ret, reti

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8051 – Instruction Set (contd.) l

Read through the instruction set – –

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Don’t have to remember all the instructions Don’t have to remember all possible cases

Remember the types of instructions When writing code – –

Write down the operation needed in simple English Lookup the instruction set to see which (combo) of instructions will do the job

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Assembly à Opcode l

Every assembly instruction translates to a unique binary Opcode – –

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Example1: mov A, #data – – –

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Can be 1, 2 or 3 bytes long 8051 Family Programmers Guide has a list 2 bytes, 1 cycles 0111 0100 data8 mov A, 0xAA è 0111 0100 1010 10101 è 74 AA

Example2: acall address11 – –

a10 a9 a8 1 0001 a7 a6 a5 a4 a3 a2 a1 a0 acall 0x557 è 101 1 0001 0101 0111 è B1 57

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Assembler Directives l

Assembly statement structure [label:] opcode [operands] [;comment] start: mov A, #D0H ;code starts here

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Assembler directives Instruct assembler to do a special task – –

ORG xxxxH EQU l

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count EQU 25

DB l

: define byte, defines allocation of storage DATA1: DATA2:

END

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: origin, start assembling at xxxxH : define a constant

DB DB

28 “hello world”

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Assembly Design Flow l l

Create the assembly source file test.asm Assemble the asm file C:\> as51 test.asm – Assembler produces error and code list in test.lst – If no errors, assembler produces .obj file

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Link the .obj files to produce an .abs file Create hex file from the .abs file Most assemblers directly produce the .hex file Download the .hex file onto the board or burn it into an EPROM.

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Assembly Example #1 l

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Target 8051 dev system – – –

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Std 8051 device 2K on-chip ROM running a monitor program 32K external RAM at address 0x0000 to 0x7FFF This RAM is both code and data First 0x30 locations in external RAM is dedicated for the Interrupt Vector Table (IVT)

Program to fill up the first 4 registers in the register bank with some numbers and find their sum

Start:

clearA: Addup:

Done:

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ORG 0x30 ;skip the IVT area mov R0, #10 mov R1, #0A5H mov R2, #1 mov R3, #0x20 mov A, #0 ;now A = 0 add A, R0 ;now A = A + R0 add A, R1 add A, R2 add A, R3 mov R4, A ;store sum in R4 mov DPTR, #7FFF movx @DPTR, A ;store in ext. mem sjmp done ;loop here forever END

Class –2 Review l l l l l l l

What are the different views/models of a uP ? What are the registers available in the 8051 ? What are the functions of the 8051 registers ? What is stack, PC, SFR, PSW/Flags ? What is an instruction set ? What is a memory map ? Why is it needed ? What is an assembly language program ? How does it look ?

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