Em-unit-4

UNIT-4 8085 MICROPROCESSOR

Topics v Block diagram of microcomputer v Architecture of 8085-Pin configuration v Instruction set-Addressing modes v Simple programs using arithmetic and logical operations.

I/O STRUCTURE OF A TYPICAL MICROCOMPUTER: There are three major types of data transfer between the microcomputer and art I/O device. They are, • Programmed I/O : In programmed I/O the data transfer is accomplished through an I/O port and controlled by software. • Interrupt driven I/O : In interrupt driven I/O, the I/O device will interrupt the processor, and initiate data transfer. • Direct memory access (DMA) : In DMA, the data transfer between memory and I/O can be performed by bypassing the microprocessor.

I/O structure of a typical microcomputer

MICROPROCESSOR ARCHITECTURE :

Architecture of 8085 Microprocessor

8085 Bus Structure: Address Bus: • The address bus is a group of 16 lines generally identified as A0 to A15. • The address bus is unidirectional : bits flow in one direction—from the MPU to peripheral devices. • The MPU uses the address bus to perform the first function : identifying a peripheral or a memory location.

8085 Bus Structure

Data Bus: • The data bus is a group of eight lines used for data flow. • These lines are bi-directional - data flow in both directions between the MPU and memory and peripheral devices. • The MPU uses the data bus to perform the second function : transferring binary information . • The eight data lines enable the MPU to manipulate 8-bit data ranging from 00 to FF (28 = 256 numbers). • The largest number that can appear on the data bus is 11111111. Control Bus: • The control bus carries synchronization signals and providing timing signals. • The MPU generates specific control signals for every operation it performs. These signals are used to identify a device type with which the MPU wants to communicate.

Registers of 8085:

• • •

The 8085 have six general-purpose registers to store 8-bit data during program execution. These registers are identified as B, C, D, E, H, and L. They can be combined as register pairs—BC, DE, and HL—to perform some 16bit operations.

Accumulator (A): • The accumulator is an 8-bit register that is part of the arithmetic/logic unit (ALU). • This register is used to store 8-bit data and to perform arithmetic and logical operations. • The result of an operation is stored in the accumulator. Flags: • The ALU includes five flip-flops that are set or reset according to the result of an operation. • The microprocessor uses the flags for testing the data conditions. • They are Zero (Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags. The most commonly used flags are Sign, Zero, and Carry. • The bit position for the flags in flag register is, D7 D6 D5 D4 D3 D2 D1 D0 S Z AC P CY

(1)

Sign Flag (S): • After execution of any arithmetic and logical operation, if D7 of the result is 1, the sign flag is set. Otherwise it is reset. • D7 is reserved for indicating the sign; the remaining is the

magnitude of number.

• (2)

If D7 is 1, the number will be viewed as negative number. If D7 is 0, the number will be viewed as positive number.

Zero Flag (z): If the result of arithmetic and logical operation is zero, then zero flag is set otherwise it is reset. Auxiliary Carry Flag (AC): If D3 generates any carry when doing any arithmetic and logical operation, this flag is set. Otherwise it is reset. Parity Flag (P): If the result of arithmetic and logical operation contains even number of 1’s then this flag will be set and if it is odd number of 1’s it will be reset. Carry Flag (CY): If any arithmetic and logical operation results any carry then carry flag is set otherwise it is reset.

(3) (4)

(5)

Arithmetic and Logic Unit (ALU): • • •

It is used to perform the arithmetic operations like addition, subtraction, multiplication, division, increment and decrement and logical operations like AND, OR and EX-OR. It receives the data from accumulator and registers. According to the result it set or reset the flags.

Program Counter (PC): • • • •

This 16-bit register sequencing the execution of instructions. It is a memory pointer. Memory locations have 16-bit addresses, and that is why this is a 16-bit register. The function of the program counter is to point to the memory address of the next instruction to be executed. When a opcode is being fetched, the program counter is incremented by one to point to the next memory location.

Stack Pointer (Sp): • • •

The stack pointer is also a 16-bit register used as a memory pointer. It points to a memory location in R/W memory, called the stack. The beginning of the stack is defined by loading a 16-bit address in the stack pointer (register).

Temporary Register: It is used to hold the data during the arithmetic and logical operations.

Instruction Register: When an instruction is fetched from the memory, it is loaded in the instruction register.

Instruction Decoder: It gets the instruction from the instruction register and decodes the instruction. It identifies the instruction to be performed.

Serial I/O Control: It has two control signals named SID and SOD for serial data transmission.

Timing and Control unit: •

• • • •

It has three control signals ALE, RD (Active low) and WR (Active low) and three status signals IO/M(Active low), S0 and S1. ALE is used for provide control signal to synchronize the components of microprocessor and timing for instruction to perform the operation. RD (Active low) and WR (Active low) are used to indicate whether the operation is reading the data from memory or writing the data into memory respectively. IO/M(Active low) is used to indicate whether the operation is belongs to the memory or peripherals. If, IO/M(Active S1 S2 Data Bus Status(Output) Low) 0

0

0

Halt

0

0

1

Memory WRITE

0

1

0

Memory READ

1

0

1

IO WRITE

1

1

0

IO READ

0

1

1

Opcode fetch

1

1

1

Interrupt acknowledge

Interrupt Control Unit:

It receives hardware interrupt signals and sends an acknowledgement for receiving the interrupt signal.

PIN DETAILS OF 8085 The signals can be grouped as follows 1. Power supply and clock signals 2. Address bus 3. Data bus 4. Control and status signals 5. Interrupts and externally initiated signals 6. Serial I/O ports

1. Power supply and Clock frequency signals: • • • • •

Vcc + 5 volt power supply Vss Ground X1, X2 : Crystal or R/C network or LC network connections to set the frequency of internal clock generator. The frequency is internally divided by two. Since the basic operating timing frequency is 3 MHz, a 6 MHz crystal is connected externally. CLK (output)-Clock Output is used as the system clock for peripheral and devices interfaced with the microprocessor.

Pin Diagram of 8085

Logical Schematics of 8085

2. Address Bus: • •

A8 — A15 (output; 3-state) It carries the most significant 8 bits of the memory address or the 8 bits of the I/O address;

3. Multiplexed Address / Data Bus: • • • • •

AD0 — AD7 (input/output; 3-state) These multiplexed set of lines used to carry the lower order 8 bit address as well as data bus. During the opcode fetch operation, in the first clock cycle, the lines deliver the lower order address A0 - A7. In the subsequent IO / memory, read / write clock cycle the lines are used as data bus. The CPU may read or write out data through these lines.

4. Control and Status signals: •

ALE (output) - Address Latch Enable. This signal helps to capture the lower order address presented on the multiplexed address / data bus. • RD (output 3-state, active low) — Read memory or IO device. This indicates that the selected memory location or I/O device is to be read and that the data bus is ready for accepting data from the memory or I/O device. • WR (output 3-state, active low) - Write memory or IO device. This indicates that the data on the data bus is to be written into the selected memory location or I/O device. • IO/M (output) - Select memory or an IO device. Ø This status signal indicates that the read / write operation relates to whether the memory or I/O device. Ø It goes high to indicate an I/O operation. Ø It goes low for memory operations.

5. Status Signals:

• It is used to know the type of current operation of the microprocessor. IO/M(Active S1 Low)

S2

Data Bus Status (Output)

0

0

0

Halt

0

0

1

Memory WRITE

0

1

0

Memory READ

1

0

1

IO WRITE

1

1

0

IO READ

0

1

1

Opcode fetch

1

1

1

Interrupt acknowledge

6. Interrupts and Externally initiated operations: • •

They are the signals initiated by an external device to request the microprocessor to do a particular task or work. There are five hardware interrupts called,

•

On receipt of an interrupt, the microprocessor acknowledges the interrupt by the active low INTA (Interrupt Acknowledge) signal.

Reset In (input, active low) • This signal is used to reset the microprocessor. • The program counter inside the microprocessor is set to zero. • The buses are tri-stated. Reset Out (Output) • It indicates CPU is being reset. • Used to reset all the connected devices when the microprocessor is reset.

7. Direct Memory Access (DMA): Tri state devices:

• •

3 output states are high & low states and additionally a high impedance state. When enable E is high the gate is enabled and the output Q can be 1 or 0 (if A is 0, Q is 1, otherwise Q is 0). However, when E is low the gate is disabled and the output Q enters into a high impedance state. E

A

Q

State

1(high)

0

1

High

1

1

0

0(low)

0

0

0

1

0

Low High impedance High impedance

• • • • • •

For both high and low states, the output Q draws a current from the input of the OR gate. When E is low, Q enters a high impedance state; high impedance means it is electrically isolated from the OR gate’s input, though it is physically connected. Therefore, it does not draw any current from the OR gate’s input. When 2 or more devices are connected to a common bus, to prevent the devices from interfering with each other, the tristate gates are used to disconnect all devices except the one that is communicating at a given instant. The CPU controls the data transfer operation between memory and I/O device. Direct Memory Access operation is used for large volume data transfer between memory and an I/O device directly. The CPU is disabled by tri-stating its buses and the transfer is effected directly by external control circuits. HOLD signal is generated by the DMA controller circuit. On receipt of this signal, the microprocessor acknowledges the request by sending out HLDA signal and leaves out the control of the buses. After the HLDA signal the DMA controller starts the direct transfer of data.

READY (input) • Memory and I/O devices will have slower response compared to microprocessors. • Before completing the present job such a slow peripheral may not be able to handle further data or control signal from CPU. • The processor sets the READY signal after completing the present job to access the data. • The microprocessor enters into WAIT state while the READY pin is disabled.

8. Single Bit Serial I/O ports: • • •

SID (input) SOD (output)

- Serial input data line - Serial output data line

These signals are used for serial communication.

8085 INSTRUCTION SET: The 8085 instruction set can be classified into the following five functional headings. 1. DATA TRANSFER INSTRUCTIONS : Includes the instructions that moves (copies) data between registers or between memory locations and registers. In all data transfer operations the content of source register is not altered. Hence the data transfer is copying operation. 2. ARITHMETIC INSTRUCTIONS: Includes the instructions, which performs the addition, subtraction, increment or decrement operations. The flag conditions are altered after execution of an instruction in this group. 3. LOGICAL INSTRUCTIONS: The instructions which performs the logical operations like AND, OR, EXCLUSIVE- OR, complement, compare and rotate instructions are grouped under this heading. The flag conditions are altered after execution of an instruction in this group. 4. BRANCHING INSTRUCTIONS: The instructions that are used to transfer the program control from one memory location to another memory location are grouped under this heading. 5. MACHINE CONTROL INSTRUCTIONS: Includes the instructions related to interrupts and the instruction used to halt program execution. 1. ACI: Add Immediate to Accumulator with Carry.

Description: The 8-bit data (operand) and the Carry flag are added to the contents of the accumulator, and the result is stored in the accumulator. All flags are modified to reflect the result of the addition. 2. ADC: Add Register to Accumulator with Carry Description: The contents of the operand (register or memory) and the Carry flag are added to the contents of the accumulator and the result is placed in the accumulator. The contents of the operand are not altered; however, the previous Carry flag is reset. All flags are modified to reflect the result of the addition. 3. ADD: Add Register to Accumulator Description: The contents of the operand (register or memory) are added to the contents of the accumulator and the result is stored in the accumulator. If the operand is a memory location, that is indicated by the 16-bit address in the HL register. All flags are modified to reflect the result of the addition. 4. ADI: Add Immediate to Accumulator Description : The 8-bit data (operand) are added to the contents of the accumulator, and the result is placed in the accumulator. All flags are modified to reflect the result of the addition. 5. ANA: Logical AND with Accumulator Description: The contents of the accumulator are logically ANDed with the contents of the operand (register or memory), and the result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of HL registers. Flags S, Z, P are modified to reflect the result of the operation. CY is reset. In 8085 AC is set. 6. ANI: AND Immediate with Accumulator Description: The contents of the accumulator are logically ANDed with the 8-bit data (operand) and the results are placed in the accumulator. Flags S, Z, P are modified to reflect the results of the operation. CY is reset. In 8085, AC is set. 7. CALL: Unconditional Subroutine Call Description: The program sequence is transferred to the address specified by the operand. Before the transfer, the address of the next instruction to CALL (the contents of the program counter) is pushed on the stack. 8. CMA: Complement Accumulator

Description: The contents of the accumulator are complemented. No flags are affected. 9. CMC: Complement Carry. Description: The carry flag is complemented. 10. CMP: Compare with Accumulator. Description: The contents of the operand (register or memory) are compared with the contents of the accumulator. 11. CPI: Compare Immediate with Accumulator Description: The second byte (8-bit data) is compared with the contents of the accumulator. 12. DAA: Decimal-Adjust Accumulator Description: The contents of the accumulator are changed from a binary value to two 4bit binary-coded decimal (BCD) digits. This is the only instruction that uses the auxiliary flag (internally) to perform the binary-to-BCD conversion. Flags S, Z, AC, P. CY flags are altered to reflect the results of the operation. 13. DAD: Add Register Pair to H and L Registers Description: The 16-bit contents of the specified register pair are added to the contents of the HL register and the sum is saved in the HL register. The contents of the source register pair are not altered. If the result is larger than 16 bits the CY flag is set. No other flags are affected.

14. DCR: Decrement Source by 1 Description: The contents of the designated register/memory are decremented by 1 and the results are stored in the same place. If the operand is a memory location, it is specified by the contents of the HL register pair. Flags S. Z, P, AC are modified to reflect the result of the operation. CY is not modified. 15. DCX: Decrement Register Pair by 1 Description: The contents of the specified register pair are decremented by 1. This instruction views the contents of the two registers as a 16-bit number. No flags are affected. 16. DI: Disable Interrupts

Description: The Interrupt Enable flip-flop is reset and all the interrupts except the TRAP (8085) are disabled. No flags are affected. 17. El: Enable Interrupts Description: The Interrupt Enable flip-flop is set and all interrupts are enabled. No flags are affected. 18. HLT: Halt and Enter Wait State Description: The MPU finishes executing the current instruction and halts any further execution. The MPU enters the Halt Acknowledge machine cycle and Wait states are inserted in every clock period. The address and the data bus are placed in the high impedance state. The contents of the registers are unaffected during the HLT state. An interrupt or reset is necessary to exit from the Halt state. No flags are affected. 19. IN: Input Data to Accumulator from a Port with 8-bit Address Description: The contents of the input port designated in the operand are read and loaded into the accumulator. No flags are affected. 20. INR: Increment Contents of Register/Memory by 1 Description: The contents of the designated register/memory are incremented by I and the results are stored in the same place. If the operand is a memory location, it is specified by the contents of HL register pair. Flags S. Z, P, AC are modified to reflect the result of the operation. CY is not modified. 21. INX: Increment Register Pair by 1 Description: The contents of the specified register pair are incremented by 1. The in struction views the contents of the two registers as a 16-bit number. No flags are affected. 22. JMP: Jump Unconditionally. Description: The program sequence is transferred to the memory location specified by the 16-bit address. This is a 3-byte instruction; the second byte specified the low-order byte and the third byte specifies the high-order byte. No flags are affected.

Jump Conditionally: Description: Jump on carry Jump on No carry Jump on Positive Jump on minus Jump on Parity Even

Jump on parity Odd Jump on Zero Jump on No Zero 23. LDA: Load accumulator Direct Description: The contents of a memory location, specified by a 16-bit address in the operand, are copied to the accumulator. The contents of the source are not altered. This is a 3-byte instruction; the second byte specifies the low-order address and the third byte specifies the high-order address. No flags are affected. 24. LDAX: Load Accumulator Indirect. Description: The contents of the designated register pair point to a memory location. This instruction copies the contents of that memory location into the accumulator. The contents of either the register pair or the memory location are not altered. No flags are affected. 25. LD: Load H and L Registers Direct Description: The instruction copies the contents of the memory location pointed out by the 16-bit address in register L and copies the contents of the next memory location in register H. The contents of source memory locations are not altered. No flags are affected. 26. Load Register Pair Immediate Description: The instruction loads 16-bit data in the register pair designated in the operand. This is a 3-byte instruction; the second byte specifies the low-order byte and third byte specifies the high-order byte. 27. MOV: Move – Copy from Source to Destination. Description: This instruction copies the contents of the source register into the destination register; the contents of the source register are not altered. If one of the operand is a memory location, it is specified by the contents of HL registers. No flags are affected. 28. MVI: Move Immediate 8-Bit Description: The 8-bit data is stored in the destination register or memory. If the operand is a memory location, it is specified by the contents of HL registers. No flags are affected. 29. NOP: No Operation

Description: No operation is performed. The instruction is fetched and decoded; how ever, no operation is executed. No flags are affected. 30. ORA: Logically OR with Accumulator Description: The contents of the accumulator are logically OR with the contents of the operand (register or memory), and the results are placed in the accumulator. If the operand is a memory location, its address is specified by the contents of HL registers. Flags Z, S, P are modified to reflect the results of the operation. AC and CY are reset. 31. ORI: Logically OR Immediate Description: The contents of the accumulator are logically OR with the 8-bit data in the operand and the results are placed in the accumulator. Flags S, Z, P are modified to reflect the results of the operation. CY and AC are reset. 32. OUT: Output Data from Accumulator to a Port with 8-Bit Address Description: The contents of the accumulator are copied into the output port specified by the operand. Flags No flags are affected. 33. PCHL: Load Program Counter with HL Contents Description: The contents of registers H and L are copied into the program counter. The contents of H are placed as a high-order byte and of L as a low-order byte. No flags are affected. 34. POP: Pop off Stack to Register Pair Description: The contents of the memory location pointed out by the stack pointer register are copied to the low-order register (such as C, E, L, and flags) of the operand. The stack pointer is incremented by 1 and the contents of that memory location are copied to the high-order register (B, D, H, A) of the operand. The stack pointer register is again incremented by 1. No flags are modified. 35. PUSH: Push Register Pair onto Stack Description: The contents of the register pair designated in the operand are copied into the stack in the following sequence. The stack pointer register is decremented and the contents of the high-order register (B, D, H, A) are copied into that location. The stack pointer register is decremented again and the contents of the low-order register (C, E, L, flags) are copied to that location. No flags are modified. 36. RAL: Rotate Accumulator Left through Carry

Description: Each binary bit of the accumulator is rotated left by one position through the Carry flag. Bit D is placed in the bit in the Carry flag and the Carry flag is placed in the least significant position D. Flags CY is modified to bit D S, Z, AC, P are not affected. 37. RAR: Rotate Accumulator Right through Carry Description: Each binary bit of the accumulator is rotated right by one position through the Carry flag. Bit D is placed in the Carry flag and the bit in the Carry flag is placed in the most significant position, D. Flags CY is modified according to bit D S, Z, P, AC are not affected. 38. RLC: Rotate Accumulator Left Description: Each binary bit of the accumulator is rotated left by one position. Bit D is placed in the position of D as well as in the Carry flag. Flags CY is modified according to bit D S, Z, P, AC are not affected. 39. RRC: Rotate Accumulator Right Description: Each binary bit of the accumulator is rotated right by one position. Bit D is placed in the position of D as well as in the Carry flag. Flags CY is modified according to bit Do. S. Z, P, AC are not affected. 40. RET: Return from Subroutine Unconditionally. Description: The program sequence is transferred from the subroutine to th4e calling program. The two bytes from the top of the stack are copied into the program, counter and the program execution begins at the new address. The instruction is equivalent to POP Program Counter. No flags are affected. 41. RIM: Read Interrupt Mask. Description: This is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and to read serial data input bit. No flags are affected. 42. RST: Restart. Description: The RST instructions are equivalent to 1-byte call instruction to one of the eight memory locations on page 0. The instructions are generally used in conjuction with interrupts and inserted using external hardware. However, these can be used as software instructions in a program to transfer program execution to one of the eight locations. No flags are affected. 43. SBB: Subtract Source and Borrow from Accumulator.

Description: The contents of the operand (register or memory) and the Borrow flag are subtracted from the contents of the accumulator and the results are placed in the accumulator. The contents of the operand are not altered; however, the previous Borrow flag is reset. All flags are altered to reflect the result of the subtraction. 44. SBI: Subtract Immediate with Borrow. Description: The 8-bit data (operand) and the borrow are subtracted from the contents of the accumulator, and the results are placed in the accumulator. All flags are altered and the results are placed in the accumulator. 45. SHLD: Store H and L Register Direct. Description: The contents of register L are stored in the memory location specified by the 16 bit address in the operand, and the contents of H register are stored in the next memory location by incrementing the operand. The contents of registers HL are not altered. This is a 3-byte instruction; the second byte specifies the low-order address and the third byte specifies the high order address. No flags are affected. 46. SIM: Set Interrupt Mask. Description: This is a multipurpose instruction and used to implement the 8085 interrupts (RST 7.5,6.5 and 5.5) and serial data output.\ 47. SPHL: Copy H and L Registers to the Stack Pointer. Description: The instruction loads the contents of the H and L registers into the stack pointer register; the contents of the H register provide the High order address, and the contents of the L register provide the low order address. The contents of the H and L registers are not altered. No flags are affected. 48. STA: Store Accumulator Direct. Description: The contents of the accumulator are copied to a memory location specified by the operand. This is a 3-byte instruction; the second byte specifies the low order address and the third byte specifies the high order address. No flags are affected. 49. STAX: Store Accumulator Indirect. Description: The contents of the accumulator are copied into the memory location specified by the contents of the operand (register pair). The contents of the accumulator are not altered. No flags are affected. 50. STC: Set Carry. Description: The carry flag is set to 1. No other flags are affected.

51. SUB: Subtract Register or Memory from Accumulator. Description: The contents of the register or the memory location specified by the operand are subtracted from the contents of the accumulator, and the results are placed in the accumulator. The contents of the source are not altered. All flags are affected to reflect the result of the subtraction. 52. SUI: Subtract Immediate from Accumulator. Description: The 8-bit data (the operand) are subtracted from the contents of the accumulator and the results are placed in the accumulator. All flag are modified to reflect the results of the subtraction. 53. XCHG: Exchange H and L with D and E. Description: The contents of register H are exchanged with the contents of register D and the contents of register L are exchanged with the contents of register E. No flags are affected. 54. XRA: Exclusive OR with Accumulator. Description: The contents of the operand (register or memory) are Exclusive OR with the contents of the accumulator, and the results are placed in the accumulator. The contents of the operand are not altered. Z,S,P are altered to reflect the results of the operation. CY and AC are reset.

55. XRI: EXCLUSIVE OR Immediate with Accumulator. Description: The 8 bit data (operand) are exclusive ORed with the contents of the accumulator, and the result are placed in the accumulator. Z,S,P are altered to reflect the results of the operation. CY and AC are reset. 56. XTHL: Exchange H and L with Top of Stack. Description: The contents of the L register are exchanged with the stack location pointed out by the contents of the stack pointer register. The contents of the H register are exchanged with the next stack location (SP+1); however, the contents of the stack pointer register are not altered. No flags are affected.

ADDRESSING MODES: • •

Every instruction of a program has to operate on a data. The method of specifying the data to be operated by the instruction is called Addressing.

•

The 8085 has the following 5 different types of addressing. 1. Immediate Addressing 2. Direct Addressing 3. Register Addressing 4. Register Indirect Addressing 5. Implied Addressing

Immediate Addressing: In immediate addressing mode, the data is specified in the instruction itself. The data will be a part of the program instruction. Eg. MVI B, 3EH - Move the data 3EH given in the instruction to B register.

Direct Addressing: In direct addressing mode, the address of the data is specified in the instruction. The data will be in memory. In this addressing mode, the program instructions and data can be stored in different memory. Eg. LDA 1050H - Load the data available in memory location 1050H in to accumilator..

Register Addressing: In register addressing mode, the instruction specifies the name of the register in which the data is available. Eg. MOV A, B - Move the content of B register to A register.

Register Indirect Addressing: In register indirect addressing mode, the instruction specifies the name of the register in which the address of the data is available. Here the data will be in memory and the address will be in the register pair. Eg. MOV A, M - The memory data addressed by H L pair is moved to A register.

Implied Addressing: In implied addressing mode, the instruction itself specifies the data to be operated. Eg. CMA - Complement the content of accumulator. ASSEMBLY LANGUAGE PROGRAMMING: ASSEMBLER: An ASSEMBLER is a program, which is used to translate assembly language program to correct binary code for each instruction.

Types of assembler: 1. One pass assembler: • It is an assembler in which the source codes are processed only once. • Very fast. • Backward reference only used.

•

It issues an error message if it encounters a label or variable that is defined at a later end of a program. So it cannot have forward references. 2. Two pass assembler: • The source codes are processed two times. • In the first pass it assigns addresses to all the labels and attach values to all the variables used in the program. • In the second pass it converts the source code into machine code.

Advantages of assembler: • • • • • •

Translates mnemonics into binary code with speed and accuracy. Allows the programmer to use variables in the program. It is easier to alter the program and reassemble. It identifies the syntax error. It can reserve memory locations for data or result. It provides list file for documentation.

Assembler directives: • • • •

They are the instructions to the assembler regarding the program being assembled. Also called as pseudo instructions or pseudo opcodes. They will give information’s like start and end of program, values of variables used in the program, storage locations of output and input data etc. Assemblers are ORG origin of a program END End of program EQU Equate DB Define Byte DW Define Word DS Define Storage

SUBROTINE: • It is a group of instructions written separately from the main program to perform a function that occurs repeatedly in the main program. • It is called in the main program by using CALL addr16 instruction. The addr16 is the starting address of subroutine. • It should be terminated by RET instruction.

Advantage of subroutine: •

Modular programming: The various tasks in a program can be developed as separate modules and called in the main program.

• •

Reduction in the amount of work and program development time. Reduces memory requirement for program storage.

DELAY ROUTINE: It is a subroutine used for maintaining the timings of various operations in microprocessor.

List: • • • •

List is a linked data structure used in programming techniques. The linked data structure will have a number of components linked in a particular fashion. Each component will consist of a string data and a pointer to next component. Types of list are, • Linear linked lists • Linked list with multiple pointers • Circular inked list • Tress

Array: • •

It is a series of data of the same type stored in successive memory locations. EACH value in the array is referred to as an element of the array.

Flow chart: • • •

It is a graphical representation of the operation flow of the program. It is a graphical form of algorithm. Symbols used for flow chart are, Symbol

Operation

Race track shape box To indicate the start or end of the program Parallelogram To represent input or output operation Rectangular box Rectangular box with double lines on vertical sides

To represent simple operations other than I/O operations

To represent a subroutine or procedure

Diamond shaped box To represent the decision point

Small circle

Five sided box

Line Arrow

It is used as a connector to show the connections between various part of flowchart within a page. Identical numbers are entered inside the boxes that represent the same connecting point. It is used as a off-page connector to show the connections between various sections of flowchart in a different page. Identical numbers are entered inside the boxes that represent the same connecting point. The lines are drawn between boxes and diamonds to indicate the program flow and the arrow is placed on the lines to indicate the direction of flow.

ASSEMBLY LANGUAGE PROGRAMMING DEVELOPMENT TOOLS: 1. Editor: It is a program which when run on a microcomputer system, allows the user to type and modify the assembly language program statements. The main use of editor is to help the user to construct the assembly language program in the right format and save as a file. 2. Assembler: An ASSEMBLER is a program, which is used to translate assembly language program to correct binary code for each instruction. 3. Linker: A program used to join together several object files into one large object file.

4. Locator: A program used to assign specific addresses to the object codes to be loaded into memory. 5. Debugger: It is software used to locate and troubleshoot the errors in a program. 6. Simulator: A program, which can be run on the development system to simulate the operations of the newly designed system. Some of the operations that can be simulated are given below. • Execute a program and display the result. • Single step execution of a program. • Break-point execution of a program. • Display the content of register/memory. 7. Emulator: A system that can be used to test the hardware and software of a newly developed microprocessor based system.

ADDITION OF TWO 8-BIT NUMBERS PROGRAM: MEMORY ADDRESS

MNEMONICS

OPCODE

COMMENTS

8000

MVI C, 00H

0E

Initialize ‘C’ register to store the carry

8001 8002

00 LXI H, 9000

21

8003

00

8004

90

Load the HL register pair with 9000H memory address to get the first data

8005

MOV A, M

7E

Move the memory content to the accumulator

8006

INX H

23

Increment the HL register pair to get the second data

8007

ADD M

86

Add the memory content with the accumulator

8008

JNC 800C

D2

If no carry comes, go to the address 800C

8009

0C

800A

80

800B

INR C

0C

Increment ‘C’ register for carry

800C

STA 9500

32

Store the accumulator content in the memory addressed by 9500

800D

00

800E

95

800F

MOV A, C

79

Move the carry to the accumulator

8010

STA 9501

32

Store the accumulator content to the memory address 9501

8011

01

8012

95

8013

HLT

76

Stop the program