Coa Karthik 4
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Instruction Sets: Characteristics and Functions B.VISHNU VARDHAN
What is an Instruction Set? • The complete collection of instructions that are understood by a CPU • Machine Code • Binary • Usually represented by assembly codes
28 January 2007
Computer Organization
B.Vishnu Vardhan
2
Elements of an Instruction • • • •
Operation code (Op code) Source Operand reference Result Operand reference Next Instruction Reference
28 January 2007
Computer Organization
B.Vishnu Vardhan
3
Where have all the Operands Gone? • Main memory (or virtual memory or cache) • CPU register • I/O device
28 January 2007
Computer Organization
B.Vishnu Vardhan
4
Instruction Cycle State Diagram
28 January 2007
Computer Organization
B.Vishnu Vardhan
5
Instruction Representation • In machine code each instruction has a unique bit pattern • For human consumption a symbolic representation is used – e.g. ADD, SUB, LOAD
• Operands can also be represented in this way – ADD A,B 28 January 2007
Computer Organization
B.Vishnu Vardhan
6
Simple Instruction Format
28 January 2007
Computer Organization
B.Vishnu Vardhan
7
Instruction Types • • • •
Data processing Data storage (main memory) Data movement (I/O) Program flow control
28 January 2007
Computer Organization
B.Vishnu Vardhan
8
Instruction Types • Arithmetic and logic instructions – Computational capability
• Memory Instruction – Moving data between memory and registers
• I/O instructions – Data (memory) and results (user)
• Test and Branch instruction – Test the status decision making
28 January 2007
Computer Organization
B.Vishnu Vardhan
9
Number of Addresses (a) • 3 addresses – Operand 1, Operand 2, Result – a = b + c; – May be a forth - next instruction (usually implicit) – Not common – Needs very long words to hold everything 28 January 2007
Computer Organization
B.Vishnu Vardhan
10
Three Address instruction • • • •
SUB MPY ADD DIV
Y,A,B T,D,E T,T,C Y,Y,T
YA-B TD*E TT+C YY/T
• PROGRAM TO EXECUTE • Y=(A-B)/(C+D*E) 28 January 2007
Computer Organization
B.Vishnu Vardhan
11
Number of Addresses (b) • 2 addresses – One address doubles as operand and result –a=a+b – Reduces length of instruction – Requires some extra work • Temporary storage to hold some results
28 January 2007
Computer Organization
B.Vishnu Vardhan
12
TWO ADDRESS • • • • • •
MOVE SUB MOVE MPY ADD DIV
Y,A Y,B T,D T,E T,C Y,T
YA YB T D T T*E T T+C Y Y/T
• PROGRAM TO EXECUTE • Y=(A-B)/(C+D*E)
28 January 2007
Computer Organization
B.Vishnu Vardhan
13
Number of Addresses (c) • 1 address – Implicit second address – Usually a register (accumulator) – Common on early machines
28 January 2007
Computer Organization
B.Vishnu Vardhan
14
1 ADDRESS FORMAT • • • • • • • • • •
Load D ACD MPY E AC AC*E ADD C ACAC+C STOR Y YAC LOAD A ACA SUB B ACAC-B DIV Y ACAC/Y STOR Y YAC PROGRAM TO EXECUTE Y=(A-B)/(C+D*E) 28 January 2007
Computer Organization
B.Vishnu Vardhan
15
Number of Addresses (d) • 0 (zero) addresses – All addresses implicit – Uses a stack – e.g. push a push b – add – – pop c c=a+b 28 January 2007
Computer Organization
B.Vishnu Vardhan
16
How Many Addresses
• More addresses
– More complex instructions – More registers • Inter-register operations are quicker
– Fewer instructions per program
• Fewer addresses – Less complex instructions – More instructions per program – Faster fetch/execution of instructions 28 January 2007
Computer Organization
B.Vishnu Vardhan
17
Design Decisions (1) • Operation repertoire – How many ops? – What can they do? – How complex are they?
• Data types • Instruction formats – Length of op code field – Number of addresses
28 January 2007
Computer Organization
B.Vishnu Vardhan
18
Design Decisions (2) • Registers – Number of CPU registers available – Which operations can be performed on which registers?
• Addressing modes
28 January 2007
Computer Organization
B.Vishnu Vardhan
19
Types of Operand • Addresses • Numbers – Integer/floating point
• Characters – ASCII etc.
• Logical Data – Bits or flags • (Aside: Is there any difference between numbers and characters? 28 January 2007
Computer Organization
B.Vishnu Vardhan
20
Pentium Data Types • • • • • •
8 bit Byte 16 bit word 32 bit double word 64 bit quad word Addressing is by 8 bit unit A 32 bit double word is read at addresses divisible by 4 28 January 2007
Computer Organization
B.Vishnu Vardhan
21
Pentium Numeric Data Formats
28 January 2007
Computer Organization
B.Vishnu Vardhan
22
PowerPC Data Types • 8 (byte), 16 (halfword), 32 (word) and 64 (doubleword) length data types • Some instructions need operand aligned on 32 bit boundary • Can be big- or little-endian • Fixed point processor recognises: – Unsigned byte, unsigned halfword, signed halfword, unsigned word, signed word, unsigned doubleword, byte string (<128 bytes) • Floating point – IEEE 754 – Single or double precision 28 January 2007
Computer Organization
B.Vishnu Vardhan
23
Types of Operation • • • • • • •
Data Transfer Arithmetic Logical Conversion I/O System Control Transfer of Control 28 January 2007
Computer Organization
B.Vishnu Vardhan
24
Data Transfer • Specify – Source – Destination – Amount of data
• May be different instructions for different movements – e.g. IBM 370
• Or one instruction and different addresses – e.g. VAX 28 January 2007
Computer Organization
B.Vishnu Vardhan
25
Arithmetic • • • •
Add, Subtract, Multiply, Divide Signed Integer Floating point ? May include – Increment (a++) – Decrement (a--) – Negate (-a) 28 January 2007
Computer Organization
B.Vishnu Vardhan
26
Shift and Rotate Operations
28 January 2007
Computer Organization
B.Vishnu Vardhan
27
Logical • Bitwise operations • AND, OR, NOT
28 January 2007
Computer Organization
B.Vishnu Vardhan
28
Conversion • E.g. Binary to Decimal
28 January 2007
Computer Organization
B.Vishnu Vardhan
29
Input/Output • May be specific instructions • May be done using data movement instructions (memory mapped) • May be done by a separate controller (DMA)
28 January 2007
Computer Organization
B.Vishnu Vardhan
30
Systems Control • Privileged instructions • CPU needs to be in specific state Kernel mode
• For operating systems use
28 January 2007
Computer Organization
B.Vishnu Vardhan
31
Transfer of Control • Branch – e.g. branch to x if result is zero
• Skip – – – –
e.g. increment and skip if zero ISZ Register1 Branch xxxx ADD A
• Subroutine call – interrupt call 28 January 2007
Computer Organization
B.Vishnu Vardhan
32
Branch Instruction
28 January 2007
Computer Organization
B.Vishnu Vardhan
33
Nested Procedure Calls
28 January 2007
Computer Organization
B.Vishnu Vardhan
34
Use of Stack
28 January 2007
Computer Organization
B.Vishnu Vardhan
35
Stack Frame Growth Using Sample Procedures P and Q
28 January 2007
Computer Organization
B.Vishnu Vardhan
36
Byte Order (A portion of chips?) • What order do we read numbers that occupy more than one byte • e.g. (numbers in hex to make it easy to read) • 12345678 can be stored in 4x8bit locations as follows
28 January 2007
Computer Organization
B.Vishnu Vardhan
37
Byte Order (example) • • • • •
Address 184 185 186 186
Value (1) 12 34 56 78
Value(2) 78 56 34 12
• i.e. read top down or bottom up? 28 January 2007
Computer Organization
B.Vishnu Vardhan
38
Byte Order Names • The problem is called Endian • The system on the left has the least significant byte in the lowest address • This is called big-endian • The system on the right has the least significant byte in the highest address • This is called little-endian 28 January 2007
Computer Organization
B.Vishnu Vardhan
39
Alternative View of Memory Map
28 January 2007
Computer Organization
B.Vishnu Vardhan
40
Computer Organization and Architecture Addressing Modes and Formats
Addressing Modes • • • • • • •
Immediate Direct Indirect Register Register Indirect Displacement (Indexed) Stack 28 January 2007
Computer Organization
B.Vishnu Vardhan
42
Immediate Addressing • Operand is part of instruction • Operand = address field • e.g. ADD 5 – Add 5 to contents of accumulator – 5 is operand
• No memory reference to fetch data • Fast • Limited range 28 January 2007
Computer Organization
B.Vishnu Vardhan
43
Immediate Addressing Diagram Instruction Opcode
28 January 2007
Operand
Computer Organization
B.Vishnu Vardhan
44
Direct Addressing • Address field contains address of operand • Effective address (EA) = address field (A) • e.g. ADD A – Add contents of cell A to accumulator – Look in memory at address A for operand • Single memory reference to access data • No additional calculations to work out effective address • Limited address space 28 January 2007
Computer Organization
B.Vishnu Vardhan
45
Direct Addressing Diagram Instruction Opcode
Address A
Memory
Operand
28 January 2007
Computer Organization
B.Vishnu Vardhan
46
Indirect Addressing (1) • Memory cell pointed to by address field contains the address of (pointer to) the operand • EA = (A) – Look in A, find address (A) and look there for operand • e.g. ADD (A) – Add contents of cell pointed to by contents of A to accumulator 28 January 2007
Computer Organization
B.Vishnu Vardhan
47
Indirect Addressing (2) • Large address space • 2n where n = word length • May be nested, multilevel, cascaded – e.g. EA = (((A)))
• Multiple memory accesses to find operand • Hence slower 28 January 2007
Computer Organization
B.Vishnu Vardhan
48
Indirect Addressing Diagram Instruction Opcode
Address A
Memory Pointer to operand
Operand
28 January 2007
Computer Organization
B.Vishnu Vardhan
49
Register Addressing (1) • Operand is held in register named in address filed • EA = R • Limited number of registers • Very small address field needed – Shorter instructions – Faster instruction fetch 28 January 2007
Computer Organization
B.Vishnu Vardhan
50
Register Addressing (2) • • • •
No memory access Very fast execution Very limited address space Multiple registers helps performance – Requires good assembly programming or compiler writing – N.B. C programming • register int a;
• c.f. Direct addressing 28 January 2007
Computer Organization
B.Vishnu Vardhan
51
Register Addressing Diagram Instruction Opcode
Register Address R
Registers
Operand
28 January 2007
Computer Organization
B.Vishnu Vardhan
52
Register Indirect Addressing • indirect addressing • EA = (R) • Operand is in memory cell pointed to by contents of register R • Large address space (2n) • One fewer memory access than indirect addressing 28 January 2007
Computer Organization
B.Vishnu Vardhan
53
Register Indirect Addressing Diagram Instruction Opcode
Register Address R
Memory
Registers
Pointer to Operand
28 January 2007
Computer Organization
Operand
B.Vishnu Vardhan
54
Displacement Addressing • EA = A + (R) • Address field hold two values – A = base value – R = register that holds displacement – or vice versa
28 January 2007
Computer Organization
B.Vishnu Vardhan
55
Displacement Addressing Diagram
Instruction Opcode Register R Address A
Memory
Registers
Pointer to Operand
28 January 2007
+
Computer Organization
Operand
B.Vishnu Vardhan
56
Relative Addressing A version of displacement addressing R = Program counter, PC EA = A + (PC) get operand from A cells from current location pointed to by PC • locality of reference & cache usage • • • •
28 January 2007
Computer Organization
B.Vishnu Vardhan
57
Base-Register Addressing • A holds displacement • R holds pointer to base address • R may be explicit or implicit
28 January 2007
Computer Organization
B.Vishnu Vardhan
58
Indexed Addressing • • • •
A = base R = displacement EA = A + R Good for accessing arrays – EA = A + R – R++
28 January 2007
Computer Organization
B.Vishnu Vardhan
59
Stack Addressing • Operand is (implicitly) on top of stack • e.g. – ADD – Pop top two items from stack and add
28 January 2007
Computer Organization
B.Vishnu Vardhan
60
Pentium Addressing Modes • Virtual or effective address is offset into segment – Starting address plus offset gives linear address – This goes through page translation if paging enabled • 12 addressing modes available – Immediate – Register operand – Displacement – Base – Base with displacement – Scaled index with displacement – Base with index and displacement – Base scaled index with displacement – Relative 28 January 2007
Computer Organization
B.Vishnu Vardhan
61
Instruction Formats • Layout of bits in an instruction • Includes opcode • Includes (implicit or explicit) operand(s) • Usually more than one instruction format in an instruction set
28 January 2007
Computer Organization
B.Vishnu Vardhan
62
Instruction Length • Affected by and affects: – – – – –
Memory size Memory organization Bus structure CPU complexity CPU speed
• Trade off between powerful instruction repertoire and saving space 28 January 2007
Computer Organization
B.Vishnu Vardhan
63
Allocation of Bits • • • • • •
Number of addressing modes Number of operands Register versus memory Number of register sets Address range Address granularity 28 January 2007
Computer Organization
B.Vishnu Vardhan
64
Pentium Instruction Format
28 January 2007
Computer Organization
B.Vishnu Vardhan
65
What is an Instruction Set? • The complete collection of instructions that are understood by a CPU • Machine Code • Binary • Usually represented by assembly codes
28 January 2007
Computer Organization
B.Vishnu Vardhan
2
Elements of an Instruction • • • •
Operation code (Op code) Source Operand reference Result Operand reference Next Instruction Reference
28 January 2007
Computer Organization
B.Vishnu Vardhan
3
Where have all the Operands Gone? • Main memory (or virtual memory or cache) • CPU register • I/O device
28 January 2007
Computer Organization
B.Vishnu Vardhan
4
Instruction Cycle State Diagram
28 January 2007
Computer Organization
B.Vishnu Vardhan
5
Instruction Representation • In machine code each instruction has a unique bit pattern • For human consumption a symbolic representation is used – e.g. ADD, SUB, LOAD
• Operands can also be represented in this way – ADD A,B 28 January 2007
Computer Organization
B.Vishnu Vardhan
6
Simple Instruction Format
28 January 2007
Computer Organization
B.Vishnu Vardhan
7
Instruction Types • • • •
Data processing Data storage (main memory) Data movement (I/O) Program flow control
28 January 2007
Computer Organization
B.Vishnu Vardhan
8
Instruction Types • Arithmetic and logic instructions – Computational capability
• Memory Instruction – Moving data between memory and registers
• I/O instructions – Data (memory) and results (user)
• Test and Branch instruction – Test the status decision making
28 January 2007
Computer Organization
B.Vishnu Vardhan
9
Number of Addresses (a) • 3 addresses – Operand 1, Operand 2, Result – a = b + c; – May be a forth - next instruction (usually implicit) – Not common – Needs very long words to hold everything 28 January 2007
Computer Organization
B.Vishnu Vardhan
10
Three Address instruction • • • •
SUB MPY ADD DIV
Y,A,B T,D,E T,T,C Y,Y,T
YA-B TD*E TT+C YY/T
• PROGRAM TO EXECUTE • Y=(A-B)/(C+D*E) 28 January 2007
Computer Organization
B.Vishnu Vardhan
11
Number of Addresses (b) • 2 addresses – One address doubles as operand and result –a=a+b – Reduces length of instruction – Requires some extra work • Temporary storage to hold some results
28 January 2007
Computer Organization
B.Vishnu Vardhan
12
TWO ADDRESS • • • • • •
MOVE SUB MOVE MPY ADD DIV
Y,A Y,B T,D T,E T,C Y,T
YA YB T D T T*E T T+C Y Y/T
• PROGRAM TO EXECUTE • Y=(A-B)/(C+D*E)
28 January 2007
Computer Organization
B.Vishnu Vardhan
13
Number of Addresses (c) • 1 address – Implicit second address – Usually a register (accumulator) – Common on early machines
28 January 2007
Computer Organization
B.Vishnu Vardhan
14
1 ADDRESS FORMAT • • • • • • • • • •
Load D ACD MPY E AC AC*E ADD C ACAC+C STOR Y YAC LOAD A ACA SUB B ACAC-B DIV Y ACAC/Y STOR Y YAC PROGRAM TO EXECUTE Y=(A-B)/(C+D*E) 28 January 2007
Computer Organization
B.Vishnu Vardhan
15
Number of Addresses (d) • 0 (zero) addresses – All addresses implicit – Uses a stack – e.g. push a push b – add – – pop c c=a+b 28 January 2007
Computer Organization
B.Vishnu Vardhan
16
How Many Addresses
• More addresses
– More complex instructions – More registers • Inter-register operations are quicker
– Fewer instructions per program
• Fewer addresses – Less complex instructions – More instructions per program – Faster fetch/execution of instructions 28 January 2007
Computer Organization
B.Vishnu Vardhan
17
Design Decisions (1) • Operation repertoire – How many ops? – What can they do? – How complex are they?
• Data types • Instruction formats – Length of op code field – Number of addresses
28 January 2007
Computer Organization
B.Vishnu Vardhan
18
Design Decisions (2) • Registers – Number of CPU registers available – Which operations can be performed on which registers?
• Addressing modes
28 January 2007
Computer Organization
B.Vishnu Vardhan
19
Types of Operand • Addresses • Numbers – Integer/floating point
• Characters – ASCII etc.
• Logical Data – Bits or flags • (Aside: Is there any difference between numbers and characters? 28 January 2007
Computer Organization
B.Vishnu Vardhan
20
Pentium Data Types • • • • • •
8 bit Byte 16 bit word 32 bit double word 64 bit quad word Addressing is by 8 bit unit A 32 bit double word is read at addresses divisible by 4 28 January 2007
Computer Organization
B.Vishnu Vardhan
21
Pentium Numeric Data Formats
28 January 2007
Computer Organization
B.Vishnu Vardhan
22
PowerPC Data Types • 8 (byte), 16 (halfword), 32 (word) and 64 (doubleword) length data types • Some instructions need operand aligned on 32 bit boundary • Can be big- or little-endian • Fixed point processor recognises: – Unsigned byte, unsigned halfword, signed halfword, unsigned word, signed word, unsigned doubleword, byte string (<128 bytes) • Floating point – IEEE 754 – Single or double precision 28 January 2007
Computer Organization
B.Vishnu Vardhan
23
Types of Operation • • • • • • •
Data Transfer Arithmetic Logical Conversion I/O System Control Transfer of Control 28 January 2007
Computer Organization
B.Vishnu Vardhan
24
Data Transfer • Specify – Source – Destination – Amount of data
• May be different instructions for different movements – e.g. IBM 370
• Or one instruction and different addresses – e.g. VAX 28 January 2007
Computer Organization
B.Vishnu Vardhan
25
Arithmetic • • • •
Add, Subtract, Multiply, Divide Signed Integer Floating point ? May include – Increment (a++) – Decrement (a--) – Negate (-a) 28 January 2007
Computer Organization
B.Vishnu Vardhan
26
Shift and Rotate Operations
28 January 2007
Computer Organization
B.Vishnu Vardhan
27
Logical • Bitwise operations • AND, OR, NOT
28 January 2007
Computer Organization
B.Vishnu Vardhan
28
Conversion • E.g. Binary to Decimal
28 January 2007
Computer Organization
B.Vishnu Vardhan
29
Input/Output • May be specific instructions • May be done using data movement instructions (memory mapped) • May be done by a separate controller (DMA)
28 January 2007
Computer Organization
B.Vishnu Vardhan
30
Systems Control • Privileged instructions • CPU needs to be in specific state Kernel mode
• For operating systems use
28 January 2007
Computer Organization
B.Vishnu Vardhan
31
Transfer of Control • Branch – e.g. branch to x if result is zero
• Skip – – – –
e.g. increment and skip if zero ISZ Register1 Branch xxxx ADD A
• Subroutine call – interrupt call 28 January 2007
Computer Organization
B.Vishnu Vardhan
32
Branch Instruction
28 January 2007
Computer Organization
B.Vishnu Vardhan
33
Nested Procedure Calls
28 January 2007
Computer Organization
B.Vishnu Vardhan
34
Use of Stack
28 January 2007
Computer Organization
B.Vishnu Vardhan
35
Stack Frame Growth Using Sample Procedures P and Q
28 January 2007
Computer Organization
B.Vishnu Vardhan
36
Byte Order (A portion of chips?) • What order do we read numbers that occupy more than one byte • e.g. (numbers in hex to make it easy to read) • 12345678 can be stored in 4x8bit locations as follows
28 January 2007
Computer Organization
B.Vishnu Vardhan
37
Byte Order (example) • • • • •
Address 184 185 186 186
Value (1) 12 34 56 78
Value(2) 78 56 34 12
• i.e. read top down or bottom up? 28 January 2007
Computer Organization
B.Vishnu Vardhan
38
Byte Order Names • The problem is called Endian • The system on the left has the least significant byte in the lowest address • This is called big-endian • The system on the right has the least significant byte in the highest address • This is called little-endian 28 January 2007
Computer Organization
B.Vishnu Vardhan
39
Alternative View of Memory Map
28 January 2007
Computer Organization
B.Vishnu Vardhan
40
Computer Organization and Architecture Addressing Modes and Formats
Addressing Modes • • • • • • •
Immediate Direct Indirect Register Register Indirect Displacement (Indexed) Stack 28 January 2007
Computer Organization
B.Vishnu Vardhan
42
Immediate Addressing • Operand is part of instruction • Operand = address field • e.g. ADD 5 – Add 5 to contents of accumulator – 5 is operand
• No memory reference to fetch data • Fast • Limited range 28 January 2007
Computer Organization
B.Vishnu Vardhan
43
Immediate Addressing Diagram Instruction Opcode
28 January 2007
Operand
Computer Organization
B.Vishnu Vardhan
44
Direct Addressing • Address field contains address of operand • Effective address (EA) = address field (A) • e.g. ADD A – Add contents of cell A to accumulator – Look in memory at address A for operand • Single memory reference to access data • No additional calculations to work out effective address • Limited address space 28 January 2007
Computer Organization
B.Vishnu Vardhan
45
Direct Addressing Diagram Instruction Opcode
Address A
Memory
Operand
28 January 2007
Computer Organization
B.Vishnu Vardhan
46
Indirect Addressing (1) • Memory cell pointed to by address field contains the address of (pointer to) the operand • EA = (A) – Look in A, find address (A) and look there for operand • e.g. ADD (A) – Add contents of cell pointed to by contents of A to accumulator 28 January 2007
Computer Organization
B.Vishnu Vardhan
47
Indirect Addressing (2) • Large address space • 2n where n = word length • May be nested, multilevel, cascaded – e.g. EA = (((A)))
• Multiple memory accesses to find operand • Hence slower 28 January 2007
Computer Organization
B.Vishnu Vardhan
48
Indirect Addressing Diagram Instruction Opcode
Address A
Memory Pointer to operand
Operand
28 January 2007
Computer Organization
B.Vishnu Vardhan
49
Register Addressing (1) • Operand is held in register named in address filed • EA = R • Limited number of registers • Very small address field needed – Shorter instructions – Faster instruction fetch 28 January 2007
Computer Organization
B.Vishnu Vardhan
50
Register Addressing (2) • • • •
No memory access Very fast execution Very limited address space Multiple registers helps performance – Requires good assembly programming or compiler writing – N.B. C programming • register int a;
• c.f. Direct addressing 28 January 2007
Computer Organization
B.Vishnu Vardhan
51
Register Addressing Diagram Instruction Opcode
Register Address R
Registers
Operand
28 January 2007
Computer Organization
B.Vishnu Vardhan
52
Register Indirect Addressing • indirect addressing • EA = (R) • Operand is in memory cell pointed to by contents of register R • Large address space (2n) • One fewer memory access than indirect addressing 28 January 2007
Computer Organization
B.Vishnu Vardhan
53
Register Indirect Addressing Diagram Instruction Opcode
Register Address R
Memory
Registers
Pointer to Operand
28 January 2007
Computer Organization
Operand
B.Vishnu Vardhan
54
Displacement Addressing • EA = A + (R) • Address field hold two values – A = base value – R = register that holds displacement – or vice versa
28 January 2007
Computer Organization
B.Vishnu Vardhan
55
Displacement Addressing Diagram
Instruction Opcode Register R Address A
Memory
Registers
Pointer to Operand
28 January 2007
+
Computer Organization
Operand
B.Vishnu Vardhan
56
Relative Addressing A version of displacement addressing R = Program counter, PC EA = A + (PC) get operand from A cells from current location pointed to by PC • locality of reference & cache usage • • • •
28 January 2007
Computer Organization
B.Vishnu Vardhan
57
Base-Register Addressing • A holds displacement • R holds pointer to base address • R may be explicit or implicit
28 January 2007
Computer Organization
B.Vishnu Vardhan
58
Indexed Addressing • • • •
A = base R = displacement EA = A + R Good for accessing arrays – EA = A + R – R++
28 January 2007
Computer Organization
B.Vishnu Vardhan
59
Stack Addressing • Operand is (implicitly) on top of stack • e.g. – ADD – Pop top two items from stack and add
28 January 2007
Computer Organization
B.Vishnu Vardhan
60
Pentium Addressing Modes • Virtual or effective address is offset into segment – Starting address plus offset gives linear address – This goes through page translation if paging enabled • 12 addressing modes available – Immediate – Register operand – Displacement – Base – Base with displacement – Scaled index with displacement – Base with index and displacement – Base scaled index with displacement – Relative 28 January 2007
Computer Organization
B.Vishnu Vardhan
61
Instruction Formats • Layout of bits in an instruction • Includes opcode • Includes (implicit or explicit) operand(s) • Usually more than one instruction format in an instruction set
28 January 2007
Computer Organization
B.Vishnu Vardhan
62
Instruction Length • Affected by and affects: – – – – –
Memory size Memory organization Bus structure CPU complexity CPU speed
• Trade off between powerful instruction repertoire and saving space 28 January 2007
Computer Organization
B.Vishnu Vardhan
63
Allocation of Bits • • • • • •
Number of addressing modes Number of operands Register versus memory Number of register sets Address range Address granularity 28 January 2007
Computer Organization
B.Vishnu Vardhan
64
Pentium Instruction Format
28 January 2007
Computer Organization
B.Vishnu Vardhan
65
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