Circuits Assembly - 08 Aug 2009

VARDAMAN: The Road to Recovery

AUGUST 2009

Optimizing Wave Soldering

Inside Koh Young

Measuring Customer Satisfaction

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AUGUST 2009

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VARDAMAN: The Road to Recovery

Optimizing Wave Soldering

Inside Koh Young

Measuring Customer Satisfaction

AUGUST 2009 – Vol. 20 No. 8

FIRST PERSON 6

Caveat Lector The estimable legacy of iNEMI CEO Jim McElroy. Mike Buetow

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FEATURES 17

TECH TALK 14 On the Forefront

20

The backend semiconductor industry is feeling the recovery’s bumps.

15 Screen Printing Clive Ashmore

16 Better Manufacturing The need for speed. Jeff Knight

24 Wave Soldering Optimizing the wave process is no simple feat. Dr. Ursula Marquez de Tino

26 Tech Tips Changing the finish for BGA boards could mean no more “HASLs.” ACI Technologies Inc.

27 Wave Soldering Troubleshooting No stick solder. Paul Lotosky

28 Getting Lean

Cover Story

Preventing MLCC Failures

Mechanical anomalies can cause electrical failure in MLCCs. Many defects – including cracks caused by panel separation – can be uncovered by first performing acoustic imaging on unassembled parts. By Tom Adams

Reflow Profiling

Oven Adjustment Effects on a Solder Reflow Profile

A recipe that works for one board won’t necessarily work for another board if the weight or design is significantly different. This study found that of the three oven adjustments, zone set points have the biggest effect on peak temperature and TAL. By Fred Dimock

E. Jan Vardaman

Understencil cleaning’s little devil.

ON THE COVER: An acoustic image of an MLCC containing a single void.

22

Koh Young

More than Just a Look

SPI market leader Koh Young is shrugging off the recession and taking Europe head on. CIRCUITS ASSEMBLY visits the OEM to learn why now, and to get an in-depth look at its new 3-D AOI machine. By Mike Buetow

ONLINE at PCDandF.com Fluid Dynamic Simulation for Cool Designs

Computational fluid dynamics-based simulations that examine temperature and heat flux can help engineers make better thermal management decisions. By Robin Bornoff

Electroplating for HDI and Packaging Substrates

Process chemistry, substrate condition, mass transport and current density have a significant impact on the via-filling capability of electroplated copper. By Mark Lefebvre, Elie Najjar, Luis Gomez and Leon Barstad

Redefining the Role of BoM

Today’s BoM is a roadmap of the engineer’s design intent up and down the manufacturing supply chain. By Nolan Johnson

How to measure customer satisfaction. Tony Bellitto

29 The Defects Database Thin hole plating could be susceptible to lead damage. Dr. Davide Di Maio

DEPARTMENTS 9 Industry News 12 Market Watch 30 Product Spotlight

31 Ad Index 31 Assembly Insider 32 Technical Abstracts

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Circuits Assembly AUGUST 2009

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Caveat Lector

Lucky 13

J

im McElroy is about the last person who would want to be profiled in an industry magazine, which is probably why the iNEMI chief executive has been so effective over the past 13 years. Indeed, he has made his mark in the background. To McElroy, running the consortium is not so much about leading, but “leadership facilitation.” Or, as the low-key, longtime New Hampshire resident describes it, “leading from the rear.” Association management tends to be intramural, attracting candidates from other associations, rather from industry. But one of the secrets to McElroy’s success has been the more than two decades he spent as an engineer and business manager for the likes of RCA, Digital Equipment Corp. and MMS, where he eventually rose to vice president of international operations. Such background and experience cannot help but inform a person about how difficult a task it is to conceive, design and build quality electronics products, and how in an industry that changes at light speed, nothing can be taken lightly or for granted. These notes resounded in an interview McElroy conducted with Circuits Assembly on July 6, the day he announced his retirement. (For the full transcript, visit circuitsassembly.com/cms/component/content/ article/5-current-columns/8560-leading-from-therear.) Asking what type of person it takes to succeed in his job elicits a laugh from McElroy, who admits he’s “probably biased.” Still, he elaborates in a way that’s refreshingly candid, especially given the tech industry's penchant for secrecy. “The biggest part is leadership ability. It’s different from leadership ability in a public company, where in a sense, you’re in charge of your own destiny; you can do what you have to do. That’s not the way it works in this job. The leadership has to be subtler. Our role is more one of leadership facilitation, forging direction and making things happen. The most successful things we do are driven by industry leaders with the passion to drive it to timely completion. “[And you] have to be able to interact at a number of different levels. Our project [staff] might be working at the engineering level or the first level of management. But if we’re driving a new initiative, we have to get the attention of senior-level people. Executives approach technology gaps in a different way than technologists do. We need to be able to speak the lan6

Circuits Assembly AUGUST 2009

guage that each understands so that we can connect with them and gain their support.” When McElroy took over, iNEMI primarily was a vehicle for roadmapping activity. Name recognition was limited. On his watch, the organization has grown both in scope and stature. It expanded overseas, where it now has a pair of outstanding engineers, experienced handling operations in Europe and China, respectively. It took a lead role in facilitating the lead-free transition, helping to settle on a SAC alloy from which the industry could start baselining solutions, and publishing extensive research on the subsequent tests. And McElroy was perhaps the only person capable of sorting out the longstanding battle between various trade groups and companies over the competing data transfer formats – a conflict about as lengthy and arcane as the Middle East's. Although it lacks a dedicated research facility, it is the closest undertaking to Sematech insofar as being a forum where the best and brightest engineers share ideas, resources and work out problems. (The roadmaps, which iNEMI has steadily published every two years, have become, in McElroy’s words, “self-fulfilling prophecies,” pointing to the targets and setting the industry in motion toward them.) As is his style, McElroy didn’t spend much time discussing his legacy, preferring to note the work ahead. As the supply chain becomes more segmented, the layers add to the complexity of the problems – and solutions. “We still have to orchestrate across that supply chain in order to drive the technology,” he says. “When companies were integrated, it was easier to do. We’re doing tech initiatives across a number of different companies and cultures, and in an environment when many companies have limited margins. So folks have limited funds to invest in R&D. The question is, How do we do this in a positive way that has the biggest impact?” It’s someone else’s turn to address that issue. Now 64, McElroy is looking for a change, citing the opportunity to spend more time with family and give back to the community. The electronics community should be grateful, for among his peers managing associations, McElroy is head and shoulders above the crowd. For iNEMI, it’s been a lucky 13 years.

Mike Buetow, Editor-in-Chief [email protected]

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SCHEDULE-AT-A-GLANCE MONDAY, SEPT. 14 8 am – 5 pm Registration Open 9 am – 5 pm Professional Development Certificate Courses T1: Signal Integrity in High-Speed Circuits Speaker: Rick Hartley, L-3 Communications, Avionics Systems

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S8: Vias and Their Effects on High-Speed Signals Speaker: Robert Hanson, Americom Seminars

free tuesday 1 pm – 3 pm F4: The Designer’s Guide to PC Fab Speaker: James Hofer, Accurate Circuit Engineering

3 pm – 5 pm F5: Top 10 Flex Circuit Questions Answered Speakers: Mark A. Verbrugge and Mark Finstad, Minco Products

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W2: Grounding to Control Noise and EMI Speaker: Rick Hartley, L-3 Communications, Avionics Systems

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DEC 1: High-Speed Digital Design and PCB Layout

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SEPTEMBER 14-18, 2009

DEC 2: Hands-On Design of Advanced HDI Technologies Speakers: Happy Holden, Mentor Graphics, and Dan Smith, PCB Guru

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S17: RF and Mixed-Signal PCB Design Speaker: Rick Hartley, L-3 Communications, Avionics Systems

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T6: PCB Layout for Signal Integrity, EMI and High Speed Speaker: Susy Webb, Fairfield Industries

12 pm – 1 pm Professional Development Attendee Lunch

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SEPTEMBER 14-18, 2009

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Industry

NEWS In Brief Reinke Manufacturing (reinke.com) will outsource $1 million worth of electronics design and manufacturing services to Elecsys (elecsyscorp.com). Variosystems Inc. (variosystems.com) purchased Valor’s (valor.com) Trilogy 5000 DFM analysis software. Sparton (sparton.com) will relocate its headquarters to Schaumburg, IL, in October and lay off 15 workers as part of its corporate restructuring. Kyzen (kyzen.com) plans to open a sales and support facility in Penang, Malaysia. ACE Production Technologies (aceprotech.com) named Europlacer Distribution (europlacerdistrib.com) its exclusive representative in France, and parts of Switzerland, Tunisia, Algeria, and Morocco. Data I/O (dataio.com) named as sales representatives Kurt Whitlock Associates (kurtwhitlock.com) in Florida and West Tech (westtechinc.com) in Colorado, Utah and Wyoming. Nortech Systems (nortechsys.com) will close its Garner, IA, EMS facility here by early August and lay off 57 workers. Nortech purchased the facility from Suntron (suntron. com) in February 2007. YesTech (yestechinc.com) named InterLatin (interlatin.com.mx) to represent its AOI and x-ray line in Mexico. Manitowoc Cranes (manitowoccranes. com) named Morey Corp. (moreycorp.com) to design, build, and supply the telematics control unit for its CraneSTAR asset management system. Enhanced Video Devices (enhancedvideodevices.com) named Digi-Key (digikey. com) as worldwide distributor of its EVD 1000 and EVD 1500 ICs. Aqueous Technologies (aqueoustech. com) named Horizon Sales as its manufacturer’s representative for Michigan, Ohio, Indiana and Kentucky. 

circuitsassembly.com

Edited by Mike Buetow

Ericsson to Buy Elcoteq’s Estonia Ops TALLINN, ESTONIA – LM Ericsson (ericsson.com) will acquire part of Elcoteq’s (elcoteq.com) manufacturing operations in Tallinn for EUR 30 million ($42 million), pending regulator approval, the companies said on June 17. The deal includes about 1,200 Elcoteq employees. Production is expected to begin under the Ericsson name by Aug. 1. The site reportedly builds radio access products for Ericsson’s 2G and 3G base stations. The announcement comes not long after Alcatel-Lucent (alcatel-lucent.com) and other major OEMs have announced plans to bring production in-house. Despite the purchase, Ericcson said its outsourcing strategy remains intact. Elcoteq is the world’s sixth largest EMS company, but has been undergoing a long restructuring. – Mike Buetow

Creation Launches Expansion Project ST. PETER, MN – Creation Technologies (creationtech.com) will move into a 50,000-sq. ft. plant here by next year, the company said in late June. The announcement comes on the heels of a deal signed with the city of St. Peter, under which the EMS company agreed to create a minimum of 24 new full-time jobs within the next two years.  Creation is working with local real estate and construction companies to build the new plant, estimated at $4.8 million. Once complete, Creation Technologies will sign a 15-year lease agreement. In return, St. Peter Economic Development Authority reportedly will purchase the company’s existing 37,000 sq. ft. building, acquired when the company bought Taytronics in 2007. The site currently employs 115 workers. – Mike Buetow

Celestica to Exit Philippines CEBU CITY, PHILIPPINES – Celestica (celestica.com) will shutter its manufacturing plant here by the end of August and lay off 800 workers, according to local reports. The Mactan plant shutdown will be completed by Aug. 31, a company spokesman reportedly said. The move will take Celestica completely out of the Philippines. The firm closed its Laguna site last December. – Mike Buetow

Videoton Expanding in E. Europe STARA ZAGORA, BULGARIA – Videoton EAS (videoton.hu) in April opened a production plant here, where the EMS company plans to build electronics for household appliances. In May, the firm also opened a site in Mukachevo, West Ukraine. The Ukraine plant initially will employ 450 workers and will assemble and test wire harnesses for the automotive industry. The full ramp-up of the project is expected by the end of the year, with the workforce expected to reach 600. Videoton is the world’s 27th largest EMS firm, according to the Circuits Assembly Top 50. – Mike Buetow

DEK Stencil Mfg. Ops on the Move REYNOSA, MEXICO – DEK (dek.com) has teamed with equipment representative and stencil franchisee InterLatin (interlatin.com.mx) to open a stencil manufacturing facility here. The facility, which opened in March, serves regional EMS and OEM customers. There are now three DEK stencil franchises and two DEK-operated stencil manufacturing sites in the Americas, with more planned later this year.  Franchisees are licensees of the VectorGuard stencil system, a frame and foil tensioning design. Separately, Prod Electronic (prodelecgroup.com/fra) has acquired DEK’s platform product sales business and stencil sales and manufacturing business in France. Terms of the deal, which was finalized on June 5, were not disclosed. The new businesses will trade as Prodelectronic Technologies SAS and Prodelectronic Stencils SAS, respectively. In a press release, DEK said its France staff would continue to support customers and provide tactical support. Also, Prodelec, like Prod Electronic a subsidiary of Fin.Pro. Holding, was recently appointed by DEK as exclusive distributor in Italy. – Chelsey Drysdale

Circuits Assembly AUGUST 2009

9

Industry

NEWS Dage Moves to Larger UK HQ

In Brief DancoTech (dancotech.com) purchased an Asymtek (asymtek.com) Spectrum S-910N dispenser. JJS Electronics (jjselectronics.com) installed a DEK (dek.com) Horizon 03i screen printer, two BTU (btu.com) Pyramax 100A reflow ovens and a Goepel (goepel.com) Opticom Advancedline CLX4M AOI. Northrop Grumman awarded a $2.3 million contract to LaBarge (labarge.com) for a missile countermeasure system. Rehm Thermal Systems (rehm-group. com) named Encon (encon.pl) as its distributor in Poland. Rockwell Automation (rockwellautomation.com) will close plants in Dublin, GA, and Sumner, IA, next year and lay off more than 300 workers.

People Miyachi Unitek hired Andrew Dodd as senior sales engineer, responsible for Laser and Systems Sales and Applications Support in the Midwest US. Hansatech EMS appointed Tom Collett business development manager. Manncorp named Chris Ellis to its East Coast sales team. Asymtek promoted Paul Gallo to sales manager, USA and Americas, and Tom Schafer (pictured) to general manager, Asia Pacific, and global accounts program manager. Corrections Due to an editing error, our July 2009 write-up of the Microscan MINI Hawk (p. 30) ran with the wrong photo. Due to a translation error, the Chinese caption in Materials World (July 2009) was incorrect. The corrected caption is available at circuitsassembly.com/cms/images/stories/Articl eImages/0907/0907materialsworld.pdf. We regret the errors.

10

AYLESBURY, UK – Dage Precision Industries (dage. com) has moved its group headquarters to a 36,000 sq. ft. building here that includes a production area twice the size of its old facility. The facility features an expanded applications lab and training center that will house the company’s bond testers and x-ray inspection systems. The new site also contains a cleanroom for assembling and testing high bandwidth bond tester transducers. Dage has more than 200 employees and facilities in China, Japan, Singapore, Germany and the US. – Chelsey Drysdale

Inside the x-ray production floor at Dage.

iNEMI Defines ‘Low Halogen’ in Electronics HERNDON, VA – The International Electronics Manufacturing Initiative (inemi.org) released a statement defining low-halogen (BFR/CFR/PVC-free) for electronics products. For PCBs and board laminates, iNEMI members define low halogen as containing no more than 1500 ppm of total halogens in the resin plus reinforcement matrix, and no more than 900 ppm (each) of bromine or chlorine. For components, each plastic in the component should contain less than 1000 ppm of bromine, if the source is from brominated flame retardants, and less than 1000 ppm of chlorine, if the source is from chlorinated flame retardants, PVC or PVC copolymers. Members supporting the statement include Cisco, Dell, Doosan, H-P, Intel, Lenovo, Nan Ya Plastics, Senju Comtek, Sun Microsystems and Tyco Electronics. The statement comes following iNEMI’s April announcement of its HFR-Free Leadership Program, through which several of the consortium’s OEM and supply-chain members are working to assess the feasibility of a broad conversion to HFR-free PCB materials. Three specific project teams are now working on the program, including: • The HFR-Free PCB Materials Project, which plans to identify technology limitations involved in transitioning to HFR-free PCB materials. • The HFR-Free Signal Integrity Project, which focuses on ensuring no electrical signal degradation in HFR-free PCB materials. The PVC Alternatives Project, which evaluates alternatives to PVC (including additives) in electronic cable and wire applications using a lifecycle assessment approach. – Chelsey Drysdale

Consulting Group Launches OEM-EMS Matchmaker Tool SAN JOSE – Call it EMS Harmony. EMS consulting group Charlie Barnhart & Associates (charliebarnhart.com) has launched an online program said to enable OEMs to identify appropriate electronics manufacturing services partners. The program includes a sponsorship program that includes custom webcasts and communications activities, and a searchable “EMS Index” to help OEMs find specific services. The program also comes with CBA’s free Leading Indicators index, which encompasses global labor rates, a novel geographic risk factors algorithm, capacity utilization rates, and other data. “My methodologies are founded on GAAP-standards, and in case after case, we are seeing proof that  many of the assumptions about electronics outsourcing in operation today among OEMs are dead wrong,” Barnhart said in a press release. “OEMs are invariably stunned at the benchmark data we are able to show them about their own total costs of outsourcing. ” – Mike Buetow

Circuits Assembly AUGUST 2009

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Market

WATCH

Edited by Chelsey Drysdale

A/V Up Trends in the U.S. electronics equipment market (shipments only). ------------- % Change -------------April

Aprilr

April*

Computers and electronics products

-1.0

3.0

-1.9

-14.5

Computers

-9.1

3.3

-1.8

-20.4 -21.9

YTD

Storage devices

10.7

-0.7

-2.7

Other peripheral equipment

4.9

-7.3

0.5

-11.3

Nondefense communications equipment

3.0

-4.5

-2.6

-23.5

Defense communications equipment

-15.0

10.5

-9.1

13.9

A/V equipment

2.0

-7.1

15.1

-30.6 -30.9

Semiconductors

-3.7

40.4

-9.0

Components1

-1.1

-1.9

-1.6

-19.6

Nondefense search and navigation equipment

-4.5

-6.6

0.4

-13.2

Defense search and navigation equipment

0.4

-0.6

0.8

-2.7

Medical, measurement and control

0.0

-0.8

0.7

3.8

rRevised.

*Preliminary. 1Includes semiconductors. Seasonally adjusted. Source: U.S. Department of Commerce Census Bureau, July 2, 2009

ISM: Mfg. Trends ‘Encouraging’ TEMPE, AZ – Production in the US manufacturing sector rose 12.1 points between April and June, reaching 52.5%, according to the latest survey of the nation’s supply executives. Month to month, the PMI index of manufacturing contracted, but at a slower rate, said the Institute for Supply Management (ism.ws), which tracks the data. The index rose two points sequentially to 44.8%; a reading above 50% indicates the manufacturing economy is generally expanding. The New Orders index registered 49.2%, down 1.9 points from May. An index above 48.8%, over time, is generally consistent with an increase in the Census Bureau’s series on manufacturing orders (in constant 2000 dollars). In a statement, ISM spokesman Norbert J. Ore said, “Manufacturing continues to contract at a slower rate, but the trends in the indexes are encouraging, as seven of 18 industries reported growth in June. Most encouraging is the gain in the Production Index.” He noted that “aggressive inventory reduction continues and indications are that the de-stocking cycle is at or near the end in most industries.” Feb.

Mar.

Apr.

May

June

PMI

35.8

36.3

40.1

42.8

44.8

New orders

33.1

41.2

47.2

51.1

49.2

Production

36.3

36.4

40.4

46.0

52.5

Inventories

37.0

32.2

33.6

32.9

30.8

Customer inventories

51.0

54.0

49.5

46.0

43.5

Backlogs

31.0

35.5

40.5

48.0

47.5

2010 Recovery for Equipment Production LOS ALTOS, CA – The dismal picture for global equipment production should brighten considerably next year as worldwide equipment production is predicted to expand 5.4% in 2010 and 8.4% in 2011, says research firm Henderson Ventures (hendersonventures. com). The rebound is a dramatic improvement over the 12.3% decline Henderson forecasts for this year. While each region is forecast to see a drop in 2009, China will take the smallest hit, at 6.6%. Japan’s output is forecast to drop 21.3%, slammed by investment retrenchments and plant closings. The US is forecast to drop 10.1% this year, then rebound to 3.3% growth in 2010.

IT Buying to Recover in Q4 CAMBRIDGE, MA – Global purchases of IT goods and services by businesses and governments will fall 10.6% this year. But buying should resume in the fourth quarter, says Forrester Research (forrester.com). The research firm revised an earlier forecast, which called for a 3% drop worldwide this year. The firm downgraded its US IT outlook to a 5.1% drop, from a 3.1% decline. Computer and communications equipment sales will drop 13.5% and 12.4%, respectively, this year, the company said.

EMS to Surge Next Year SAN JOSE – The worldwide electronics manufacturing services market grew 12.5% last year, while the assembly market rose only 0.5%, according to Electronic Trends Publications (electronictrendpubs.com). This year will see a steady drop, but the EMS market will surge again in 2010, as outsourcing ramps, says ETP. The research firm says electronics assembly revenues reached $964 billion last year, and will reach more than $1.2 trillion in 2013. The firm says the EMS industry will increase from $294 billion in 2008 to $435 billion in 2013.

Source: Institute for Supply Management, July 1, 2009

Metals Index

Industry Market Snapshot

Price Per Lb.

Book-to-bills of various components/equipment. Jan. Semiconductor equipment1 Semiconductors2 Rigid PCBs3 (North America)

Feb.

Mar.

Apr.

May

0.47

0.49

0.56

0.65r

0.74p

-28.6%

-30.2%

-29.8%

-25.1%r

-23.2%p

0.88

0.89

0.92

0.98

1.03

Flexible PCBs3 (North America)

0.98

1.02

0.87

0.94

0.96

Computers/electronic products4

5.60

5.57

5.66

5.72r

5.79p

Sources: 1SEMI, 2SIA (3-month moving average growth), 3IPC , 4Census Bureau, ppreliminary, rrevised

12

Circuits Assembly AUGUST 2009

Date

7/7/08

4/6/09

5/4/09

6/1/09

7/6/09

LME Cash Seller and Settlement for Tin

$10.60

$4.99

$5.81

$6.69

$6.58

LME Cash Seller and Settlement for Lead

$0.71

$0.58

$0.61

$0.74

$0.77

Handy and Harman Silver (COMEX Silver)

$262.02

$187.74

$182.58

$229.98

$195.60

$3.34

$1.87

$2.04

$2.24

$2.26

LME Cash Seller and Settlement for Copper

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On the Forefront

The Backend Will Feel the Bumps For many package subcontractors, the road to recovery won’t be smooth.

S

E. Jan Vardaman is president of TechSearch International, (techsearchinc. com); jan@techsearch inc.com. Her column appears bimonthly.

14

emiconductor industry analysts argue that the worst is behind us. In the second quarter, wafer shipment growth is tracking at over 50% quarter-over-quarter at TSMC, UMC, SMIC and Chartered. ASE, Amkor and SPIL reported positive revenue growth during the period, and are optimistic about the third quarter. Yet, while each quarter may be better than the last, the road to recovery for the backend equipment OEMs and material suppliers may be a bit bumpy. Advanced packages, comprised of ball grid arrays and chip-scale packages, are the source of much of the unit and revenue growth in the semiconductor packaging and assembly sector. While BGA and CSP shipments will improve quarter-over-quarter, unit volumes will not return to 2008 levels until 2011. Wafer-level packaging seems a bright spot, with many companies favoring use of WLPs instead of some conventional packages because of their smaller form factor and lower profile. With this year’s capital expenditures for the top four IC package subcontract assembly and test operations expected to be less than half the dollar value in 2008, many backend assembly equipment makers may face hard times over the next 18 months (Figure 1). The key question then is, Are these companies strong enough to survive such a protracted dry spell? Even if they are, can we expect any advances in assembly technology over the next two years? What level of orders will sustain R&D activities for the development of future equipment (and materials)? Feeling the pinch. What makes up backend assembly equipment Circuits Assembly AUGUST 2009

infrastructure? A typical assembly line for a wire-bonded package consists of systems for dicing, cleaning, die attach, wire bond, epoxy mold and curing. If the package is a BGA or CSP, equipment for solder ball attach, reflow and cleaning are also needed. If the package is a leadframe, some lead forming and excise equipment will be part of the process. Inspection systems also are used at the final part of the assembly process. If the package has flip chip instead of wire bond, the die attach and wire bond will most likely be replaced by a pick-and-place system for mounting the flip-chip die on the substrate, underfill dispense, and cure system. Test sockets, burn-in ovens, test handlers, and testers are all part of the backend infrastructure, not to mention dicing blades, wire bond capillary tools, bonder heads, nozzles and a host of other components used in the assembly process. While some equipment suppliers are part of large organizations, many of the companies that make up this infrastructure are relatively small in size and revenue, and would feel a prolonged period of slow sales. What does this mean for our industry’s future? As Business Week noted in June, tech companies have seen the deepest cuts in global capital spending, down 28% year-over-year. This much is certain: Even if these companies survive, few will be able to afford to devote resources to R&D for the next generation of packages. In some cases, these companies will Table 1. Capex Spending, Top 4 Package Subcontractors Year

Capital Expenditures

2008

$1,263 million

2009

$530 million

Source: TechSearch International, Inc., adapted from Goldman Sachs

merge with larger ones, and the equipment infrastructure will be maintained. For example, ESEC is now a part of BESI, and ESI has purchased the assets of XSiL. In some sad cases, operations will simply cease to exist. Agilent, for instance, announced the closures of its AOI and AXI business units. Is this of concern, or is this just another part of the semiconductor supply chain that will contract? Fewer material choices? Materials such as substrates, leadframes, bonding wire, mold compounds, underfill materials, dielectrics, plating solutions, solder balls, thermal interface materials, and a variety of other products are also part of the infrastructure. The materials sector has already seen consolidation (Henkel’s acquisition of National Starch's Ablestik and Emerson & Cuming business; Dow Chemical’s acquisition of Rohm and Haas.) In Taiwan, substrate suppliers PPT and Unimicron will merge. Will this result in few choices of suppliers, and shortages? In Taiwan, Chipbond reports the LCD driver IC backend assembly business is experiencing a shortage of substrates (tape in the form of chip-on-flex). Will prices rise over time? Will material suppliers be healthier in the future and therefore able to invest resources in materials to meet future industry needs? These questions remain. Future shock. Semicon West this year had fewer companies for the semiconductor backend assembly sector, and part of the reason certainly was the downturn. The question remains, after the recovery, will these companies return, or will empty halls echo with the sounds of ghosts from our industry’s past? n circuitsassembly.com

Going Under

Screen Printing

When it comes to understencil cleaning, the devil’s in the details.

M

ost would consider screen printing a single process: the first step in the assembly line. However, understencil cleaning is a process itself: a screen-printing sub-process. Not only must the production engineer be adept at printing techniques, but cleaning parameters and routines as well. Understanding software features such as cleaning rates (how often should you clean) and modes (wet, dry, vacuum and their various combinations) is critical and, of course, highly application-dependent. The industry default mode is generally wet/dry/vac – not that it is necessarily the right choice always, but that is what most operators are used to. Aside from determining rates and modes, cleaning materials selection is also tantamount to a robust cleaning process. The understencil fabric and solvents used to remove solder paste from today’s ever-smaller apertures play a large part in the success of the cleaning sub-process, and the overall print process. As an example, let’s take a look at the fabric. Obviously, the main goal with any cleaning fabric – even those used at home – is to clean the object free of debris at the end of the process. Unfortunately, quite a few understencil cleaning materials don’t do that. Instead, they put lint back onto the stencil, which may in turn block apertures. I’ve heard many engineers debunk the lint effect, arguing a 10 µm thread would have little to no impact. That may have been true five years ago when, by comparison, apertures were fairly big. Today it’s a whole new ballgame. In fact, during some recent stencil testing using various understencil fabrics, our company discovered lint is, indeed, quite problematic. With 0.3 mm CSPs that required aperture sizes of approximately 180 µm,

DIY Fabric Tests

Here are three easy, do-it-yourself fabric performance tests: • Lint: Take a piece of Scotch tape, adhere to fabric, press down and then rip it off. You will quickly see if a socalled “lint-free” material actually lives up to its claim. • Vacuum: Simply turn the vacuum on and feel the flow to sense the power and volume of the air coming through the weave. More elaborate air-flow measurement mechanisms can be used, but a simple “touch and feel” should do the trick. • Wicking: Cut a strip of fabric, place a line of solvent across it with a basic dropper and evaluate the speed and uniformity of the wicking.

circuitsassembly.com

our AOI results and analysis turned up some strange trends. When we evaluated the stencils in question, we found lint contamination. In most instances, we were finding low paste volumes, which were directly attributable to lint blockage of the apertures. In one case, a lint particle had become drenched in paste, and the inspection system actually viewed it as a bridged deposit. Keep in mind the lint issue is primarily a problem for the dry cycle, but the fabric selection impacts wet and vacuum cycles too. Ever tried to breathe through a paper towel? How about a piece of printer paper? I’d argue the former is more beneficial for your oxygen intake. The same theory holds true for the vacuum on the printer’s understencil cleaning system. You’re trying to pull vacuum through the fabric to clean out the apertures and, hopefully, dislodge and then capture all the residual paste into the open weave of the fabric. If the weave is too dense, you are blocking the vacuum, thus compromising its power and your cleaning process. You want a fabric constructed of porous material that permits air flow, yet captures material into the pores of the fabric. Then, of course, there is the wet bit. The solvent selected can most certainly have an impact on print performance (a topic for another column). Consider the importance of how the fabric wicks the solvent across the exposed area of the material. The solvent breaks down solder paste that remains on the outer edges of and inside the aperture walls, so a fabric that absorbs the solvent uniformly is desired. This must be a stable and highly repeatable process to be effective. The material should be fast and absorbent, and should almost instantly start wicking and create one solid bar across the fabric. What you definitely don’t want is a quick wick that keeps on wicking all the way through the paper because then, when you index the paper along for a dry wipe, it would still be wet. A good solvent process is primarily about the absorption rate of the fabric and also a little bit about the ability of the machine’s solvent bar to dispense the solvent at consistent volumes. If the fabric doesn’t wick properly, a thorough clean is unlikely. This introduces the potential for blocked apertures and, therefore, defects. The bottom line: Treat the understencil cleaning process with as much rigor and attention as the other parameters of the screen-printing operation. Don’t skimp on the fabric because, in the end, a few more cents for a high quality material will likely save big bucks. n Circuits Assembly AUGUST 2009

Clive Ashmore is global applied process engineering manager at DEK (dek.com); [email protected]. His column appears bimonthly.

15

Better Manufacturing

The Quickturn Era Those who can’t ramp might lose time-to-market.

T

he electronics interconnection industry is continually changing. Not only is the technology becoming more complex, the nature of business itself is rapidly evolving. The rise of the EMS segment of the industry, accompanied by the swift demise of vertically integrated OEMs, has pushed printed circuit board design, fabrication, assembly and test expectations of the current suppliers to their technical limits. Today, with reduction of the new product introduction (NPI) cycle time, time-to-market is critical for businesses to remain competitive. Quickturn and prototype services make up an important segment of the PCB fabrication market and it is imperative that North American suppliers offer this capability. However, today’s requirements go beyond the typical QT feature card designs and now include new dense PCB fabrication with more complexity, higher layer counts and more precise registration than previously required. Regardless of the complexity, fast cycle time has become an expectation, which in turn has led many suppliers to exit the business rather than make the large capital investment required for new, stateof-the-art tools with advanced processing capabilities necessary to stay ahead of the technology curve. Those suppliers that remain have picked up the customers of the departed, but continual capital investment, as well as investment in the technical personnel required to develop new processes capable of running new and advanced materials on state-of-the-art equipment, is required (not to mention expensive). For the customer, the payback of QT and prototype services is recognized in a significant reduction in process cycle time and process costs, which provides additional capacity and gets products to market faster. Doing so, however, means that the production fabricator must be able to produce the same highly complex product as the quickturn fabricator, lest all the time and effort be wasted. Thus, many end-customers are looking for fabricators capable of providing a rapid turn for the early user hardware or prototypes along with the ability to supply the low volume ramp and volume production quantities of their products. To do this, the QT/prototype line must be a mirror image of the production line with identical processes, chemistries, and techniques implemented, plus a common set of design and data release tools used for both production and QT.

As readers know, defense programs have been a growing and profitable piece of electronics manufacturing over the past several years. In military programs specifically, suppliers have learned that in order to be considered for production work, fabricators must be able to provide quickturn, early user hardware/prototype boards. Customers use these boards to verify the design, and expect their fabricators to offer advice regarding design for performance and manufacturability, along with delivering on time and within budget. Acceptance criteria for QT and prototype products is another matter to consider, as they may differ from the volume production requirements due to the use and expectations of those products. Furthermore, discussions defining when the clock starts for ultimate delivery of a quickturn order and requirements for accepting design data need to be clearly communicated at the forefront of any project. Quickturn and prototype services are not only an important differentiator for North American PCB fabricators today, but it is also an essential part of remaining competitive and satisfying customer’s expectations. While there is an upside to providing these services – premium pricing, gaining entry into potentially higher volume production and new customers – huge investment is also required to maintain a competitive edge. n

Acceptance criteria for QT and prototypes may vary from those of volume production.

Jeff Knight is vice president of business development at Endicott Interconnect Technologies (eitny. com).

16

Circuits Assembly AUGUST 2009

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Cover Story

Preventing MLCC Failures Understanding how mechanical anomalies can cause electrical failure in MLCCs. By Tom Adams

W

hen engineers go through the task of pinning down the cause of one or more field failures, the cause often turns out to be a damaged or failed multilayer ceramic chip capacitor. The nature of a field failure caused by a bad capacitor may range from total system failure to a failure of one or more system functions, to an intermittent failure, the latter of which can mimic a software problem. Here, we look at the mechanical causes of failures in MLCCs from the fabrication of the capacitor through system assembly. Much of the detailed information comes from Sonoscan’s applications laboratories, which have imaged acoustically and analyzed tens of millions of MLCCs. An understanding of how mechanical anomalies can cause electrical failure in MLCCs is important for three reasons: 1) End-of-line electrical testing usually does not detect a mechanical anomaly because the electrical signature of the anomaly is minute or absent at this time. 2) A mechanical anomaly may endure weeks or months of service use before it changes or expands enough to reveal itself as an electrical failure. 3) The number of field failures resulting from a single type of mechanical anomaly can be large. Defects introduced during manufacture. MLCCs are made by laying down alternate layers of dielectric and electrode materials, and then firing the capacitors. Of the three most frequent types of internal damage (voids, delaminations and cracks), two – voids and delaminations – can form during the manufacturing process. Cracks as a result of manufacturing processes were frequent a decade or two ago, but have been made rare by more precise control over the processing. Voids are most often tiny air bubbles trapped within the capacitor. A void can be very much flattened – its width might be 100 times its height – but dielectric material will be missing from one or more layers. A delamination is simply a non-bonded area between layers, without loss of dielectric material. When an MLCC is cross-sectioned, a void is typically lens-shaped (because circuitsassembly.com

it is a bubble flattened by the pressure of overlying layers), while a delamination is simply a thin horizontal gap. Voids and delaminations can be the precursors of cracks. Cracks also can be caused by variable porosity in the dielectric layers, a condition in which irregularly distributed microscopic air bubbles weaken the ceramic. The photo on the cover of this month's issue shows the acoustic image of an MLCC that contains a single void. In performing acoustic imaging of an MLCC, the scanning ultrasonic transducer of the acoustic microscope pulses ultrasound into the MLCC several thousand times a second as it moves back and forth across the MLCC. A fraction of a microsecond after pulsing, it also registers the return echoes from within the MLCC. System software typically accepts return echoes from just below the top surface of the MLCC to just above the bottom surface, a technique known as bulk imaging. A defect-free MLCC will send back no return echoes, but an MLCC having any gap-type defect such as a void, delamination or crack will send back very high amplitude echoes from the defect. (Here, the void appears red, which is highest level on the color map at left, because the solid-to-air interface reflects nearly all of the ultrasound.) The amplitude is very high because of the extreme difference in acoustic properties between the solid material of the capacitor and the air inside the defect. It is this interface between a solid and gas that reflects virtually 100% of the pulsed ultrasound and produces an acoustic image of the anomaly. Voids such as the one shown on the cover are important because they can cause long-term failures in MLCCs. For example, a void may be located in the middle of one layer of dielectric. This may seem like a harmless location, and in some capacitors it is harmless. But the electric field between two electrodes may cause metal to migrate and to plate the inner surface of the void. Eventually, a weak current may begin to flow between the electrodes. Ultimately – weeks or months after the beginning of field service, perhaps – the metal plating becomes substantial enough to cause a short. Many of the MLCCs imaged in Sonoscan’s laboratory are destined Circuits Assembly AUGUST 2009

17

Cover Story

Figure 1. The acoustic image of this MLCC reveals many small voids formed by dust particles, and a larger elongate void formed by an organic fiber.

for aerospace or military applications, where a slowly developing short or other internal anomaly can have catastrophic results. A crack, like a void, also can experience metal migration and become plated. Under some conditions, the metal plating within the void or crack may diminish or disappear. This is likely to happen if the capacitor is exposed to infrequent higher voltages. If a capacitor is suspected of having a short, it may intentionally be exposed to a high-voltage current. This crude method may repair the capacitor temporarily, although the resumption of normal lower voltages may restart the plating process. Intermittent failures can occur in this manner (but see the information on cracks below). A crack also can cause a short with no metal migration at all. If the crack extends through multiple electrode layers, thermal or mechanical forces can move layers until electrodes having different polarities come in contact with each other. Less frequent types of anomalies also can occur during fabrication of an MLCC. Very occasionally, airborne organic particles can find their way into the layers. The small white spots in the acoustic image of the capacitor in Figure 1 are ordinary, microscopic dust particles trapped during fabrication and burned off during firing of the capacitor. They leave tiny empty voids that are strong reflectors of ultrasound. The longer feature (left of center) is a microscopic fiber of organic material, which, when burned off, leaves a characteristically elongate void that, like any other void, has the potential to cause an eventual short. When adjacent layers in the MLCC are not bonded during manufacture, the result is thin air-filled delamination. Delaminations can be large in area, and a single MLCC may have multiple delaminations at different depths. When the MLCC is imaged acoustically from above, the delaminations may overlap (Figure 2), where essentially the entire area of the MLCC has a delamination at least at one depth, and where the yellow edges (marked by arrows) of some of the individual delaminations can be made out. Delaminations are generally very thin, but they can be imaged acoustically even if the vertical extent of the gap is as few as 0.01 µm. Unlike some voids, delaminations are not typically in a location where they can breach a dielectric layer, yet they can cause shorts, presumably because delaminations may make it easier for a crack to form. Defects in the unmounted MLCCs that flow into Sonoscan’s 18

Circuits Assembly AUGUST 2009

Figure 2. This MLCC has multiple overlapping delaminations at multiple depths that collectively cover essentially the entire area. Arrows mark acoustically visible edges of delaminations.

Figure 3. A novel method finds cracks and delaminations in squareended capacitors regardless of orientation.

applications laboratories for imaging are most likely to be voids or delaminations. Cracks are occasionally seen, but are more likely to result from handling rather than manufacture. Special techniques are sometimes needed for imaging. Some newer MLCCs have acquired additional layers in order to increase capacitance without increasing footprint; as a result, the MLCC has become square in end view, and the operator of the acoustic microscope cannot tell which side is up. A delamination that is obvious when horizontal is hard to image when it becomes a vertical knife-edge. To avoid the tedious labor of turning square MLCCs by 90° and imaging them twice, Sonoscan has developed a technique (Figure 3) that images cracks and delaminations, regardless of orientation. Defects introduced during assembly. Damage to MLCCs during the early stage of assembly is likely to be caused by handling. The MLCC is picked up by a vacuum tool or tweezers and is either placed on bond pads in preparation for reflow, or glued to the board in preparation for wave soldering. In either case, damage – usually in the form of a crack – is possible. Damage also can occur during reflow and wave soldering, when the MLCC receives a thermal shock that can aggravate existing internal stresses until a crack forms. MLCCs are much less suscircuitsassembly.com

Cover Story ceptible to moisture-related damage than plastic-packaged ICs. In theory, moisture can collect within a capacitor and fill an existing void (with destructive results when the moisture flashes into steam), but such events are far less common in MLCCs than they are in plastic-packaged ICs. The very small dimensions of some MLCCs also may make it harder for moisture-related damage to occur because the much higher ratio of surface area to volume lets moisture escape more rapidly. Whether a damaged MLCC can be identified during end-of-line electrical testing depends first on the extent of the damage. A small crack or other anomaly that has not (yet) created contact between adjacent electrodes will not be identified, even though it may expand and cause an electrical failure later. An anomaly that has created a leakage current within the MLCC might be found if the MLCC serves an essential function within the signal path. But an MLCC in a decoupling role can be found only by examining the noise level in the supply lines. These constraints make acoustic imaging of MLCCs after reflow or wave soldering an important tool. Finding cracks in a significant number of MLCCs, or in MLCCs at specific locations on the board, gives the opportunity to change process parameters and remove the stresses generating the cracks. Acoustic imaging is often carried out during R&D or during pilot production, but also may be used periodically during full production to eliminate the possibility of field failures. During assembly, large panels are in some fashion separated into individual printed wiring boards. Cracks can form in MLCCs during the separation process. These cracks are most likely induced when the panel sections are snapped apart, but they can occur with other methods of separation and are sometimes more frequent near the edges of the board, where mechanical stresses are presumably higher. They are generally more likely when Pb-free solders are used, because Pb-free solders are quite rigid. SnPb solder is more plastic and better at absorbing mechanical stresses. Separation-related cracks are likely to be near the terminations and are likely to be vertical, and are most easily found with the method for vertical crack detection developed at Sonoscan. When cracks caused by the panel separation process are suspected of causing field failures, their role can be clarified by first performing acoustic imaging on unmounted MLCCs, preferably from the same lot. Unmounted MLCCs with no internal defects circuitsassembly.com

go through assembly and are imaged acoustically again after reflow or wave soldering, to remove those steps as causes of the cracks. The panel is then separated by the same method used for the MLCCs that caused field failures, and the boards examined acoustically for telltale vertical cracks near the terminations. n Tom Adams is a consultant at Sonoscan, Inc. (sonoscan.com); [email protected].

Circuits Assembly AUGUST 2009

19

Reflow Profiling

Oven Adjustment Effects on a Solder Reflow Profile Belt speed, zone temperatures and static pressure all impact peak temperature. By Fred Dimock

T

he change from eutectic to Pbfree solder has required new recipes for reflow ovens. Solder paste manufacturers have developed profile parameters, but it remains the responsibility of the assembly engineer to find the correct control settings with a limited number of reflow oven adjustments. Additional complications exist because the liquidus temperatures of the new solders require peak temperatures close to the point at which components are damaged. Thus, the importance of accurate recipes and precision oven control is amplified. Conventional reflow ovens have two adjustments for profile development. One is the zone set points and the other is belt speed. Some oven manufacturers have added high, medium and low fan speeds as an additional adjustment, and one manufacturer has a closed-loop pressure control. Given the three possible adjustments, a study was undertaken to determine the effects varied belt speeds, static pressures and zone temperatures have on the peak temperature, time above liquidus (TAL) 20

and temperature uniformity of a 100 and 230 g populated surface mount board. Experimental A Pyramax 98 N reflow oven with edge rails, fine mesh belt, and closed loop pressure control was used for this experiment. A recipe that produced a Pb-free ramp-to-peak profile with a belt speed of 28 IPM and static pressure of 1.0 IWC was chosen as a baseline (Table 1). Table 1. Baseline Recipe

The plan was to individually vary each parameter (high and low) and record its effect on the TAL, peak temperature and uniformity of each board. An additional run was performed with all variables at the high and low settings to see the combined effect. High and low ranges were established for each of the variables, as outlined in Table 2. Data were gathered with a SlimKIC II profiler.

Table 3. Board Weight Results

E

Set Points

E

100 G

250 G

Z1

100 °C

Peak (°C)

231.6

225.5

Z2

125 °C

TAL (sec.)

33.18

25.07

Z3

150 °C

Z4

175 °C

Table 4. Belt Speed Changes

Z5

200 °C

E

Z6

225 °C

BS - IPM

24

32

24

32

Z7

250 °C

Peak (°C)

234.8

229.1

229.3

222.2

BS

28 IPM

TAL (sec.)

39.61

25.59

35.72

17.19

SP

1.0 IWC

Uniformity

1.7

1.8

1.5

1.6

Table 2. Variable Experimental Ranges E

Ranges

Static pressure

±0.3 IWC

Belt speed

± 4 IPM

Z5 and Z6 Set point

±10 °C

Circuits Assembly AUGUST 2009

100 G

250 G

Table 5. Zone Temperature Changes E

100 G

250 G

Zone temp.

240

260

240

260

Peak (°C)

223.4

240.9

217.7

233.2

TAL (sec.)

20.48

42.24

6.16

35.03

Uniformity

2.1

2.2

1.6

1.8

circuitsassembly.com

Reflow Profiling

Figure 1. SlimKIC II profile of the 100 g board.

Results The 100 and 230 g boards were run at the baseline operating parameters of 28 IPM, 1.0 IWC and zone 7 set points of 250°C. Figures 1 and 2 show the resultant profiles for the 100 and 230 g boards, respectively. Table 3 shows the peak temperature and TAL data for the boards. There was a difference of about 5°C at the peak and 8 sec. in the TAL between the two boards because of weight and board design. Belt speed. Belt speed was varied from 24 to 32 IPM with the static pressure and zone set points at the baseline settings. Table 4 shows the peak temperature, TAL and uniformity data for each board. The increased belt speed Table 6. Static Pressure Changes E

100 G

250 G

Pressure

0.7

1.3

0.7

1.3

Peak (°C)

229.2

234.0

222.0

227.3

TAL (sec.)

26.94

35.79

18.12

29.20

Uniformity

2.3

1.7

2.3

1.5

Table 7. Interactions E

100 G

250 G

low

high

low

high

Peak (°C)

218.4

245.7

210.6

240.2

TAL (sec.)

4.21

59.36

0

49.25

Uniformity

2.7

1.6

2.6

1.5

circuitsassembly.com

Figure 2. SlimKIC II profile of the 230 g board.

lowered the peak temperature and TAL, and slightly decreased the temperature uniformity at the peak. Zone temperature. The oven was reset to the baseline parameters, and the temperatures in zones 6 and 7 were increased and decreased by 10°C. Peak temperature and TAL increased with the higher zone temperature settings and the uniformity decreased (Table 5). Static pressure. The oven was reset to the baseline parameters and the pressure varied from 0.7 to 1.3 IWC. The increased static pressure increased the peak temperature by about 5°C and TAL by about 10 sec. (Table 6). The uniformity at peak was significantly better with the higher static pressure. High and low interactions. Next, the combination of all the high temperature parameters (low belt speed, high zone set points, and high static pressure) and low temperature parameters (high belt speed, low zone set points, and low static pressure) was used to determine the interactions on each board. There were significant changes in all the profile attributes, with about 30°C differences in peak temperature and close to 50 sec. in TAL (Table

7). Uniformity was considerably better with the high oven parameters. In the case of the heavy board, the peak temperature did not reach the liquidus when all the settings were set low. Today’s high performance reflow ovens have three adjustments that permit recipes for solder reflow profiles. A recipe that works for one board won’t necessarily work for another board if the weight or design is significantly different. Of the three oven adjustments, the zone set points have the biggest effect on the peak temperature and TAL. Changing the belt speed also affects the peak temperature and TAL, to a lesser degree. But the static pressure not only affects the peak temperature and TAL, it has the biggest impact on uniformity at peak temperature. Pb-free solder’s more stringent process requirements make it important that all three adjustments – zone temperature set points, belt speed and static pressure – be used when developing recipes. n Fred Dimock is senior process engineer at BTU International (btu.com); [email protected].

Circuits Assembly AUGUST 2009

21

Koh Young

More than Just a Look SPI market leader Koh Young is shrugging off the recession and setting its sights on Europe. By Mike Buetow

O

n the subject of expansion, every business case study says the best time to do it is during a downturn. Take advantage of the market lull to grab market share, the researchers say. Few do. It’s much safer to protect cash and other assets than to risk failure (and one’s job). In other words, follow the herd. Following the herd isn’t what Koh Young Technology (kohyoung.com) is about. The vision machine maker in May opened the doors on its pristine new demo and training center in Alzenau, Germany, about 45 minutes from Frankfurt’s international airport. (The event coincided with a less auspicious debut of its Ireland office, which will handle sales, support and administrative functions.) The new offices are set to serve continental Europe, the UK and Ireland, where the company through May had sold 230 of its 940 installations worldwide. In making the announcement, founder and chief executive Dr. Kwangill Koh said, “Today we celebrate a significant milestone in the growth of Koh Young as a global company. The European market a key growth area, and the establishment a strong presence here, in conjunction with the introduction of our revolutionary new 3-D AOI technology, will fuel that growth.” That “revolutionary new 3-D AOI technology,” of course, refers to the Zenith machine, which debuted at Apex in April and has been making media waves ever 22

at Vitronics-Soltec. since. Its staff in place, the company was ready Why Europe, and why now? to make its move. After some discussion and The stage for Koh Young’s migration to due diligence, it settled on Alzenau, which Europe was set by Pieter Stins, a veteran of offered ready access to the key German Vitronics-Soltec and Nutek, who saw a Koh market, which still dominates electronics Young SPI machine at Productronica and, manufacturing in Western Europe, but was though on the cusp of retirement, decided centrally located and accessible to both the to buy one and build a new distribution traditional pockets in Italy and France, and company around it. (That company, PPT, is the emerging markets of Eastern Europe. now Koh Young’s distributor in Germany, The new center has in place the full Austria, Switzerland and parts of Eastern range of the Koh Young platform, including Central Europe.) Meanwhile, in Asia, Koh the previously released 8030-2 and 8030-3 Young was going gangbusters, and looking SPI machines, on which the company built to extend its reach abroad. its name and reputation; a KY-3020T, which Having gone public on Korea’s KOSis the semiautomatic tabletop version; and DAQ exchange in June of last year, and hit the aSPIre-2 SPI, the four-way light projec$35 million in sales in fiscal 2008, Dr. Koh tion system that also debuted at Apex. embarked on a five-year plan with the goal The new site also features an Ekra screen to reach $150 million in annual sales, which would make it by far the largest OEM of electronics assembly inspection equipment (Table 1). Seeking to make its mark on the West, Koh Young turned to two well-known industry veterans: Harald Eppinger and Thorsten Niermeyer. Niermeyer, who previously worked for Agilent and MVP, was named global sales director, based in Ireland, while Eppinger runs the Germany office as European sales manager. It also brought aboard André Opening doors. With help from global sales director ThorMyny as global marketing direc- sten Niermeyer, Dr. Kwangill Koh cuts the ribbon at the new Koh Young facility in Germany. European sales manager tor, a role he previously handled

Circuits Assembly AUGUST 2009

Harald Eppinger is in the foreground at right. 

circuitsassembly.com

Koh Young printer for hands-on process training with customers. The highlight, however, is the new automated optical inspection system, now named Zenith, which is the first to feature 3-D inspection. The machine senses and measures the z-axis profilometry of whole assembled PCB surfaces, including components, solder joints, patterns, holes, and foreign material. The system, which features eight-way projection in order to compensate for the taller solder joints and paste, can run conventional 2-D AOI as well. Zenith is designed for pre- or postreflow, but as of the May open house had not yet been tested on mixed-technology boards. (Most AOI traditionally have struggled with plated through-holes.) Still, the distributors on hand at the May open house, including Danutek (danutek. com), LifeTek (lifetek.it), Amtech (amtech. cz) and several others, some of which brought boards to test on it, were visibly impressed.

Table 1. KY SPI Market Share, By Year 2006

20%

2007

26%

2008

35%

Source: Koh Young

Breaking in. With the introduction of the 3-D-capable Zenith, Koh Young has broken into the AOI market in a big way.

“I do believe the Zenith is a unique approach to AOI and will guide industries and competitors to a new era of defect detection and measured process control,” said Giovanni Scotece of Meda, Italy-based LifeTek. With the opening of the European offices, the company hopes to build an AOI expert center, expand its service organization, and create an innovation center for new products, which could include solar,

although the executives were a bit coy about it. More expansion is ahead, Dr. Koh said. The company in December will move to a new headquarters in western Seoul, which will include an R&D center and manufacturing facility. The new site will be 77,000 sq. ft., or 89% larger than the company’s current digs. It will house most of the firm’s 120 staff, seven of whom have a Ph.D., and 32 of whom have a master’s degree. Koh Young has in its sights the inspection markets for PCB, wafer, substrate and even solar cell markets. It’s an ambitious plan, but the company hasn’t missed its targets yet. ■ Mike Buetow is editor in chief of Circuits Assembly; [email protected].

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Circuits Assembly AUGUST 2009

23

Wave Soldering

Optimizing Process Development Harmonizing all the parameters is no simple feat.

W

Ursula Marquez de Tino, Ph.D. is a process and research engineer at Vitronics Soltec, based in the Unovis SMT Lab (vitronics-soltec.com); [email protected]. Her column appears monthly.

24

hat are the best settings for a wave soldering process? The answer is not as simple as one might think. Much depends on the flux type and end-product. However, adherence to some basic rules will ensure a robust process. A good wave process depends on establishing correct machine and product parameters. Fluxing, preheating, conveyor speed, solder temperature, dwell time, wave height, wave type, nitrogen and exhaust are machine parameters, while board complexity, component types, flux type and pallet use are product parameters. All these parameters interact and therefore should be optimized to work in harmony. A wave soldering process breaks down into the following categories: Fluxing. The correct amount of flux to be applied per board is based on the flux supplier’s specifications. Excessive flux may interfere with the product’s electrical reliability, and a moderate amount of flux may not provide sufficient tail activity to reduce bridging and to obtain good through-hole penetration when the board leaves the wave. It is extremely important to optimize fluxer settings, which are related to conveyor speed. Visual testing should be used to ensure proper overlap and penetration of flux. With alcohol-based flux, thermal fax paper can be used on the bottom of the assembly and processed through the fluxer only. A visual footprint then can be seen and areas missed by the flux pattern identified. The same is true if the paper is applied to the top of an unassembled board. The paper must be fixed to the assembly to avoid movement during flux application. For water-based flux, pH paper can be used. Also commercial test fixtures can be used for flux test application. The appropriate flux type (i.e., alcohol- or water-based fluxes) depends on the application, board surface finish, solder resist, board complexity and other issues. Preheating. Board preheating is necessary to evaporate flux solvents and to prepare the board and flux for soldering. Preheating also is used to reduce thermal shock of components and to promote better through-hole penetration, especially for multilayer boards. The flux supplier specifies preheating parameters. For the case of alcohol (i.e., isopropyl) fluxes, the board topside temperature should be above 82°C, and for water fluxes above 100°C. Complete evaporation of the solvent is important to reduce soldering defects such as openings, voiding, and solder balling. Depending on the type of flux and board thickness, higher preheat temperatures Circuits Assembly AUGUST 2009

may be required to activate it. When surface mount components (i.e. chip components) are glued to the bottom side of the board, it is important to ensure that the ΔT between the temperature of the components and solder temperature is between 100° and 110°C. It is important to follow the supplier’s specifications for wave soldering surface mounted components. Conveyor speed. A typical conveyor speed setting will be in the range of 1 to 1.5 m/min. The speed setting depends on board complexity. Single-sided boards often can be soldered at high speed because they often have a low thermal demand and no plated-through barrel, and thus do not require topside fillets. A multilayer board may have a high thermal demand and 1 m/min could be too fast. To optimize the conveyor speed, it is also important to consider the board layout at the solder side, which can be a decisive factor to prevent solder bridging. Soldering temperature. The solderpot temperature setting depends on the type of solder, but also may be related to the product to be soldered (i.e., board complexity, pallet use, or exposed bottom-side surface mount components). In general, low temperature settings are recommended to avoid board warpage and component damage. Lower temperatures create less dross, and extend the lifetime of the flux so that it has better tail activity. During soldering, the topside board temperature must be below the melting point of the surface mount component joints to avoid double reflow. For SnPb solders, 245° to 250°C is a common setting. For SAC alloys, 260° to 265°C is the recommended setting. It is important to keep the solder bath volume constant to maintain soldering temperatures.

Figure 1. One of three wave types, main wave creates a smooth wave that prevents bridging. circuitsassembly.com

Dwell time. A board must touch the wave for a sufficient time to make a good solder joint. The real contact of a joint depends on the protruding length of the leads and the board layout. The typical contact time for Pb-free applications is between 3 and 6 sec. The dwell time also may affect board warping. To avoid excessive warping, board supports or pallets can be used. Wave height. The wave height should be kept low to minimize dross formation. In general, lead clearance of 6 to 8 mm relative to the bottom of the assembly to the wave formers in the solder pot is preferred. Lower settings may move components during soldering, as the leads may touch the nozzle rim. A wave height setting should be constant within a few tenths of a millimeter. For this reason, the solder level of the solderpot should be monitored and corrected automatically. Wave type. There are three types of waves: chip, main and smart wave. Depending on the type of assembly and flux, it may be best to use one wave former. Chip wave is a turbulent wave and is used as first wave to enable wetting of chip components, which are surrounded by non-wettable component bodies. Main is the second wave (Figure 1) and is Expo half page print2.pdf PM aSMTA smooth wave that prevents 5/13/2009 bridging. 2:19:20 The smart wave is located over the main wave and produces

turbulence, which may be beneficial for throughhole penetration. Nitrogen. Nitrogen may be helpful to support flux activity during the separation of the board from the solder wave. During this separation process, the solder should stay on the joints and not in between joints. Bridging occurs because of solder oxide formation at this stage. Solder oxides are formed due to lack of flux activity and the presence of air. By applying nitrogen at that stage, it can displace the air and assist in better drainage conditions due to reduced oxides. Cooling. As soon as the board leaves the wave, the solder joints cool rapidly at a rate of -10° to -15°C/s. Heat from the solder joints is absorbed by the component leads and the board’s copper traces/layers, resulting in rapid joint solidification. Here, the cooling system will not affect the microstructure of the solder joints, but can be used to reduce the board temperature for handling purposes. Good wave soldering machines should have proper control and produce repeatable temperatures to ensure the profile is the same for all boards. To monitor the repeatability of a machine, SPC software is used. This helps monitor several machine parameters, detect process shifts, and recommend preventive maintenance. This way, the user can be sure all components and joints reach correct soldering temperatures. n

Wave Soldering

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Circuits Assembly AUGUST 2009

25

Tech Tips

Relieving a HASL Don’t maintain the status quo if potential to reduce manufacturing failures exists.

A

The ACI Technologies Inc. (aciusa.org) is a scientific research corporation dedicated to the advancement of electronics manufacturing processes and materials for the Department of Defense and industry. This column appears monthly.

26

n inquiry led to an investigation on the possible causes of printed wiring board failures, which were becoming increasingly prevalent after SMT manufacturing. Failures were detected by electrical testing, but the location and specific devices causing the failures were undetermined. The failures were suspected to be predominantly in the BGAs located on specific sites on this 16-layer construction. Failure data provided included high resistance shorts occurring in those specified areas. The surface finish was a eutectic HASL, and the solder paste was a water-soluble SnPb. The diagnostic approach agreed upon included an examination of both the quality of the manufacturing process and the materials used for assembly, as reviewed below. SMT process. The first order of diagnostics, a manufacturing audit to assess the SMT process, revealed: Solder paste was properly stored and permitted to reach ambient conditions prior to use. The solder mesh was appropriate for the type of assembly, and the paste was not expired. Stencils used for paste application were properly proportioned with an aperture size appropriate to the BGA device pitch. The stencil printing operation revealed no flaws, and paste was applied in a smooth, consistent manner with uniform height and width. The paste reflowed uniformly and covered leads per IPC-A-610D class 3 specifications. No apparent skips or

Figure 1. Wetting balance curves showing T0 >5 sec. Circuits Assembly AUGUST 2009

dewetting were noticed on resistors, capacitors or leaded chip devices. The reflow oven has four zones and short length, but no issues around reflow quality were seen as a result. The recommendation was made to increase to a seven-zone oven to increase profiling flexibility for various designs. Reflow profile. The reflow profile was in the specified range for the solder paste of choice (Alpha WS-809). Thermocouple placement was in appropriate locations, and the temperature uniformity among each location reflected an even distribution of heat. The time above liquidus (TAL) varied by only 6 sec. between the highest and lowest time, while the peak temperature varied by 13˚ among locations. There was no evidence of hot or cold spots. The assembly TAL averaged 90 sec., well within the vendor-recommended TAL range of 40-120 sec. As reflow was clearly achieved, and there was no evidence of cold solder joints, a recommended step was to decrease the TAL from 90 to 60 sec., which would improve wetting without a risk of incomplete solder reflow. However, the present reflow profile is consistent with the recommended parameters prescribed by the solder paste vendor. Bare board inspection. A visual assessment of the bare boards showed evidence of solder mask overlap into Table 1. XRF Data – Components Component

Area

Sn (%)

Pb (%)

1

1

68.01

31.99

1

2

68.51

31.49

1

3

6.13

33.87

2

1

68.25

31.75

2

2

67.47

32.53

2

3

68.32

31.68

3

1

69.65

30.35

the pad areas, exposed copper under the HASL surface finish, and nonuniform HASL finish in certain cases. XRF inspection. BGA devices and bare board were analyzed using x-ray fluorescence to determine the alloy composition of the metal (Tables 1 and 2). This is a common method used when the composition of the component alloy or surface finish is in question. XRF summary. Components indicate a eutectic or near eutectic SnPb composition. Analysis of the HASL finish indicated a non-uniform thickness, and at certain locations, the finish was thin enough to permit the underlying copper to overwhelm the alloy analysis. X-ray analysis. X-ray analysis was performed on a populated board at the various BGA locations suspected as problematic. No evidence of shorting opens or misalignment was prevalent. Optical endoscope. The populated assembly was analyzed through an endoscope to see any evidence of incomplete collapse or other observable phenomena such as dewetting or head-in-pillow effect. No unusual occurrences such as excessive solder or flux residue were visible. However, the graininess of the solder balls may indicate the start of an oxidizing surface. This can be due to excessive time in liquidus state. The solder balls seem to be well collapsed and formed. Wetting balance. The wetting balance test showed significant issues with the wettability of the HASL board at various locations (Figure 2). J-STD003 criteria suggest time to buoyancy corrected zero, T0 (where the wetting force goes positive), should be less

3

2

69.76

30.24

Table 2. XRF Data – PWB Board Surface

3

3

72.11

27.89

Board Area

Sn (%)

Pb (%)

Cu (%)

4

1

65.82

34.18

1

7.77

15.02

92.75

4

2

65.99

34.01

2

39.70

35.46

24.84

4

3

64.27

35.73

3

0.0

0.0

100.0

circuitsassembly.com

than 1-2 sec. In every sample tested, T0 was greater than 5 sec. Conclusions and Recommendations The HASL surface finish is non-uniform, with copper exposure and very thin layers of HASL in some areas. The wettability is well below the recommended wetting criteria, as specified by IPC specifications, and can be a primary concern during assembly. Residual oxides on the HASL surface may prevent proper wetting, or form weak intermetallic interfaces when reflowed. The type and amount of oxide residue can be ascertained through Sequential Electrochemical Reduction Analysis (SERA). The x-ray images showed no evidence of poor alignments, opens or shorts. Optical endoscope images showed no anomalies and good BGA ball collapse. ENIG should be considered as a board surface finish instead of HASL, if available. It is the most common

finish for BGAs, and would eliminate the non-uniform surface finish. Application of a more uniform HASL surface would ensure complete coverage of the underlying pad and alleviate exposure of the underlying copper, while reducing the risk of oxidation. The HASL bath should be analyzed for contamination from excessive metals and other residuals from the soldering process. Reducing the liquidus time by 30 sec. may help alleviate excessive formation of oxides on the solder. A seven-zone oven would permit more flexibility in shaping the reflow profile around a varied array of designs and constructions. Lessons Learned Results of the analysis indicated that, although certain process and manufacturing improvements can be made to reduce both systematic and randomized failures, examination of the raw materials (for example, the PCB) can prevent a significant amount of manufacturing defects.

In this particular case (which is not atypical), a thorough investigation provided the engineer enough data to support the claim that the cause of electrical failure was due to noncompliancy in the surface finish that caused dewets. Establishing documented proof of failure can exonerate the manufacturing process, and prevent excessive and unnecessary expenses. There is a natural inclination to avoid impugning an established process that has, for the most part, produced a successful product. However, the temptation to maintain the status quo should be avoided if the potential to reduce manufacturing failures exists. Most issues arise when an interaction between non-centered processes result in a multiplicative effect. In this case, the effect of poor distribution of the HASL surface, along with a marginalized reflow process, combined to produce failures that may not have occurred if either of the conditions for HASL or reflow was optimized. n

Dewetting or Non-wetting Causes When the solder doesn’t stick, first check the pad.

Tech Tips

Wave Soldering Troubleshooting

D

ewetting is a condition that results when molten solder coats a surface and then recedes, leaving irregularly shaped mound(s) of solder separated by areas that are recovered with a thin film of solder and with the basis metal unexposed. Non-wetting is a condition in which there is partial adherence of molten solder to a surface it has contacted, and the basis metal remains exposed. While we usually list in this space the primary process setup areas to check, dewetting and non-wetting typically are board-related due to pad surface contamination. Other things to look for in the process include: • Solder temperature too low. • Preheat too high or low. • Excess or insufficient flux blow-off. • Solder wave height low. • Flux not making contact. • Flux contamination. • Board pallet too hot. • Flux applied unevenly. circuitsassembly.com

Figure 1. Dewetting or non-wetting usually is tied to pad contamination.

• Flux SP GR too low. • Conveyor speed too fast or slow. • Board not seated properly. • Flux SP GR too high. • Solder contamination. Other things to look for with the assembly include: • Board or component contamination. • Improper board handling. Other things to look for with the board design include: • Oxidation. • Contamination. n Circuits Assembly AUGUST 2009

Paul Lotosky is global director - customer technical support at Cookson Electronics (cooksonelectronics. com) [email protected].

27

Getting Lean

Applying Lean Principles to Customer Satisfaction Measurement A new system weighs the impact of proposed changes.

A

Tony Bellitto is quality manager-US Operations at Epic Technologies (Epictech.com); tony.bellitto@Epictech. com.

basic premise in Lean manufacturing principles is the elimination of non-value added activity by minimizing variation. However, standardizing systems while accommodating the needs of 30 or more customers can be a significant challenge for EMS providers. Customer satisfaction measurement is one area where standardization can improve efficiency. Yet, the more standardized the format, the less meaningful it may be at the customer level. Like many contract manufacturers, Epic ran a dual customer satisfaction system. Epic participated in its customers’ ratings systems and conducted monthly and annual webbased customer satisfaction surveys. However, only 8% of customers were sending formal monthly scorecards defining their expectations. Of the remaining customers, only 20% were filling out monthly surveys, and the surveys tended to generate subjective responses that did not necessarily tie to specific improvement activities or clearly defined goals. In the fourth quarter 2007, the company’s management team decided to put a new system in place that would: • Work seamlessly across multiple facilities. • Better align with each customers’ measurement criteria (expectations of Epic performance). • Deliver quantitative feedback, even on softer areas of evaluation such as quality of team interaction. • Ensure that both Epic’s customer focus teams (CFT) and operational management had continuous visibility into customer issues and status of corrective actions. • Integrate with long-term objectives for account growth. The new system was fully implemented in 2008, then reevaluated and fine-tuned last March. System overview. We manage projects using a Customer Focus Team model. Each CFT includes a program manager, account manager, quality engineer, product engineer, test engineer, material analyst and inside salesperson. Early in our operational strategy formulation, management developed a methodology for measuring and sharing performance information, known as the Plant Operational Review (POR) system. The original version monitored approximately 60 metrics company-wide down to the floor level. These metrics were formally reviewed on a daily/weekly basis by project personnel, monthly by plant managers, and quarterly by senior management. Over time, the system has evolved to include the original metrics list, external benchmarks and longer-term performance trends. The POR process starts with a summary of overall company financial performance metrics, then focuses on specific productivity and operational performance in human resources, quality, manufacturing, engineering, sales, purchasing and finance.

The functional managers responsible for performance to measured metrics are also responsible for defining the external benchmarks relevant to their areas. During the gap analysis of the former Customer Survey System, opportunities for improvement were identified that could tie into the management review cycle (POR) to close our internal loop. One such opportunity was to create a working tool for use by the CFT and customer that would define expectations based on the monthly survey. The redesigned customer satisfaction measurement tool was named the Customer Expectation Worksheet. A goal for the new system was that it link to POR, showing both customer issues and the status of corrective actions related to those issues. Another goal was to link the customer satisfaction survey closely with other program management tools. One key tool that was developed was the CFT Tracker. The CFT Tracker is a living diary of each customer. It is an Excel workbook resident on the company’s intranet that includes tabs for core customer team contact list, product/ part number lists, NPI planning, meeting agenda, CFT open action items, continuous improvement team (CIT) tracker, CFT Paynter chart, customer PPM tracking, scrap analysis, closed CFT action list and the Customer Expectation Worksheet. In short, the CFT provides the entire account history and current status information at the fingertips of anyone within the organization. Because the CFT Tracker stores trends information related to quality and continuous improvement initiatives, it enables real-time analysis of customer issues identified through the Customer Expectation Survey and makes it easy for the CFT to respond with specific data related to issues identified by the customer. For example, if our team has made DfM recommendations that are currently affecting manufacturing, on-time delivery, quality, etc., then this will be tracked in the CFT Tracker through the Paynter charts. If the customer has opted not to adopt the recommendations, but indicates in its monthly survey that defects exceed predefined limits, the CFT can look at the CIT tracker, PPM data and CFT Paynter to determine what percentage of defects relate to the unadopted DfM recommendation. With the Paynter chart, the team can show a weighted analysis of the impact of adopting the proposed changes. Similarly, if the defects relate to an out-of-control process, we would have the data to drive internal improvements. The result: a hyper-focused corrective action tool. Training was conducted at all Epic facilities. In Mexico, training was conducted in Spanish to ensure full understanding among all CFT members. Continued on pg. 29

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The survey process. The Customer Expectation Worksheet was designed as a relatively simple tool. We have defined a series of ratings tied to quality, delivery performance and partnership. Each of the three sections has three-to-four defined performance indicators. Within each performance indicator, respondents rate on a 1 to 5 scale: • 5 – Frequently exceeds requirements (green color code). • 4 – Occasionally exceeds requirements (green). • 3 – Meets requirements (yellow). • 2 – Occasionally does not meet requirements (red). • 1 – Frequently does not meet requirements (red). The CFTs work with their customer to establish a customer-specific metric for each of these defined performance indicators. Customers then rate on the 1 to 5 scale against their predefined performance metrics. Although a rating of 3 indicates requirements are met, it is coded yellow and reported as an opportunity for improvement. Ratings of 1 or 2 are coded red and generate a corrective action requirement, which is tracked at both the CFT and POR level. Each CFT provides a list of key contacts that Epic interacts with on a day-to-day basis. The survey is sent as a web-based choice board form to customer contacts. Requests are rotated among the total list of core contacts so that each contact only gets a request a couple times a year. If there is no response to the initial survey request, up to two reminders are sent out. If the customer contact still doesn’t return a survey, the CFT will touch base to determine the reason why. Also, a more detailed annual Customer Loyalty Survey conducted via email measures: • Overall performance satisfaction compared to

satisfaction with other EMS providers. • Perception of management and key support competencies. • Relationship with project team. • Responsiveness to problems. • Perception of price competitiveness. • Plans for future business allocation. This annual survey is sent to multiple contacts at each customer and includes areas for detailed comments and suggestions for improvement. Survey data are reviewed at the plant and corporate level. Results and lessons learned. When the new survey was deployed in 2008, it consistently generated a 45 to 50% response rate, compared to the prior 20% response rate. In 2009, that has dropped to about 30%, but that percentage typically includes 100% of our largest customers. In determining survey improvements for 2009, one issue has stood out. Customer project teams prefer to do the survey as a group. When individuals are contacted for a survey, they often solicit feedback from other members of the core customer team. If they do not get feedback, they often do not return the form. As a result, a 2009 change to the survey method will be to offer the customer the opportunity to complete surveys from each core customer group, rather than to attempt to rotate between those team members. An additional indicator of the robustness of the process is that we won all five individual service category awards in our revenue size class in Circuits Assembly’s 2009 Service Excellence Awards for EMS providers.  n

PWB Delamination and Measling A thinly plated hole could be susceptible to PTH lead damage.

T

he latest addition to the database is delamination on the surface of a board assembly. A microsection (Figure 1) shows a plated through-hole with a through-hole lead after soldering using a PbSn process. Prior to sectioning, the board had shown evidence of minor delamination and measling around the pad area on the board subsurface. The board was being produced in medium volume for a consumer product. Mechanical strain or damage may occur during pin insertion. The soldering temperature or the time to solder may have been excessive, causing board expansion. The image in Figure 1 is not very clear, but based on the examinacircuitsassembly.com

tion and comparison of the relative dimensions, the plating in the hole is thin, probably less than 20 µm. There is evidence of delamination/ separation of the glass bundles at the hole-copper interface. Close examination of the microsection and the rest of the board will be required for root cause analysis. There are a number of possible causes, and along with the board examination, all the process details would be reviewed, or even the assembly/soldering operation audited. These are typical defects shown in the National Physical Laboratory’s interactive assembly and soldering defects database. The database (http://defectsdatabase.

Getting Lean

The Defects Database

npl.co.uk), available to all Circuits Assembly readers, allows engineers to search and view countless defects and solutions, or to submit defects online. n Dr. Davide Di Maio is with the National Physical Laboratory Industry and Innovation division (npl. co.uk); [email protected].




Figure 1. Lead insertion may cause delamination near thinly plated holes.

Circuits Assembly AUGUST 2009

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Product

SPOTLIGHT SPI/AOI Conveyors Link conveyors for SPI NG/good buffer are designed to stack nogood PCBs and transfer good PCBs to the next process using FIFO. Have RS-232C interface with SPI and NG PCB anti-touch verification. Are said to provide increased line efficiency and require minimal space. No need to filter NG PCBs, and SPI operates normally, even during NG PCB verification. AOI NG Buffer stacks NG PCBs and pushes good PCBs to the next AOI inspection process. Both systems feature PCB shock-free and noncontact power transmission, SMEMA interface, a slim, round design, adjustable stacking, an LED tower light and touch-screen operation. Young Jin/Seika Machinery Inc., seikausa.com

Reusable Stencil Frame ZelFlex Protect is an alternative to glued stencil frames. Stencil foil can be stored as a flat sheet if not in use. Can stay on the stencil to permit safe handling and quick changeover. Changing a stencil is said to take 30 sec. or less. Comes in industry standard form factors and reportedly is compatible with virtually any stencil printer. Outer dimension is 23" x 23" and total thickness is 1". LPKF Laser & Electronics, lpkfusa.com

Flex Circuit Connectors The FH family of ZIF and LIF flexible circuit connectors come in different configurations with contact pitches ranging from 0.3 to 1 mm. Are for flexible printed circuit and flat flex cabletype connections. Certain models feature side-retention tabs. Hirose Electric Co., hiroseusa.com

Pb-Free, Halide-Free Paste Multicore LF700 halide-free solder paste is said to reduce voiding in BGA solder joints, deliver high tack force and offer long printer abandon times of up to 4 hrs., even when printed on 0.4 mm CSP apertures. Is said to be solderable over a range of reflow profiles in both air and nitrogen and effective on several surface finishes, including NiAu, immersion tin, immersion silver and OSP copper.  Henkel, henkel.com/electronics

3-D, 8-Way Projection AOI Zenith has an eight-way projection system said to sense and measure the Z-axis profilometry of entire assembled PCB surfaces, including solder joints, patterns, holes, and components (even with foreign material on them). Combines 3-D measurement with 2-D AOI to reduce escapes, false calls and inspection errors. Is said to eliminate specular problems associated with shiny solder joints, shadowing due to relatively taller components, and object and reference plane shadow problems between the adjacent leads of fine-pitch QFPs. Software inspects to IPC-A-610. Koh Young Technology, kohyoung.com

No-Clean, No-Halogen Solder Paste Alpha CVP-520 solder paste is a Pb-free, no-clean, zero-halogen paste designed for pin-in-through-hole assembly of temperaturesensitive components. Reportedly reflows at peak temperatures of 155° to 190°C. Is said to provide fine feature printing on 0.30 mm circles at speeds up to 100 mm/sec., and in-circuit pin test yield.

Production Planning Tools PanaCIM Enterprise Edition electronics assembly manufacturing execution system software includes nine modules: production analysis, production planning, production monitoring and dispatch, material verification, traceability, material control, product changeover and control, maintenance, and enterprise link. Includes production monitoring and dispatches centralized and real-time data monitoring to identify events such as part exhausts, changeovers and process shifts. Dispatches tasks to the necessary labor resources via email, PDA, or visual display; generates reports for analysis of event history by product, operator and equipment. Panasonic Factory Solutions Co. of America, us.panasonic.com

Ultrasonic Selective Fluxer SelectaFlux Retrofit retrofits into all major selective soldering machines and is said to be compatible with all flux types, including Pb-free. Operates by trigger signal, and has controlled velocity spray. Combines Microspray ultrasonic atomizing nozzle with low air pressure. Spray is restricted through a separately controlled module that handles input and output. Distance between nozzle and substrate can be varied from near contact to approximately 50.8 mm. Sono-Tek, sono-tek.com

Cookson Electronics, alpha.cooksonelectronics.com

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Special Advertising Section

Ad Index ADVERTISER INFO: To learn about the advertisers in this issue, go to circuitsassembly.com and sand select "Current Issue" to access the digital edition. This will provide you with direct links to the home or product pages of each advertiser in this index. Company

Assembly Insider

Page No.

American Hakko Products, www.hakkousa.com. . . . . . . . . . . . . . . 19

"Asahi Chemical & Solder, Inc.", www.asahisolder.com. . . . . . . . . C3

Bare Board Group, www.bareboard.com. . . . . . . . . . . . . . . . . . . . . 31

Compufab Inc., www.compufab.com. . . . . . . . . . . . . . . . . . . . . . . 31

Cookson Electronics, www.cooksonelectronics.com. . . . . . . . . . . . C4

Digi-Key Corp., www.digikey.com . . . . . . . . . . . . . . . . . . . . . . . . . C2

ECD, www.ecd.com. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

EMS Directory, www.circuitsassembly.com/dems. . . . . . . . . . . . . . 23

Imagineering, Inc., www.pcbnet.com. . . . . . . . . . . . . . . . . . . . . . . 2

Get your

daily dose of PCB industry news and views.

Subscribe to PCB UPdate

www.pcbupdate.com The daily e-mail newsletter filled with news and resources for PCB design, fab and assembly professionals

MIRTEC Corp., www.mirtecusa.com. . . . . . . . . . . . . . . . . . . . . . . . . 7

PCB UPdate, www.pcbupdate.com. . . . . . . . . . . . . . . . . . . . . . . 4,31

PCB West, www.pcbwest.com. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Seika Machinery, www.seikausa.com. . . . . . . . . . . . . . . . . . . . . . . 11

SMTA International, www.smta.org/smtai . . . . . . . . . . . . . . . . . . . 25

SMTA International, www.smta.org . . . . . . . . . . . . . . . . . . . . . . . . 32

Stake Out Your Territory

Sunstone Circuits, www.sunstone.com. . . . . . . . . . . . . . . . . . . . . . 1

Valor Computerized Systems, www.valor.com. . . . . . . . . . . . . . . . . 5

Advertising Sales North America/Europe/Asia (except Korea):

UP Media Group, Inc. 2400 Lake Park Drive, Suite 440 Smyrna, GA 300080

K  rista Fabian Sales Manager, (678) 589-8840 email: [email protected]

Asia: Korea: Young Media, 82 2 756 4819 email: [email protected]

circuitsassembly.com

Learn how by calling Krista Fabian today at 678-589-8840.

PRINTED CIRCUIT BOARD STIFFENER Large PCBs require a mechanical stiffener to eliminate warp and bow, also to prevent copper trace damage due to bending, vibration and rough handling. A must for guidance of a PCB into its connector, and for reliable operation afterwards. • Unique aluminum bar shape accepts a screw or rivet anywhere along its length. • Same bar will install on PCB’s with different hole locations. • Eliminates close tolerance requirement between mounting holes. • Can be installed on spacers to clear components, copper traces or wire adds. • Can also function as a Heat Sink or Power/ Ground bus. • Visit our web site for dimensions and specifications.

COMPUFAB INC.

P.O. Box 68, Woodstown, N.J. 08098-0068 ph: (856) 769-9050 • fax: (856) 769-9058 www.compufab.com Circuits Assembly AUGUST 2009

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Technical Abstracts

In Case You Missed It Bare Board Qualification “Qualification of Thin Form Factor PWBs for Handset Assembly” Author: Mumtaz Y. Bora; [email protected]. Abstract: Qualification of thin (less than 0.8 mm) PWBs requires careful evaluation of PWB stackup for warpage, delamination and successful Pb-free reflow and rework. This paper presents qualification testing of thin PWBs for warpage characteristics. X-sectional analysis, shear testing, thermal shock, humidity testing and drop test for long-term reliability. (IPC Apex, March-April 2009) SMT Processing “Lead-Free Process Development with Thick Multilayer PCBA Density in Server Applications” Authors: L. G. Pymento, W.T. Davis, Ben Kim and Surangkana Umpo Abstract: This paper examines the effects of varying surface finishes, temperature-sensitive component limitations, process parameters and resulting interactions that affect solder attach attributes. The study includes characterization of solder joint attributes from a time-zero perspective and extends to accelerated temperature cycling with post-stress characterization. The intent is to document the need to identify design and process options for applications where density and assembly functions extend beyond commercially developed Pb-free solutions. (IPC Apex, MarchApril 2009)

Circuits Assembly

provides abstracts of papers from recent industry conferences and company white papers. With the amount of information increasing, our goal is to provide an added opportunity for readers to keep abreast of technology and business trends.

32

“SMT Process Characterization and Financial Impact” Author: Fan Li; [email protected]. Abstract: A number of the companies study the process capability at the time they evaluate or purchase the equipment, or at the time they design the product to fit the process capability. But process capability changes over time. A process or machine that was once capable may not be capable now. The paper focuses on process capability and process control. It suggests process capability study should be routine, rather than a one-time effort. The paper is based on the practices in our company’s manufacturing environment. For placement, the Cpk measurement was trialed on some of our lines. The measurement machine problem was analyzed and a proper measurement machine that fits the requirement was chosen. The Cpk result and product yield after proper calibration were very encouraging. For printing, a DoE Circuits Assembly AUGUST 2009

was conducted based on a 0.4 mm pitch BGA. The significant factors related to output of paste volume and paste deposit variation were found and an optimum setting combination suggested to production. Process characterization has been proven to have a significant financial impact. (IPC Apex, March-April 2009) Solderability “Comparison of Thermal Fatigue Performance of SAC 105 (Sn-1.0Ag-0.5Cu), Sn-3.5Ag, and SAC 305 (Sn3.0Ag-0.5Cu) BGA Components with SAC 305 Solder Paste” Authors: Gregory Henshall, Jasbir Bath, Sundar Sethuraman, David Geiger, Ahmer Syed, M.J. Lee, Keith Newman, Livia Hu, Dong Hyun Kim, Weidong Xie, Wade Eagar and Jack Waldvogel; greg. [email protected]. Abstract: Many BGA and CSP component suppliers have begun shipment of components with a variety of “second-generation” Pb-free solder ball alloys. Much of the motivation for the alloy changes has been to improve mechanical shock resistance. Several publications have established the improved performance of such second-level BGA/CSP sphere alloys; however, much less has been published regarding the thermal fatigue resistance of components with these new Pbfree ball alloys. As these components and alloys become mainstream, their use in situations where thermal fatigue resistance is critical to product life will become an important consideration. Therefore, understanding thermal fatigue performance for new alloys is necessary. This study compared thermal fatigue performance under accelerated test conditions for three common BGA ball alloys: SAC 105, SnAg3.5, and SAC 305 as a control. Accelerated thermal cycle (ATC) testing was performed using 676 PBGA components with 1.0 mm pitch and electrolytic NiAu finished component pads. These components were assembled to hightemperature rated Cu-OSP-coated printed circuit boards using SAC 305 solder paste, which represents one of the most common assembly practices. ATC testing was performed using IPC-9701A TC1 condition of 0/100°C with 10-min. dwells (nominal); three different failure criteria were used in constructing the Weibull failure curves. The data indicate that SAC 105 has the lowest thermal fatigue resistance among the alloys tested, with SnAg3.5 and SAC 305 having similar and superior performance. Impact of failure criterion on the Weibull curves is also presented. (IPC Apex, March-April 2009) circuitsassembly.com

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