Built In Logic Block Observer [bilbo]

UNIVERSITI TEKNOLOGI MARA

FACULTY OF ELECTRICAL ENGINEERING

IC TESTING (ELE 632) Built In Logic Block Observer (BILBO) AHMAD AZKA B HJ MOHD ZAIN (2006686484) (EEB7FC) Prepare for: En Abdul Karimi

1.0 Introduction The task of determining whether fabricated chips are fully functional is highly complex and will be take much more time, energy and cost. It is know the debugging cost increase by about tenfold from chip level to system level [1]. Therefore the Design for Testability (DFT) is introduced in order to detect faults as early as possible. DFT is a name for design techniques that add certain testability features to the premise of the added features is that they make it easier to develop and apply manufacturing tests for the designed hardware. The purpose of manufacturing tests is to validate that the product hardware contains no defects that could, otherwise, adversely affect the product’s correct functioning. The figure 1 shows how the Built in Self Test (BIST) running in the ICs. Built-in logic block observation (BILBO) has become one of the most widely accepted techniques for self-testing of complex digital ICs. This technique is based on grouping the storage elements of the circuit in the two registers which give this technique its name. A BILBO register has four functional modes: with each of the stages acting as independent registers; as a generator of pseudorandom sequences; as analyzer of multiple-input signatures; and reset of all stages. Now days, an engineer design the BILBO with the various type in order to make it reliability to use. As the number of transistor integrated into a single chip increase, mean that more power dissipated will be produce. BIST is requiring more circuit to be added to the digital ICs to test itself. Most of the engineers face this problem when design the ICs. In order to make the ICs run efficiently and reliability, the low power BILBO must be introduce. Then the problem power dissipated can be eliminated. Low power BILBO will minimized the power consumption during test mode. Another problem that engineer face is the testing time. Each test requires more time to complete and verify the functional of the ICs. This problem can be eliminated by using nonlinear feedback shift register (NFSR) as a TPG. With the advances on analog-digital integrated circuits (ICs), faster and more complex test equipments are needed to meet ever more demanding test specifications. Mixed-signal testers with demanding requirements of speed, precision, memory and noise are very expensive [5]. In order to make multifunctional BIST structure in analog system, Analog BILBO (ABILBO) is introduce. This paper is organized as follows. The section 2 will introduce the literature review of BILBO. Section 3 will explain the methodology of the BILBO architecture. Section 4 will discuss the advantage and disadvantage of the each type. Finally, section 5 concludes the paper.

2.0 Literature review 2.1 General Overview of the BILBO Bilbo is the small part in the BIST technique. BILBO is the combined functionality of D flipflop, pattern generator, response compacter, & scan chain. The figure 2 shows an architecture of the BIST that be added in to the ICs to test itself.

Figure 1: The architecture of BIST BIST require two essential circuit modules which is Pseudo Random Pattern Generator (PRPG) and Output Response Analyzer (ORA) [1]. PRGA is use create the random number to be act as an input to the Circuit Under Test (CUT). The input number called test pattern. The test pattern can generated either by using a PRPG, a weighted test generator, an adaptive test generator [1]. ORA are the circuit to check the test either pass or fail. Both modules can be form by using Linear Feedback Shift Register (LFSR) or Nonlinear Feedback Shift Register [2]. The experiences made with pseudorandom test patterns and multiple-input signature registers stimulated the development of a multifunctional subsystem called Built-In Logic Block Observer (BILBO), which can be used for data transfer and fault detection purposes in complex digital circuits. Each BILBO is composed of a flip-flop register row and some additional gates for shift and feedback operations [3]. Four different functional modes can be selected by setting two control inputs, B1 and B2. Figure 3 shows the basic 4-bit BILBO circuit.

2.2 Type of BILBO

Figure 2: 4-Bit BILBO

2.2.1 Low Power Built In Block Logic Observer (LP-BILBO) BILBO circuit needs to modify in order to make it suitable with the environment. The conventional BILBO is modified by halving the clock frequency for saving the power consumption [4]. In other words, the proposed LP-BILBO focused on the problem of minimizing power consumption for TPG, scan chain and MISR operation modes during testing. The circuit for the LP-BILBO is shown in figure 4.

Figure 3: LP-BILBO Circuit This circuit is different with the conventional BILBO because consist of more control pin. The LP- BILBO is has one selector, one JK-type flip-flop (JKFF), 2 multiplexers, some AND and XOR gates for the purpose of operation modes switching. The operation for the block will be explained in section 3.

2.2.2 Analog Built in Block Observer (ABILBO)

This section wills presents a novel multifunctional test structure called Analog Built-in Block Observer (ABILBO). This structure is based on analog integrators and achieves analog scan, test frequency generation and test response compaction. High fault coverage was obtained by using a discrete switched-capacitor ABILBO for testing a biquad filter. The ABILBO area overhead and performance penalty can be very low if functional and testing circuitries are shared. This is typically the case of high order filters based on a cascade of biquads [5]. Basically, ABILBO is consist of tow analog integrator and some additional circuitry that shown in figure 4.

Figure 4: ABILBO Circuit Features Test Paradigm Building blocks Test mode 1 Test mode 2 Test Mode 3 Test Mode 4

Digital BILBO Pseudorandom Register Scan TPG Signature analyzer Reset Table 1: ABILBO mode operation

Analog BILBO Fault based- Single random Integrator Voltage Follower Sine wave Oscillator Double-integrator Capacitor discharge

2.3 The general operation of BILBO The BILBO is control by the setting input B1 and B2. The first mode (B1=1, B2=1) or MISR mode (ORA), BILBO acts as a latch. The input data D1, D2,.., Dn are simultaneously clocked into the flip-flops and can be read from the Q and Q outputs. The figure 7 shows the latch operation. The dark lines indicate the data patch.

Figure 5: BILBO on mode (B1=1, B2=1) The second mode (B1=0, B2=0) or Scan Mode, BILBO works as a linear shift register. The figure 8 shows the Scan mode. Data are serially clocked into the register through the serial input SI, while the register contents can be simultaneously read at the parallel Q and Q outputs, or can be clocked out through the serial output SO. The shift register feature of BILBO may be utilized both in the normal mode and in a test mode. In the latter mode BILBO may for instance become a part of a scan path.

Figure 6: BILBO on mode (B1=0, B2=0)

In the third mode (B1=1, B2=0) or Normal Mode, BILBO is functionally converted into a multiple-input signature register like that shown in figure 9. In this mode BILBO may be used for performing parallel signature analysis or for issuing pseudorandom sequences. The latter application is achieved by keeping the inputs Dl, D2, ..., Dn on fixed logical values.

Figure 7: BILBO on mode (B1=1, B2=0) The last mode (B1=0, B2=1) is forces a reset on the register or initialization as a shown in figure 10.

Figure 8: BILBO on mode (B1=0, B2=1)

3.0 Methodology 3.1 Low Power Built In Block Logic Observer (LP-BILBO) BILBO circuit is already making a various revolution. Most of the engineers design the BILBO circuit with various techniques. Nowadays, the increasing of the number transistor in ICs design will introduce more power consumption. The power consumption is one of the most important issues especially the testing approaches are used [1]. Power consumption due to test application, therefore, may be even higher than that required in the system mode. The increased power may reduce the life of batteries, cause some reliability problems, and may even damage the circuit under test (CUT) [4]. Therefore the method to reduce the power consumption to be introduce in ICs design [4]. The figure 11 has shown the Low Power BILBO (LP-BILBO) circuit.

The LP-BILBO which modified the conventional BILBO by adding one selector, one JK-type flip-flop (JKFF), 2 multiplexers, some AND and XOR gates for the purpose of operation modes switching. Also, a LPTM is designed to divide the system clock into two separate clocks for reducing the power consumption (dotted lines in Figure 3). The proposed LP-BILBO can successfully work on normal mode (parallel-in parallel-out register) and low-power testing modes (TPG, scan chain, and MISR) for BIST applications.

The operation modes of the proposed LP-BILBO are listed in Table 4 which clearly indicates that the proposed LP-BILBO can be applied in different operation modes during testing by carefully controlling the signals Ch C2, TEST, LS, LM, and DS C1 1 0 0 1

C2 0 1 0 1

TEST 1 0 0 0

LS 0 0 1 0

LM 0 0 0 1

DS 0 0 1 0

Mode Parallel-in parallel-out Register Low Power TPG Low Power Scan Chain Low Power MSR

Table 2: The Operation mode of the LP-BILBO Circuit

The proposed LP-BILBO operates as a low-power TPG (i.e., a LFSR) when signals C1 = TEST = LS = LM = DS — 0 and C2 =1. In the lowpower TPG operation mode, the LPTM (figure 9) divided a system clock (elk) into two independent clocks (clk /2 and clk /2*) for reducing the switching activity. Note that, the two clocks, clk /2 and dk/, are synchronous with the system clock clk and have the same but shifted in time period. That is, the low-power TPG operation mode can effectively decrease the number of transitions on primary inputs at each clock cycle during testing. Thus, the overall switching activities generated in the CUT can also be reduced.

Figure 9: The LPTM block in LP-BILBO

The BILBO requires two tests, and then BILBO will be switch act as LFSR and MISR. The flow diagram is shown in figure 11 Figure 10: The timing diagram for low power TPG

Figure 11: The test flow during test mode

The test flow is shown in figure 13. This is clearly clearl y show that multiple test is needed in order to test the CUT.

Figure 13: The test flow during test mode

3.2 Analog Built in Block Observer (ABILBO) Basically, the ABILBO structure is made up of two analog integrators and some additional circuitry (figure 1). Since integrators have duplicated input stages [3], the operational amplifiers can work as voltage followers and then perform analog scan operations (model). A 360° phase shift is ensured because the first integrator is inverting and the second one is non-inverting. Since the value of the SC resistors in the oscillator is given by R = 1 / fck.Csc, where ф1 and ф2 correspond to the two phases of fcK an oscillation frequency of

Figure 12: The Op-Amp duplicated in ABILBO

fosc = fcK-Csc is obtained. The generation of a new test stimulus in the ABILBO structure is thus achieved by changing the clock frequency, while in the digital BILBO just a new clock cycle is needed. The negative SC resistor r in figure 12 R results in a positive feedback which ensures circuit instability and a faster growth in the amplitude of the oscillations. Voltage limitation preserving signal symmetry is achieved by using a MOS transistor in parallel with the local feedback branch of the first integrator. The reference voltage at the comparator input in figure 1 (V REF) is made equal to analog ground in the ABILBO oscillator mode. The latch at the output of the comparator allows for easy synchronization of the test signal generator with the response measurement circuit (signal sync) [5].

3.3 BILBO with nonlinear feedback shift register Most of the BILBO uses Linear Feedback Shift Register (LSFR) to generate test pattern. The greatest problem with a BILBO register with linear feedback is the initialization process for two of its functional modes. In the test phase, both BILBO registers must start from fixed states. The option of resetting both registers to determine the initial state is not valid because in the BILBO register which is acting as a random number generator the state 00 ... 0 generates itself, giving a zero-length cycle [2]. If the feedback is made through Exclusive-Nor gates, i.e. nonlinear feedback, the state 11 ... 1 is prohibited and if the number of feedback connections is even, the register can generate a sequence of length p = 2 N — 1, 00 . . . 0 being one more state of the cycle. This means that a reset initializes the BILBO register suitably to function as a pseudorandom sequence generator and signature analyzer, avoiding the need to introduce a seed from an external source. Thus, the logic needed to generate a seed in the BILBO is avoided and/or test time is saved, because the seed need not be introduced externally, which results in a possible saving of pins in the ICs

4.0 Discussion The advantage and disadvantage of the BILBO will be explained in this section. As a general, we know that the BILBO has the general advantage such as i) ii) iii)

Testing frequency at the test per clock cycle. Therefore the faster test will can be achieve. Pseudo- exhausted testing, mean that no need for fault simulation. This BILBO can be work well in pipelined application.

But the BILBO still have the general limitation or disadvantage such as i) ii) iii) iv)

Higher area overhead is needed in order to put the BILBO circuit. The BILBO require multiple test session. Another pin needs to be created to control the BILBO operation. Need more time when during the testing due to multiple tests and also delay in combinational logic.

Each types of the BILBO has the own advantage and disadvantage. The following is shown the advantage and disadvantage of the each type of BILBO. 4.1 LP-BILBO Advantage i)

ii)

Like the name of the type, the main objective of LP-BILBO is to minimize the power consumption during test mode. This will save the power of the battery. This can be applying for the mobile phone and notebook. The switching activity and power consumption is good compare to conventional BILBO. The figure 14 has shown the result from simulation.

Disadvantage i) ii)

This type of the BILBO requires another pin to control the operation which is LM, LS, Test, and Ds. LP-BILBO is added much more the circuit to make it functionally.

Figure 14: Switching activity and power consumption simulation of the TPG mode

4.2 ABILBO Advantage i)

This type of BILBO can be use to implemented with analog design. The multifunctional BIST structure is for use in analog system only.

Disadvantage i) ii)

This type of BILBO is limited to analog only. Not faster than digital design testing.

The comparison between ABILBO and LP-BILBO Speed test Power consumption Testing area Circuit Complexity Cost

ABILBO Low High Analog Not complex Low

LP-BILBO High Low Digital Complex High

Table 3: The Comparison between ABILBO and LP-BILBO

The BILBO still can be improving to make it reliability to use for the portable devices. The LPBILBO can use the Cmos technology in order to reduce the power consumption. The nano technology can be adopted to make the devices small but useful. Most of the devices today are portable system. Therefore, the power is main factor to make the devices function. More complex circuit devices will need more BILBO to make CUT. ABILBO is only can use in analog design. Most of the communication will deal with analog signal. Therefore the ABILBO is needed to detect fault in the circuit. The improvement for the ABILBO that can be adopted is making the oscillator running faster. Then, the test time can be reduced. 5.0 Conclusion As the conclusion, all the method is expected to apply in ICs design with successful. The limitation in design IC still cannot be eliminated such as higher area overhead that implemented in IC design. Each type of BILBO has the own advantage and disadvantage. It is depend for an engineer to use which method to implement in their design. However, the LP-BILBO is more advantage due to power consumption. Today all the device is make as a portable. Therefore, the power is the main component to make devices keep running. References [1] Sung-Mo Kang, Yusuf Leblebici, “CMOS Digital Integrated Circuit Analysis and Design”, Mc Graw Hill, 3rd Edition, 2005. [2] Niceto P. Cagigal, Salvador Bracho, “BILBO registers with nonlinear feedback” IEEE PROCEEDINGS, Vol. 134, Pt. G, No. 4, AUGUST 1987 [3] KONEMANN, B., MUCHA, J., and ZW1EHOFF, 'Built-in logic block observation techniques', Proceedings of 1979 Semiconductor Test Conference, Cherry Hill, NJ, USA 25th-27th October 1979, pp. 37-41 [4] Chun-Lung Hsu, Chang-Hsin Cheng, “Low-Power Built-In Logic Block Observer Realization for BIST Applications”, Department of Electrical Engineering, National Dong Hwa University, Hualien, Taiwan, R.O.C. [5] Marcelo Lubaszewski1, Salvador Mir2** and Leandro Pulz, “ABILBO: Analog Built-in Block Observer”, [6] Jaume Segura, Charles F.Hawkins, “How it works, how it fails”, Wiley-Interscience, 2004.