Alu Tested

 ALU

LIBRARY ieee; USE ieee.std_logic_1164.ALL; USE ieee.numeric_std.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; use ieee.std_logic_arith.all; ENTITY alu_1_alu_test_vhd_tb IS END alu_1_alu_test_vhd_tb; ARCHITECTURE behavior OF alu_1_alu_test_vhd_tb IS COMPONENT alu_1 PORT( a : IN std_logic_vector(7 downto 0); b : IN std_logic_vector(7 downto 0); cin : IN std_logic; shift : IN integer range 0 to 2; sel : IN std_logic_vector(3 downto 0); yout : OUT std_logic_vector(7 downto 0); flags : OUT std_logic_vector(4 downto 0); cout : OUT std_logic ); END COMPONENT; SIGNAL a : std_logic_vector(7 downto 0):="00000000"; SIGNAL b : std_logic_vector(7 downto 0):="00000000"; SIGNAL cin : std_logic:='0'; SIGNAL shift : integer range 0 to 2:=0; SIGNAL sel : std_logic_vector(3 downto 0):="0000"; SIGNAL yout : std_logic_vector(7 downto 0); SIGNAL flags : std_logic_vector(4 downto 0):="00000"; SIGNAL cout : std_logic; signal my_out : std_logic_vector(8 downto 0):="000000000"; signal log_out: std_logic_vector(7 downto 0):="00000000"; BEGIN uut: alu_1 PORT MAP( a => a, b => b, cin => cin,

shift => shift, sel => sel, yout => yout, flags => flags, cout => cout ); -- *** Test Bench - User Defined Section *** tb : PROCESS BEGIN wait for 1 ps; for w2 in 0 to 11 loop -- Adder test case start if sel="0000" then for w1 in 0 to 10 loop for q in 0 to 10 loop my_out<= '0' & a + b + cin; wait for 1 ps; assert my_out=not (cout&yout) severity NOTE ; report"Adder is working properly+++++++++++++"; a<= a+1; end loop; b<= b+1; end loop; -- Subtractor test case start elsif sel="0001" then for w1 in 0 to 10 loop for q in 0 to 10 loop my_out<= '0' & a - b - cin; wait for 1 ps; assert my_out=not (cout&yout) severity NOTE ; report"Subtractor is working properly--------------"; a<= a+1; end loop; b<= b+1;

end loop; -- Logical operator and start elsif sel="0010" then for w2 in 0 to 3 loop for q2 in 0 to 3 loop log_out<= a and b; wait for 1 ps; assert log_out = not yout severity NOTE; report"Logical And function working properly+++++++++++"; a<=a+1; end loop; b<=b+1; end loop; -- Logical operator or start elsif sel="0011" then for w2 in 0 to 3 loop for q2 in 0 to 3 loop log_out<= a or b; wait for 1 ps; assert log_out = not yout severity NOTE; report"Logical Or function working properly+++++++++++"; a<=a+1; end loop; b<=b+1; end loop; -- Logical operator not start elsif sel="0100" then for w2 in 0 to 3 loop for q2 in 0 to 3 loop log_out<= not a; wait for 1 ps; assert log_out = not yout severity NOTE; report"Logical Not function working properly+++++++++++"; a<=a+1;

end loop; b<=b+1; end loop; -- Logical operator XOR start elsif sel="0101" then for w2 in 0 to 3 loop for q2 in 0 to 3 loop log_out<= a xor b; wait for 1 ps; assert log_out = not yout severity NOTE; report"Logical Xor function working properly+++++++++++"; a<=a+1; end loop; b<=b+1; end loop;

end if; sel<=sel + 1; wait for 5 ps; end loop; assert now<=250 ps severity FAILURE; END PROCESS; -- *** End Test Bench - User Defined Section *** END;

Simulation result:# Time: 0 ps Iteration: 3 Instance: /alu_1_alu_test_vhd_tb/uut # ** Note: Assertion violation. # Time: 2 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Adder is working properly+++++++++++++ # Time: 2 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # Time: 3 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb

# ** Note: Adder is working properly+++++++++++++ # Time: 3 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # Time: 4 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Adder is working properly+++++++++++++ # Time: 4 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # Time: 5 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Adder is working properly+++++++++++++ # Time: 5 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # Time: 6 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Adder is working properly+++++++++++++ # Time: 6 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # Time: 7 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Adder is working properly+++++++++++++ # Time: 7 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # Time: 8 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Adder is working properly+++++++++++++ # Time: 8 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # Time: 9 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Adder is working properly+++++++++++++ # Time: 9 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # ** Note: Subtractor is working properly-------------# Time: 132 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # Time: 133 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Subtractor is working properly-------------# Time: 133 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # Time: 134 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Subtractor is working properly-------------# Time: 134 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # Time: 135 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Subtractor is working properly-------------# Time: 135 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # ** Note: Logical Not function working properly+++++++++++ # Time: 311 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb

# ** Note: Assertion violation. # Time: 312 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Logical Not function working properly+++++++++++ # Time: 312 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # Time: 313 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Logical Not function working properly+++++++++++ # Time: 313 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # ** Note: Logical Not function working properly+++++++++++ # Time: 315 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation. # Time: 321 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Logical Xor function working properly+++++++++++ # Time: 321 ps Iteration: 0 Instance: /alu_1_alu_test_vhd_tb # ** Note: Assertion violation.