Ad 812

a

Dual, Current Feedback Low Power Op Amp AD812 PIN CONFIGURATION 8-Lead Plastic Mini-DIP and SOIC

FEATURES Two Video Amplifiers in One 8-Lead SOIC Package Optimized for Driving Cables in Video Systems Excellent Video Specifications (RL = 150 ⍀): Gain Flatness 0.1 dB to 40 MHz 0.02% Differential Gain Error 0.02ⴗ Differential Phase Error Low Power Operates on Single +3 V Supply 5.5 mA/Amplifier Max Power Supply Current High Speed 145 MHz Unity Gain Bandwidth (3 dB) 1600 V/␮s Slew Rate Easy to Use 50 mA Output Current Output Swing to 1 V of Rails (150 ⍀ Load)

PRODUCT DESCRIPTION

The AD812 is a low power, single supply, dual video amplifier. Each of the amplifiers have 50 mA of output current and are optimized for driving one back-terminated video load (150 Ω) each. Each amplifier is a current feedback amplifier and features gain flatness of 0.1 dB to 40 MHz while offering differential gain and phase error of 0.02% and 0.02°. This makes the AD812 ideal for professional video electronics such as cameras and video switchers.

–IN1 2

8 V+ 7 OUT2

+

6 –IN2

+IN1 3 +

V–

4

AD812

5 +IN2

The AD812 offers low power of 4.0 mA per amplifier max (VS = +5 V) and can run on a single +3 V power supply. The outputs of each amplifier swing to within one volt of either supply rail to easily accommodate video signals of 1 V p-p. Also, at gains of +2 the AD812 can swing 3 V p-p on a single +5 V power supply. All this is offered in a small 8-lead plastic DIP or 8-lead SOIC package. These features make this dual amplifier ideal for portable and battery powered applications where size and power is critical. The outstanding bandwidth of 145 MHz along with 1600 V/µs of slew rate make the AD812 useful in many general purpose high speed applications where a single +5 V or dual power supplies up to ± 15 V are available. The AD812 is available in the industrial temperature range of –40°C to +85°C.

0.4

0.06

G = +2 RL = 150V

0.3

0.04

0.2 0.1 DIFFERENTIAL PHASE – Degrees

NORMALIZED GAIN – dB

DIFFERENTIAL GAIN

0 –0.1 –0.2 VS = 615V –0.3 65V –0.4 5V –0.5 3V –0.6

100k

1M 10M FREQUENCY – Hz

100M

Figure 1. Fine-Scale Gain Flatness vs. Frequency, Gain = +2, RL = 150 Ω

0.08

0.02

0.06

DIFFERENTIAL GAIN – %

APPLICATIONS Video Line Driver Professional Cameras Video Switchers Special Effects

OUT1 1

DIFFERENTIAL PHASE 0.04

0.02

0 5

6

7

8 9 10 11 12 SUPPLY VOLTAGE – 6Volts

13

14

15

Figure 2. Differential Gain and Phase vs. Supply Voltage, Gain = +2, RL = 150 Ω

REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1998

AD812–SPECIFICATIONS Dual Supply (@ T = +25ⴗC, R = 150 ⍀, unless otherwise noted) A

L

Model DYNAMIC PERFORMANCE –3 dB Bandwidth

Bandwidth for 0.1 dB Flatness

Conditions

VS

Min

G = +2, No Peaking

±5 V ± 15 V ± 15 V ±5 V ± 15 V ±5 V ± 15 V ±5 V ± 15 V

50 75 100 20 25 275 1400

Gain = +1 G = +2

Slew Rate1

G = +2, RL = 1 kΩ 20 V Step G = –1, RL = 1 kΩ

Settling Time to 0.1%

G = –1, RL = 1 kΩ VO = 3 V Step VO = 10 V Step

NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Input Voltage Noise Input Current Noise Differential Gain Error

fC = 1 MHz, RL = 1 kΩ f = 10 kHz f = 10 kHz, +In f = 10 kHz, –In NTSC, G = +2, RL = 150 Ω

Differential Phase Error DC PERFORMANCE Input Offset Voltage TMIN –TMAX Offset Drift –Input Bias Current TMIN –T MAX +Input Bias Current Open-Loop Voltage Gain

Open-Loop Transresistance

INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common Mode Voltage Range Common-Mode Rejection Ratio Input Offset Voltage –Input Current +Input Current Input Offset Voltage –Input Current +Input Current

TMIN –T MAX VO = ± 2.5 V, RL = 150 Ω TMIN –T MAX VO = ± 10 V, RL = 1 kΩ TMIN –T MAX VO = ± 2.5 V, RL = 150 Ω TMIN –T MAX VO = ± 10 V, RL = 1 kΩ TMIN –T MAX

±5 V ± 15 V

50 40

ns ns

± 15 V ± 5 V, ± 15 V ± 5 V, ± 15 V ± 5 V, ± 15 V ±5 V ± 15 V ±5 V ± 15 V

–90 3.5 1.5 18 0.05 0.02 0.07 0.02

dBc nV/√Hz pA/√Hz pA/√Hz % % Degrees Degrees

± 5 V, ± 15 V

2

± 5 V, ± 15 V ± 5 V, ± 15 V

15 7

± 5 V, ± 15 V

0.3

±5 V ± 15 V ±5 V ± 15 V

±5 V

VCM = ± 12 V

± 15 V

–2–

Units MHz MHz MHz MHz MHz V/µs V/µs V/µs V/µs

68 69 76 75 350 270 450 370

0.1 0.06 0.15 0.06 5 12 25 38 1.5 2.0

76 82 550 800

15 65 1.7 4.0 13.5

±5 V ± 15 V VCM = ± 2.5 V

Max

65 100 145 30 40 425 1600 250 600

± 15 V

+Input –Input +Input

AD812A Typ

51

55

58 2 0.07 60 1.5 0.05

mV mV µV/°C µA µA µA µA dB dB dB dB kΩ kΩ kΩ kΩ MΩ Ω pF ±V ±V

3.0 0.15 3.3 0.15

dB µA/V µA/V dB µA/V µA/V

REV. B

AD812 Model OUTPUT CHARACTERISTICS Output Voltage Swing

Conditions

VS

Min

RL = 150 Ω, TMIN –TMAX RL = 1 kΩ, TMIN –TMAX

±5 V ± 15 V ±5 V ± 15 V ± 15 V

3.5 13.6 30 40

Output Resistance MATCHING CHARACTERISTICS Dynamic Crosstalk Gain Flatness Match DC Input offset Voltage –Input Bias Current POWER SUPPLY Operating Range Quiescent Current

Units ±V ±V mA mA mA

± 15 V

15

Ω

G = +2, f = 5 MHz G = +2, f = 40 MHz

± 5 V, ± 15 V ± 15 V

–75 0.1

dB dB

TMIN –TMAX TMIN –TMAX

± 5 V, ± 15 V ± 5 V, ± 15 V

0.5 2

3.6 25

mV µA

Per Amplifier

±5 V ± 15 V ± 15 V

3.5 4.5

± 18 4.0 5.5 6.0

V mA mA mA

0.6 0.05

dB µA/V µA/V

G = +2, RF = 715 Ω VIN = 2 V Open-Loop

TMIN –TMAX Power Supply Rejection Ratio Input Offset Voltage –Input Current +Input Current

Max

3.8 14.0 40 50 100

Output Current Short Circuit Current

AD812A Typ

VS = ± 1.5 V to ± 15 V

± 1.2

70

80 0.3 0.005

NOTES 1 Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain. Specifications subject to change without notice.

Single Supply

(@ TA = +25ⴗC, RL = 150 ⍀, unless otherwise noted)

Model DYNAMIC PERFORMANCE –3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate1 NOISE/HARMONIC PERFORMANCE Input Voltage Noise Input Current Noise Differential Gain Error2 Differential Phase Error 2

REV. B

AD812A Typ

Conditions

VS

Min

G = +2, No Peaking

+5 V +3 V

35 30

50 40

MHz MHz

G = +2

+5 V +3 V +5 V +3 V

13 10

20 18 125 60

MHz MHz V/µs V/µs

3.5 1.5 18 0.07 0.15 0.06 0.15

nV/√Hz pA/√Hz pA/√Hz % % Degrees Degrees

G = +2, RL = 1 kΩ

f = 10 kHz f = 10 kHz, +In f = 10 kHz, –In NTSC, G = +2, RL = 150 Ω G = +1 G = +2 G = +1

–3–

+5 V, +3 V +5 V, +3 V +5 V, +3 V +5 V +3 V +5 V +3 V

Max

Units

AD812–SPECIFICATIONS Single Supply (Continued) Model

Conditions

VS

DC PERFORMANCE Input Offset Voltage

Min

AD812A Typ

+5 V, +3 V

1.5

+5 V, +3 V +5 V, +3 V

7 2

+5 V, +3 V

0.2

TMIN –TMAX Offset Drift –Input Bias Current TMIN –TMAX +Input Bias Current Open-Loop Voltage Gain Open-Loop Transresistance INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common Mode Voltage Range Common-Mode Rejection Ratio Input Offset Voltage –Input Current +Input Current Input Offset Voltage –Input Current +Input Current OUTPUT CHARACTERISTICS Output Voltage Swing p-p

TMIN –TMAX VO = +2.5 V p-p VO = +0.7 V p-p VO = +2.5 V p-p VO = +0.7 V p-p

+5 V +3 V +5 V +3 V

+Input –Input +Input

MATCHING CHARACTERISTICS Dynamic Crosstalk Gain Flatness Match DC Input offset Voltage –Input Bias Current POWER SUPPLY Operating Range Quiescent Current

VCM = 1.25 V to 3.75 V

1.0 1.0

+5 V

52

+3 V

RL = 1 kΩ, TMIN –TMAX RL = 150 Ω, TMIN –TMAX

+5 V +5 V +3 V +5 V +3 V +5 V

G = +2, RF = 715 Ω VIN = 1 V

Units

4.5 7.0

mV mV µV/°C µA µA µA µA dB dB kΩ kΩ

20 30 1.5 2.0

73 70 400 300 15 90 2

+5 V +3 V

VCM = 1 V to 2 V

3.0 2.8 1.0 20 15

4.0 2.0 55 3 0.1 52 3.5 0.1

5.5 0.2

MΩ Ω pF V V dB µA/V µA/V dB µA/V µA/V

3.2 3.1 1.3 30 25 40

V p-p V p-p V p-p mA mA mA

dB dB

G = +2, f = 5 MHz G = +2, f = 20 MHz

+5 V, +3 V +5 V, +3 V

–72 0.1

TMIN –TMAX TMIN –TMAX

+5 V, +3 V +5 V, +3 V

0.5 2

3.5 25

mV µA

Per Amplifier

+5 V +3 V +5 V

3.2 3.0

36 4.0 3.5 4.5

V mA mA mA

0.6 0.05

dB µA/V µA/V

2.4

TMIN –TMAX Power Supply Rejection Ratio Input Offset Voltage –Input Current +Input Current

250

+5 V +5 V

Output Current Short Circuit Current

67

Max

VS = +3 V to +30 V

70

TRANSISTOR COUNT

80 0.3 0.005 56

NOTES 1 Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain. 2 Single supply differential gain and phase are measured with the ac coupled circuit of Figure 53. Specifications subject to change without notice.

–4–

REV. B

AD812 ABSOLUTE MAXIMUM RATINGS 1

MAXIMUM POWER DISSIPATION

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation2 Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Watts Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9 Watts Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 1.2 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range N, R . . . . . . . . . –65°C to +125°C Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C Lead Temperature Range (Soldering, 10 sec) . . . . . . . +300°C

The maximum power that can be safely dissipated by the AD812 is limited by the associated rise in junction temperature. The maximum safe junction temperature for the plastic encapsulated parts is determined by the glass transition temperature of the plastic, about 150°C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175°C for an extended period can result in device failure. While the AD812 is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (150 degrees) is not exceeded under all conditions. To ensure proper operation, it is important to observe the derating curves.

NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-lead plastic package: θJA = 90°C/Watt; 8-lead SOIC package: θJA = 150°C/Watt.

It must also be noted that in high (noninverting) gain configurations (with low values of gain resistor), a high level of input overdrive can result in a large input error current, which may result in a significant power dissipation in the input stage. This power must be included when computing the junction temperature rise due to total internal power.

ORDERING GUIDE

AD812AN –40°C to +85°C AD812AR –40°C to +85°C AD812AR-REEL AD812AR-REEL7

Package Description

Package Option

2.0 MAXIMUM POWER DISSIPATION – Watts

Temperature Range

Model

8-Lead Plastic DIP N-8 8-Lead Plastic SOIC SO-8 13" Reel 7" Reel

METALIZATION PHOTO Dimensions shown in inches and (mm). 0.0783 (1.99) V+ 8

OUT2 7

–IN2 6

TJ = +1508C 8-LEAD MINI-DIP PACKAGE

1.5

1.0 8-LEAD SOIC PACKAGE 0.5

0 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 AMBIENT TEMPERATURE – 8C

5 +IN2

Figure 3. Plot of Maximum Power Dissipation vs. Temperature 0.0539 (1.37)

4 V–

1 OUT1

2 –IN1

3 +IN1

4 V–

CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD812 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

REV. B

–5–

WARNING! ESD SENSITIVE DEVICE

AD812–Typical Performance Characteristics 16

14 TOTAL SUPPLY CURRENT – mA

COMMON-MODE VOLTAGE RANGE – 6Volts

20

15

10

5

0

0

5

10 15 SUPPLY VOLTAGE – 6Volts

VS = 615V 12

10 VS = 65V 8

6

4 –60

20

–40

–20

0

20

40

60

80

100

120

140

JUNCTION TEMPERATURE – 8C

Figure 4. Input Common-Mode Voltage Range vs. Supply Voltage

Figure 7. Total Supply Current vs. Junction Temperature

10

20

TA = +25 C

TOTAL SUPPLY CURRENT – mA

OUTPUT VOLTAGE – V p-p

NO LOAD 15

10 RL = 150V

5

9

8

7

6

5

0

0

5

10 15 SUPPLY VOLTAGE – 6Volts

0

2

4

20

Figure 5. Output Voltage Swing vs. Supply Voltage

10 12 6 8 SUPPLY VOLTAGE – 6Volts

14

16

Figure 8. Total Supply Current vs. Supply Voltage

30

25

615V SUPPLY

20 INPUT BIAS CURRENT – mA

OUTPUT VOLTAGE – Volts p-p

25

20

15

10 65V SUPPLY

15 –IB, VS = 65V

10 5 0

+IB, VS = 65V, 615V

–5 –10 –IB, VS = 615V –15

5

–20

0

10

100 1k LOAD RESISTANCE – V

–25 –60

10k

Figure 6. Output Voltage Swing vs. Load Resistance

–40

–20

0 20 40 60 80 100 JUNCTION TEMPERATURE – 8C

120

140

Figure 9. Input Bias Current vs. Junction Temperature

–6–

REV. B

AD812 70

4 2

60

OUTPUT CURRENT – mA

INPUT OFFSET VOLTAGE – mV

VS = 65V 0 –2 –4 VS = 615V

–6 –8 –10

50

40

30

–12 –14 –16 –60

20 –40

–20

0 20 40 60 80 100 JUNCTION TEMPERATURE – 8C

120

140

Figure 10. Input Offset Voltage vs. Junction Temperature

10 15 SUPPLY VOLTAGE – 6Volts

20

1k CLOSED-LOOP OUTPUT RESISTANCE – V

SHORT CIRCUIT CURRENT – mA

5

Figure 13. Linear Output Current vs. Supply Voltage

160

140

120

100 SOURCE 80

60

–40

–20

0 20 40 60 80 100 JUNCTION TEMPERATURE – 8C

G = +2

100

VS = 615V

SINK

40 –60

0

120

10

1 65VS 0.1 615VS

0.01 10k

140

Figure 11. Short Circuit Current vs. Junction Temperature

100k

1M FREQUENCY – Hz

10M

100M

Figure 14. Closed-Loop Output Resistance vs. Frequency

80

30

70

25 OUTPUT VOLTAGE – V p-p

OUTPUT CURRENT – mA

VS = 615V

60

50 VS = 65V 40 VS = 615V

–40

–20

0

20

40

60

80

100

120

10

0 100k

140

JUNCTION TEMPERATURE – 8C

Figure 12. Linear Output Current vs. Junction Temperature

REV. B

RL = 1kV 15

VS = 65V

5

30

20 –60

20

1M

10M FREQUENCY – Hz

100M

Figure 15. Large Signal Frequency Response

–7–

AD812 100

0 120

VOLTAGE NOISE

NONINVERTING INPUT CURRENT NOISE

100

1k FREQUENCY – Hz

TRANSIMPEDANCE – dB

10

10

CURRENT NOISE – pA/ Hz

VOLTAGE NOISE – nV/ Hz

–90

INVERTING INPUT CURRENT NOISE

1 10

1 100k

10k

–135

100 GAIN

80

100k

1M FREQUENCY – Hz

10M

100M

Figure 19. Open-Loop Transimpedance vs. Frequency (Relative to 1 Ω)

–30

681V VIN

VOUT 681V

70

G = +2 VS = 2V p-p VS = 615V ; RL = 1kV

681V HARMONIC DISTORTION – dBc

80 COMMON-MODE REJECTION – dB

VS = 615V

VS = 3V

40 10k

90

681V 60 50 VS = 615V

40 VS = 3V 30

–50

VS = 65V ; RL = 150V

–70 VS = 65V VS = 615V

2ND HARMONIC

–90

3RD HARMONIC –110

20

2ND

100k

1M FREQUENCY – Hz

10M

3RD

–130

100M

1k

Figure 17. Common-Mode Rejection vs. Frequency

10k

100k 1M FREQUENCY – Hz

10M

100M

Figure 20. Harmonic Distortion vs. Frequency

80

10

70

8 615V

OUTPUT SWING FROM 6V TO 0

POWER SUPPLY REJECTION – dB

–180

VS = 3V

60

Figure 16. Input Current and Voltage Noise vs. Frequency

10 10k

–45

VS = 615V

PHASE

PHASE – Degrees

100

60 50 61.5V 40 30 20

GAIN = –1 VS = 615V

6 4 2 0

1%

0.1%

0.025%

–2 –4 –6

10

–8 0 10k

100k

1M FREQUENCY – Hz

10M

–10 20

100M

Figure 18. Power Supply Rejection vs. Frequency

30

40 SETTLING TIME – ns

50

60

Figure 21. Output Swing and Error vs. Settling Time

–8–

REV. B

AD812 1400

1400

G = +1

VS = 615V RL = 500V

G = +1

1200 1000

1000 SLEW RATE – V/ms

SLEW RATE – V/ms

1200

G = +2 800 G = +10

600 400

G = +2

800 G = +10

600

400

G = –1

G = –1

200

200

0

0 0

1

2

3

4

5

6

7

8

10

9

0

3.0

1.5

Figure 22. Slew Rate vs. Output Step Size

9.0

10.5

12.0

13.5 15.0

20ns

100

90

VIN

90

VIN

10

VOUT

10

VOUT

0%

0%

500mV

2V

Figure 26. Small Signal Pulse Response, Gain = +1, (RF = 750 Ω, RL = 150 Ω, VS = ± 5 V)

Figure 23. Large Signal Pulse Response, Gain = +1, (RF = 750 Ω, RL = 150 Ω, VS = ± 5 V)

65V

1 GAIN

–90 –180

5V –270

0

3V

–1

160

VS = 615V

–2 65V –3

G = +1 RL = 150V

180

–3dB BANDWIDTH – MHz

VS = 615V

0

200

PHASE SHIFT – Degrees

G = +1 RL = 150V

PHASE

CLOSED-LOOP GAIN – dB

7.5

500mV

100

5V

RF = 750V

140

RF = 866V

120 PEAKING

1dB

100 PEAKING

80

0.2dB

60 40

–4

3V

20

–5

0

–6 1

10 100 FREQUENCY – MHz

0

1000

2

4

6

8

10

12

14

16

18

20

SUPPLY VOLTAGE – 6Volts

Figure 24. Closed-Loop Gain and Phase vs. Frequency, G = +1

REV. B

6.0

Figure 25. Maximum Slew Rate vs. Supply Voltage

50ns

2V

4.5

SUPPLY VOLTAGE – 6Volts

OUTPUT STEP SIZE – Vp-p

Figure 27. –3 dB Bandwidth vs. Supply Voltage, G = +1

–9–

AD812 100

100 90

VIN

90

VIN

10

VOUT

10

VOUT

0%

0%

500mV

5V

Figure 28. Large Signal Pulse Response, Gain = +10, (RF = 357 Ω, RL = 500 Ω, VS = ± 15 V)

–90

65V

5V

–180

1 3V

GAIN

–270

0 VS = 615V

–1

PHASE

5V –2 3V –3 –4

65V

–5 –6 1

10 100 FREQUENCY – MHz

1000

Figure 29. Closed-Loop Gain and Phase vs. Frequency, Gain = +10, RL = 150 Ω

100

G = +10 RL = 1kV

VS = 615V

0

65V 3V

–90

5V

1

–180

GAIN 0

–270

–1

–360 5V

–2

PHASE SHIFT – Degrees

0

CLOSED-LOOP GAIN (NORMALIZED) – dB

G = +10 RL = 150V

VS = 615V

Figure 31. Small Signal Pulse Response, Gain = +10, (RF = 357 Ω, RL = 150 Ω, VS = ± 5 V)

PHASE SHIFT – Degrees

CLOSED-LOOP GAIN (NORMALIZED) – dB

PHASE

VS = 615V

3V

–3

65V

–4 –5 –6

1

10 100 FREQUENCY – MHz

1000

Figure 32. Closed-Loop Gain and Phase vs. Frequency, Gain = +10, RL = 1 k Ω

110 G = +10 RL= 150V

90

G = +10 RL = 1kV

100

80

90 –3dB BANDWIDTH – MHz

–3dB BANDWIDTH – MHz

20ns

50mV

50ns

500mV

70 PEAKING

1dB

RF = 357V

60 RF = 154V 50

RF = 649V

40 30 20

RF = 357V

80 70 RF = 154V 60

RF = 649V

50 40 30

10

20

0 0

2

4

6 8 10 12 14 SUPPLY VOLTAGE – 6Volts

16

18

10

20

0

Figure 30. –3 dB Bandwidth vs. Supply Voltage, Gain = +10, RL = 150 Ω

2

4

6 8 10 12 14 SUPPLY VOLTAGE – 6Volts

16

18

20

Figure 33. –3 dB Bandwidth vs. Supply Voltage, Gain = +10, RL = 1 k Ω

–10–

REV. B

AD812 50ns

2V

500mV

100 90

VIN

90

VIN

10

VOUT

10

VOUT

0%

0%

500mV

2V

0 –90

3V

1

–180

GAIN 0

–270

–1 VS = 615V 65V

–4

5V

–5

3V

–6 1

10 100 FREQUENCY – MHz

1000

Figure 35. Closed-Loop Gain and Phase vs. Frequency, Gain = –1, RL = 150 Ω

–90 –180

5V

1 GAIN

3V

–270

0 –1

VS = 615V

–2

65V

–3 5V

–4

3V

–5 –6 1

10 100 FREQUENCY – MHz

1000

100 G = –1 RL = 150V

120

G = –10 RL = 1kV

90 RF = 681V

110

80

PEAKING # 1.0dB 100

–3dB BANDWIDTH – MHz

–3dB BANDWIDTH – MHz

0

Figure 38. Closed-Loop Gain and Phase vs. Frequency, Gain = –10, RL = 1 kΩ

130

RF = 715V

90 80

PEAKING # 0.2dB

70 60 50

RF = 357V

70 60 RF = 154V

RF = 649V

50 40 30 20

40

10 0

2

4

6

8

10

12

14

16

18

0

20

0

SUPPLY VOLTAGE – 6Volts

Figure 36. –3 dB Bandwidth vs. Supply Voltage, Gain = –1, RL = 150 Ω

REV. B

G = –10 RL = 1kV

65V

–2 –3

VS = 615V

PHASE

PHASE SHIFT – Degrees

CLOSED-LOOP GAIN (NORMALIZED) – dB

G = –1 RL = 150V

65V 5V

CLOSED-LOOP GAIN (NORMALIZED) – dB

VS = 615V

PHASE

Figure 37. Small Signal Pulse Response, Gain = –1, (RF = 750 Ω, RL = 150 Ω, VS = ± 5 V)

PHASE SHIFT – Degrees

Figure 34. Large Signal Pulse Response, Gain = –1, (RF = 750 Ω, RL = 150 Ω, VS = ± 5 V)

30

20ns

100

2

4

6 8 10 12 14 SUPPLY VOLTAGE – 6Volts

16

18

20

Figure 39. –3 dB Bandwidth vs. Supply Voltage, Gain = –10, RL = 1 kΩ

–11–

AD812 General Considerations

To estimate the –3 dB bandwidth for closed-loop gains or feedback resistors not listed in the above table, the following two pole model for the AD812 many be used:

The AD812 is a wide bandwidth, dual video amplifier which offers a high level of performance on less than 5.5 mA per amplifier of quiescent supply current. It is designed to offer outstanding performance at closed-loop inverting or noninverting gains of one or greater.

ACL =

Built on a low cost, complementary bipolar process, and achieving bandwidth in excess of 100 MHz, differential gain and phase errors of better than 0.1% and 0.1° (into 150 Ω), and output current greater than 40 mA, the AD812 is an exceptionally efficient video amplifier. Using a conventional current feedback architecture, its high performance is achieved through careful attention to design details.

where:

Choice of Feedback and Gain Resistors

Because it is a current feedback amplifier, the closed-loop bandwidth of the AD812 depends on the value of the feedback resistor. The bandwidth also depends on the supply voltage. In addition, attenuation of the open-loop response when driving load resistors less than about 250 Ω will affect the bandwidth. Table I contains data showing typical bandwidths at different supply voltages for some useful closed-loop gains when driving a load of 150 Ω. (Bandwidths will be about 20% greater for load resistances above a few hundred ohms.)

(

)

Table II. Two-Pole Model Parameters at Various Supply Voltages VS

rIN (⍀)

CT (pF)

f2 (MHz)

± 15 ±5 +5 +3

85 90 105 115

2.5 3.8 4.8 5.5

150 125 105 95

VS (V)

Gain

RF (⍀)

BW (MHz)

± 15

+1 +2 +10 –1 –10

866 715 357 715 357

145 100 65 100 60

where:

+1 +2 +10 –1 –10

750 681 154 715 154

90 65 45 70 45

and:

+1 +2 +10 –1 –10

750 681 154 715 154

60 50 35 50 35

+1 +2 +10 –1 –10

750 681 154 715 154

50 40 30 40 25

+3

)

As discussed in many amplifier and electronics textbooks (such as Roberge’s Operational Amplifiers: Theory and Practice), the –3 dB bandwidth for the 2-pole model can be obtained as:

Table I. –3 dB Bandwidth vs. Closed-Loop Gain and Feedback Resistor (RL = 150 Ω)

+5

(

 RF + GrIN CT   + S RF + GrIN CT + 1 S2  2πf 2   ACL = closed-loop gain G = 1 + RF /RG rIN = input resistance of the inverting input CT = “transcapacitance,” which forms the open-loop dominant pole with the tranresistance RF = feedback resistor RG = gain resistor f2 = frequency of second (nondominant) pole S = 2 πj f

Appropriate values for the model parameters at different supply voltages are listed in Table II. Reasonable approximations for these values at supply voltages not found in the table can be obtained by a simple linear interpolation between those tabulated values which “bracket” the desired condition.

The choice of feedback resistor is not critical unless it is important to maintain the widest, flattest frequency response. The resistors recommended in the table are those (metal film values) that will result in the widest 0.1 dB bandwidth. In those applications where the best control of the bandwidth is desired, 1% metal film resistors are adequate. Wider bandwidths can be attained by reducing the magnitude of the feedback resistor (at the expense of increased peaking), while peaking can be reduced by increasing the magnitude of the feedback resistor.

±5

G

f3 = fN [1 – 2d2 + (2 – 4d2 + 4d4 )1/2]1/2

1/ 2

  f2  fN =   R + Gr  C IN T   F

(

)

d = (1/2) [f2 (RF + GrIN ) CT]1/2 This model will predict –3 dB bandwidth within about 10 to 15% of the correct value when the load is 150 Ω. However, it is not an accurate enough to predict either the phase behavior or the frequency response peaking of the AD812. Printed Circuit Board Layout Guidelines

As with all wideband amplifiers, printed circuit board parasitics can affect the overall closed-loop performance. Most important for controlling the 0.1 dB bandwidth are stray capacitances at the output and inverting input nodes. Increasing the space between signal lines and ground plane will minimize the coupling. Also, signal lines connecting the feedback and gain resistors should be kept short enough that their associated inductance does not cause high frequency gain errors.

–12–

REV. B

AD812 The input and output signal return paths must also be kept from overlapping. Since ground connections are not of perfectly zero impedance, current in one ground return path can produce a voltage drop in another ground return path if they are allowed to overlap.

Power Supply Bypassing

Adequate power supply bypassing can be very important when optimizing the performance of high speed circuits. Inductance in the supply leads can (for example) contribute to resonant circuits that produce peaking in the amplifier’s response. In addition, if large current transients must be delivered to a load, then large (greater than 1 µF) bypass capacitors are required to produce the best settling time and lowest distortion. Although 0.1 µF capacitors may be adequate in some applications, more elaborate bypassing is required in other cases.

Electric field coupling external to (and across) the package can be reduced by arranging for a narrow strip of ground plane to be run between the pins (parallel to the pin rows). Doing this on both sides of the board can reduce the high frequency crosstalk by about 5 dB or 6 dB.

When multiple bypass capacitors are connected in parallel, it is important to be sure that the capacitors themselves do not form resonant circuits. A small (say 5 Ω) resistor may be required in series with one of the capacitors to minimize this possibility.

Driving Capacitive Loads

As discussed below, power supply bypassing can have a significant impact on crosstalk performance. Achieving Low Crosstalk

Measured crosstalk from the output of amplifier 2 to the input of amplifier 1 of the AD812 is shown in Figure 40. The crosstalk from the output of amplifier 1 to the input of amplifier 2 is a few dB better than this due to the additional distance between critical signal nodes.

When used with the appropriate output series resistor, any load capacitance can be driven without peaking or oscillation. In most cases, less than 50 Ω is all that is needed to achieve an extremely flat frequency response. As illustrated in Figure 44, the AD812 can be very attractive for driving largely capacitive loads. In this case, the AD812’s high output short circuit current allows for a 150 V/µs slew rate when driving a 510 pF capacitor. RF

+VS

A carefully laid-out PC board should be able to achieve the level of crosstalk shown in the figure. The most significant contributors to difficulty in achieving low crosstalk are inadequate power supply bypassing, overlapped input and/or output signal paths, and capacitive coupling between critical nodes.

0.1mF

1.0mF RG 8

RS

AD812

The bypass capacitors must be connected to the ground plane at a point close to and between the ground reference points for the two loads. (The bypass of the negative power supply is particularly important in this regard.) There are two amplifiers in the package, and low impedance signal return paths must be provided for each load. (Using a parallel combination of 1 µF, 0.1 µF, and 0.01 µF bypass capacitors will help to achieve optimal crosstalk.)

VIN

4

VO 1.0mF

CL

RL

RT 0.1mF –VS

Figure 41. Circuit for Driving a Capacitive Load

–10

VS = 65V G = +2 RF = 750V RL = 1kV CL = 10pF

–20 RL = 150V –30

12 CLOSED-LOOP GAIN – dB

CROSSTALK – dB

–40 –50 –60 –70 –80 –90

1M

10M

RS = 30V 3 RS = 50V

0 –3

1

100M

FREQUENCY – Hz

10 100 FREQUENCY – MHz

1000

Figure 42. Response to a Small Load Capacitor at ± 5 V

Figure 40. Crosstalk vs. Frequency

REV. B

RS = 0

6

–6

–100 –110 100k

9

–13–

AD812 VS = 615V G = +2 RF = 750V RL = 1kV

100

12

CLOSED-LOOP GAIN – dB

50ns

1V

90

VIN

10

VOUT

9 6 CL = 150pF, RS = 30V 3 0 0%

–3 CL = 510pF, RS = 15V –6

2V

–9 1

10 100 FREQUENCY – MHz

1000

Figure 45. 6 dB Overload Recovery; G = 10, RL = 500 Ω, VS = ± 5 V

Figure 43. Response to Large Load Capacitor, VS = ± 15 V

5V

In the case of high gains with very high levels of input overdrive, a longer recovery time may occur. For example, if the input common-mode voltage range is exceeded in a gain of +10, the recovery time will be on the order of 100 ns. This is primarily due to current overloading of the input stage.

100ns VIN

100 90

As noted in the warning under “Maximum Power Dissipation,” a high level of input overdrive in a high noninverting gain circuit can result in a large current flow in the input stage. For differential input voltages of less than about 1.25 V, this will be internally limited to less than 20 mA (decreasing with supply voltage). For input overdrives which result in higher differential input voltages, power dissipation in the input stage must be considered. It is recommended that external diode clamps be used in cases where the differential input voltage is expected to exceed 1.25 V.

VOUT

10 0%

5V

Figure 44. Pulse Response of Circuit of Figure 41 with CL = 510 pF, RL = 1 kΩ, RF = RG = 715 Ω, RS = 15 Ω

High Performance Video Line Driver

Overload Recovery

There are three important overload conditions to consider. They are due to input common mode voltage overdrive, input current overdrive, and output voltage overdrive. When the amplifier is configured for low closed-loop gains, and its input common-mode voltage range is exceeded, the recovery time will be very fast, typically under 10 ns. When configured for a higher gain, and overloaded at the output, the recovery time will also be short. For example, in a gain of +10, with 6 dB of input overdrive, the recovery time of the AD812 is about 10 ns.

At a gain of +2, the AD812 makes an excellent driver for a backterminated 75 Ω video line. Low differential gain and phase errors and wide 0.1 dB bandwidth can be realized over a wide range of power supply voltage. Outstanding gain and group delay matching are also attainable over the full operating supply voltage range. RG

RF +VS

0.1mF

75V 75V CABLE

8 75V CABLE

VOUT

AD812

VIN

75V

4 75V

0.1mF

–VS

Figure 46. Gain of +2 Video Line Driver (RF = RG from Table I)

–14–

REV. B

G = +2 RL = 150V

0 –90

3V

VS = 615V

5V

1

65V

GAIN CLOSED-LOOP GAIN – dB

–180 –270

0 5V

–1

3V

–2

0.4

0.2

VS = 615V

–3 65V

–4

G = +2 RL = 150V

0.3

NORMALIZED GAIN – dB

90 PHASE

PHASE SHIFT – Degrees

AD812

0.1 0 –0.1 –0.2

VS = 615V

–0.3 65V

–0.4

5V

–5

–0.5 3V –0.6 100k

–6 1

10 100 FREQUENCY –MHz

1000

Figure 47. Closed-Loop Gain and Phase vs. Frequency for the Line Driver

1.0

RF = 590V

G = +2 RL = 150V

110

RL = 150V

VS = 3V

0.6

RF = 750V

PEAKING # 1dB

G = +2

0.8

RF = 715V

100

RF = 681V

90

0.4 GAIN MATCH – dB

–3dB BANDWIDTH – MHz

100M

Figure 50. Fine-Scale Gain Flatness vs. Frequency, Gain = +2, RL = 150 Ω

120

80 NO PEAKING 70 60 50

0.2 0

RF = 715V –0.4

40

–0.6

30

–0.8

0

2

4

6 8 10 12 14 SUPPLY VOLTAGE – 6Volts

16

18

–1.0

20

1

Figure 48. –3 dB Bandwidth vs. Supply Voltage, Gain = +2, RL = 150 Ω

0.02

0.06

1000

DELAY 8 3V

GROUP DELAY – ns

0.04 DIFFERENTIAL GAIN

10 100 FREQUENCY – MHz

Figure 51. Closed-Loop Gain Matching vs. Frequency, Gain = +2, RL = 150 Ω

DIFFERENTIAL GAIN – %

0.06

0.08

VS = 615V

–0.2

20

DIFFERENTIAL PHASE – Degrees

1M 10M FREQUENCY – Hz

DIFFERENTIAL PHASE 0.04

6

5V

4

65V 615V

2 0 DELAY MATCHING 0.4 0.2

VS = 3V TO 615V

0

0.02

–0.2 –0.4 100k

0 5

6

7

8

9

10

11

12

13

14

15

SUPPLY VOLTAGE – 6Volts

10M FREQUENCY – Hz

100M

Figure 52. Group Delay and Group Delay Matching vs. Frequency, G = +2, RL = 150 Ω

Figure 49. Differential Gain and Phase vs. Supply Voltage, Gain = +2, RL = 150 Ω

REV. B

1M

–15–

90

The AD812 will operate with total supply voltages from 36 V down to 2.4 V. With proper biasing (see Figure 53), it can be an outstanding single supply video amplifier. Since the input and output voltage ranges extend to within 1 volt of the supply rails, it will handle a 1.3 V p-p signal on a single 3.3 V supply, or a 3 V p-p signal on a single 5 V supply. The small signal, 0.1 dB bandwidths will exceed 10 MHz in either case, and the large signal bandwidths will exceed 6 MHz.

PHASE

CLOSED-LOOP GAIN – dB

0

–180

–0.5

–270

–1.0 –1.5 –2.0 –2.5 –3.0 –3.5 1

10 100 FREQUENCY – MHz

1000

Figure 54. Closed-Loop Gain and Phase vs. Frequency, Circuit of Figure 53

649V

C3 30mF

–90

GAIN

The capacitively coupled cable driver in Figure 53 will achieve outstanding differential gain and phase errors of 0.07% and 0.06 degrees respectively on a single 5 V supply. Resistor R2, in this circuit, is selected to optimize the differential gain and phase by operating the amplifier in its most linear region. To optimize the circuit for a 3 V supply, a value of 8 kΩ is recommended for R2. 649V

0

VS = 5V 0.5

C1859b–0–9/98

Operation Using a Single Supply

PHASE SHIFT – Degrees

AD812

R3 1kV +VS

C2 1mF

1V R1 9kV

COUT

8

C1 2mF

47mF

75V

75V CABLE

100

VIN

90

VOUT

AD812

VIN

50ns

75V

4 R2 11.8kV

VOUT

Figure 53. Biasing for Single Supply Operation

10 0%

500mV

Figure 55. Pulse Response of the Circuit of Figure 53 with VS = 5 V

OUTLINE DIMENSIONS Dimensions shown in inches and (mm).

8-Lead Plastic SOIC (SO-8)

0.39 (9.91) 8

0.1968 (5.00) 0.1890 (4.80) 5

0.25 (6.35) 1

4

PIN 1 0.165 60.01 (4.19 60.25) 0.125 (3.18) MIN

0.060 (1.52) 0.015 (0.38)

SEATING 0.018 60.003 0.10 0.033 (0.84) PLANE (0.46 +0.08) (2.54) NOM BSC

0.1574 (4.00) 0.1497 (3.80)

0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93)

PIN 1 0.0098 (0.25) 0.0040 (0.10)

0.015 (0.381) 0.008 (0.204)

8

5

1

4

0.2440 (6.20) 0.2284 (5.80)

0.0688 (1.75) 0.0532 (1.35)

0.0500 0.0192 (0.49) SEATING (1.27) 0.0098 (0.25) PLANE BSC 0.0138 (0.35) 0.0075 (0.19)

–16–

0.0196 (0.50) 3 458 0.0099 (0.25)

88 08 0.0500 (1.27) 0.0160 (0.41)

REV. B

PRINTED IN U.S.A.

8-Lead Plastic DIP (N-8)