8086 Lab Expt-1.docx

EXPERIMENT NO. 1 To Study Addressing Modes of 16 bit Microprocessor 8086/8088.

Definition: The way of specifying data source in an instruction is known as addressing mode of that instruction. List of addressing modes: 1. Immediate addressing mode. 2. Direct addressing mode. 3. Register addressing mode. 4. Register indirect addressing mode. 5. Based addressing mode. 6. Relative based addressing mode. 7. Indexed addressing mode. 8. Relative Indexed addressing mode. 9. Based Indexed addressing mode. 10. Relative Based Indexed addressing mode. 11. Intra-segment direct addressing mode. 12. Intra-segment indirect addressing mode. 13. Inter-segment direct addressing mode. 14. Inter-segment indirect addressing mode.

1) Immediate addressing mode. In this case data 8 bit or 16 bit is specified in an instruction itself. Examples: MOV AL, 8AH MOV BX, 2546H Result: (AL) = 8AH (BX) = 2546H; (BH) = 25H & (BL) = 46H 2) Direct addressing mode. In this case data present in memory (in data segment) and the offset address of memory location within the segment is specified in an instruction itself. Examples: MOV AX, [0400H] MOV CL, [0320H] Result: Assuming (DS) = 0700H For first Instruction: P.A. = 07000H + 0400H = 07400H = 0700:0400H Hence, (AL) = [0700:0400H] and (AH) = [0700:0401] For second Instruction: P.A. = 07000H + 0320H = 07320H = 0700:0320H Hence, (CL) = [0700:0320H]

3) Register addressing mode. In this case data transfer or manipulation takes place between two registers only. Source and destination both are registers. Examples: 1) MOV AX, BX 2) MOV BL, AL Result: Initially (BX) = 1234H; (AX) = 4321H After 1st instruction execution: (BX) = 4321H; (AX) = 4321H After 2nd instruction execution: (BL) = 21H; (AL) = 21H 4) Register indirect addressing mode. In this case data present in memory (segment) and the offset address of memory location within the segment is specified in offset registers like BX, SI, DI and BP. Examples:

1) MOV AX, [BX] 2) MOV CX, [SI] 3) MOV DX, [DI] 4) MOV AX, [BP] NOTE: In first three instruction segment register by default DS is used, where as in fourth instruction by default SS is used. Assuming (DS) = (SS) = 0700H MOV BX, 0200H ; (BX) = 0200H MOV SI, 0220H ; (SI) = 0220H MOV DI, 0230H ; (DI) = 0230H MOV BP, 0250H ; (BP) = 0250H Result: 1st Instruction: PA= 0700: 0200H Hence (AX) = [0700: 0200H] and [0700: 0201H] 2nd Instruction: PA= 0700: 0220H Hence (CX) = [0700: 0220H] and [0700: 0221H] 3rd Instruction: PA= 0700: 0230H Hence (DX) = [0700: 0230H] and [0700: 0231H] 4th Instruction: PA= 0700: 0250H Hence (AX) = [0700: 0250H] and [0700: 0251H] 5) Based addressing mode. In this case data present in memory (data segment or stack segment) and the offset address of memory location within the segment is specified in offset registers like BX or BP. Examples: MOV AX, [BX] MOV AX, [BP] MOV [BX], AX MOV [BP], AX NOTE: In first and third instruction segment register by default DS is used, where as in second and fourth instruction by default SS is used. Assuming (DS) = (SS) = 0700H; (BX) = 0200H and (BP) = 0250H; Result: 1st Instruction: PA= 0700: 0200H Hence (AX) = [0700: 0200H] and [0700: 0201H] 2nd Instruction: PA= 0700: 0250H Hence (AX) = [0700: 0250H] and [0700: 0251H] 3rd Instruction: PA= 0700: 0200H Hence [0700: 0200H] = (AL) and [0700: 0201H] = (AH) 3rd Instruction: PA= 0700: 0250H Hence [0700: 0250H] = (AL) and [0700: 0251H] = (AH)

6) Relative based addressing mode. In this case data present in memory (data segment or stack segment) and the offset address of memory location within the segment is given by sum of content of offset registers like BX or BP and the 8/16 bit displacement. Example: MOV AX, [BX + 5] or MOV AX, 5[BX] Note: if (DS) = 0700H and (BX) =0200H P.A. = 07000H + 0200H + 5H = 07205H = 0700:0205H Result: (AX) = [0700: 0205H] and [0700: 0206H] Example: MOV AX, [BX + 0100H] or MOV AX, 100[BX] P.A. = 07000H + 0200H + 0100H = 07300H = 0700:0300H Result: (AX) = [0700: 0300H] and [0700: 0301H] 7) Indexed addressing mode. In this case data present in memory (data segment) and the offset address of memory location within the segment is specified in offset registers like SI or DI. Example:

MOV CX, [SI] MOV DX, [DI] MOV [SI], AX MOV [DI], BX Segment register by default DS is used, Assuming (DS) = 0700H and MOV SI, 0220H ; (SI) = 0220H MOV DI, 0230H ; (DI) = 0230H PA = 0700:0220H for 1st & 3rd instructions. PA = 0700:0230H for 2nd & 4th instructions. Result: 1st Instruction: PA= 0700: 0220H Hence (CX) = [0700: 0220H] and [0700: 0221H] 2nd Instruction: PA= 0700: 0230H Hence (DX) = [0700: 0230H] and [0700: 0231H] 3rd Instruction: PA= 0700: 0220H Hence [0700: 0220H] and [0700: 0221H] = (AX) 3rd Instruction: PA= 0700: 0230H Hence [0700: 0230H] and [0700: 0231H] = (BX) 8) Relative Indexed addressing mode. In this case data present in memory (data segment) and the offset address of memory location within the segment is given by sum of content of offset registers like SI or DI and the 8/16 bit displacement. Example: MOV AX, [SI + 5] or MOV AX, 5[SI] Note: if (DS) = 0700H and (SI) =0200H; (DI) = 0220H P.A. = 07000H + 0200H + 5H = 07205H = 0700:0205H Result: (AX) = [0700: 0205H] and [0700: 0206H] Example: MOV AX, [DI + 0100H] or MOV AX, 100[DI] P.A. = 07000H + 0220H + 0100H = 07320H = 0700:0320H Result: (AX) = [0700: 0320H] and [0700: 0321H]

9) Based Indexed addressing mode. In this case data present in memory (data segment or stack segment) and the offset address of memory location within the segment is given by sum of content of offset registers like BX & SI or BX & DI or BP & SI or BP & DI. Note that whenever BP is present in an instruction as an offset register, the stack segment by default used as memory segment. Otherwise data segment is used. Examples: MOV AX, [BX] [SI] OR MOV AX, [BX+SI] MOV AX, [BP] [DI] OR MOV AX, [BP+DI] MOV [BX] [SI], AX OR MOV [BX+SI], AX MOV [BP] [DI], AX OR MOV [BP+DI], AX NOTE: In first and third instruction segment register by default DS is used, where as in second and fourth instruction by default SS is used. Assuming (DS) = (SS) = 0700H Result: Assuming (BX) = 0200H; (BP) = 0210H; (SI) = 0020H and (DI) = 0030H 1st Instruction: PA= 0700: 0200H+0020H = 0700:0220H Hence (AX) = [0700: 0220H] and [0700: 0221H] 2nd Instruction: PA= 0700:0210H+0030H = 0700:0240H Hence (AX) = [0700: 0240H] and [0700: 0241H] 3rd Instruction: PA= 0700: 0200H+0020H = 0700:0220H Hence [0700: 0220H] and [0700: 0221H] = (AX) 3rd Instruction: PA= 0700:0210H+0030H = 0700:0240H Hence [0700: 0240H] and [0700: 0241H] = (AX) 10) Relative Based Indexed addressing mode. In this case data present in memory (data segment or stack segment) and the offset address of memory location within the segment is given by sum of content of offset registers like BX & SI plus 8/16 bit displacement or BX & DI plus 8/16 bit displacement or BP & SI plus 8/16 bit displacement or BP & DI plus 8/16 bit displacement. Examples: MOV AX, 5[BX] [SI] MOV AX, 100[BP] [DI]

OR OR

MOV AX, [BX+SI+5] MOV AX, [BP+DI+100]

NOTE: In first instruction segment register by default DS is used, where as in second instruction by default SS is used. Assuming (DS) = (SS) = 0700H Result: Assuming (BX) = 0200H; (BP) = 0210H; (SI) = 0020H and (DI) = 0030H 1st Instruction: PA= 0700: 0200H+0020H+5 = 0700:0225H Hence (AX) = [0700: 0225H] and [0700: 0226H] 2nd Instruction: PA= 0700:0210H+0030H+0100H = 0700:0340H Hence (AX) = [0700: 0340H] and [0700: 0341H] 11) Intra-segment direct addressing mode. This is branching type addressing mode used to transfer program control to branching address within the segment only. Here effective address is given by sum of 8/16 bit displacement and the current content of (IP). Example: a) JNZ Label; Label = 8 bit relative address. b) JMP SHORT Label; label = 8 bit signed operand. c) JMP NEAR PTR label; Label = 16 bit signed operand.

12) Intra-segment indirect addressing mode. This is branching type addressing mode used to transfer program control to branching address within the segment only. Here effective address is the content of any register or memory location that is accessed using any of the register indirect addressing modes. The content of (IP) is replaced with effective branch address. Example: a) JMP AX; b) JMP BX c) JMP NEAR PTR [SI] d) JMP NEAR PTR [BX+SI] 13) Inter-segment direct addressing mode. This is branching type addressing mode used to transfer program control to branching address from one code segment to another code segment only. Here content of IP and CS both is replaced with new address given by instruction. Example: a) JMP FAR PTR Label 14) Inter-segment indirect addressing mode. This is branching type addressing mode used to transfer program control to branching address from one code segment to another code segment only. Here content of IP and CS both is replaced with content of two consecutive words in memory which are accessed using any one of the data related indirect addressing mode. Example: a) JMP FAR PTR [SI] b) JMP FAR PTR [SI+BX]

NOTE: Circular bracket (Register) indicate content of register and square bracket [Memory address] indicate content of memory location.