8051 Micro Controller

  • November 2019
  • PDF

This document was uploaded by user and they confirmed that they have the permission to share it. If you are author or own the copyright of this book, please report to us by using this DMCA report form. Report DMCA


Overview

Download & View 8051 Micro Controller as PDF for free.

More details

  • Words: 727
  • Pages: 9
8051 Microcontroller

The 8051 Microcontroller Architecture

        



8051µc is a 8bit microcontroller introduced by Intel Corporation in 1981 which comes in 40 pin dual inline package (DIP). It has 4KB of inbuilt ROM i.e onchip program space. It has 128bytes of inbuilt RAM space and if required external memory of 64KB can be interfaced to the microcontroller. There are 4 parallel 8bit ports namely port 0, port 1, port 2 and port 3 which are addressable as well as programmable. It has an onchip crystal oscillator with crystal frequency 11.0592MHz (~12MHz). It has full duplex serial I/O port having two pins namely TxD, RxD. It has two 16bit timers namely Timer 0 and Timer 1 which can be used either as timer for internal operation or as counter for external operation. It has five interrupt sources. All of them are maskable as well as vector interrupts. They are External Interrupt 0, Timer Interrupt 0, External Interrupt 1, Timer Interrupt 1, Serial Port Interrupt. The programming mode of this microcontroller consists of general purpose registers (GPRs), Special Purpose Registers (SPRs) and Special Function Registers (SFRs). The instruction set of 8051 µc consists of more number of bit manipulations or boolean variable manipulation group of instructions. The instructions are very much useful to manipulate SFR bits and also port pins.

1

8051 Microcontroller

Register and Internal RAM organization



8051 µc provides two 8bit general purpose registers – A (Accumulatr) and B.



It provides 4 special purpose registers – 16bit Program Counter (PC), 8bit Stack Pointer (SP), 16bit Data Pointer and 8bit Program Status Word (PSW).



It also provides few Special Function Registers. They are TMOD, TCON, IE, IP, SBUF, SCON, PCON.



The 128bytes onchip RAM of 8051 µc is divided into three portions as given below. o

00H – 1FH : These 32bytes are arranged as 4 register banks namely Bank 0, Bank 1, Bank 2, Bank 3 where each bank consists of 8 registers namely R0 through R7.

2

8051 Microcontroller o

20H – 2FH : These 16bytes (128bits) are made available as bit-addressible.bytes.

o

30H – 7FH : These 80 bytes are available as scratch-pad RAM bytes.

Pin diagram

Power Supply pins 8051 µc works with +5V DC source applied to Vcc and 0V to Gnd input pin. It has an onchip crystal clock generator. As such it must be supported externally by connecting a crystal across crystal input XTAL1, XTAL2. It has active hign reset input pin. As such the controller is said to be reset upon application of active hign pulse. I/O port pins A total number of 32 I/O pins are provided as port pins divided into 4 ports – port 0, port 1, port 2 and port 3. All ports are both byte and bit addressable. All ports are programmable. All the ports act as simple input/output ports. All the ports except port 1 offer alternate functions. They are as follows. Port 0 and Port 2: If input pin is grounded then port 0 acts as lower order 8bit address data bus where as port 2 acts as higher order 8 bit address bus. Port 3: Each and every pin in this port offer some separate functionality irrespective of level at input pin. Pin P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6

Special Function RxD (Serial Input pin) TxD (Serial Output pin) (Interrupt 0 input pin) (Interrupt 1 input pin) (Timer 0 input if timer is counter) (Timer 1 input if timer is counter) (RAM write control signal output)

3

8051 Microcontroller P3.7

(RAM read control signal output)

4

8051 Microcontroller

External Access Control pins (External Access): If is connected to +5V then the microcontroller fetches code from internal or inbuilt program memory. If it is cnneected to 0V then the microcontroller fetches code from external program memory. (Address Latch Enable): It is an active high output pin. It is used for demultiplexing the address and data by connecting to the G pin of the 74LS373 chip. (Program Store Enable) This is an output pin. For opcode fetch operation, microcontroller asserts output pin as low which can be used for selecting the external program memory chip. This can also be used as ROM read control signal.

5

8051 Microcontroller Instruction Set

6

8051 Microcontroller

7

8051 Microcontroller

8

8051 Microcontroller

9

Related Documents