74159-mt----vlsi Architecture & Design Methodologies

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Code No: 74159/MT M.Tech. – I Semester Supplementary Examinations, September, 2008 VLSI ARCHITECTURE & DESIGN METHODOLOGIES (Electronics & Communications) Time: 3hours

Max. Marks:60 Answer any FIVE questions All questions carry equal marks ---

1.a) b)

Discuss the impact of VLSI on computer architecture. Give an account of VLSI design methodologies.

2.a)

Discuss various hazards associated with pipe lined DLX architecture. Discuss briefly the sensor circuits associated with VLSI memories.

b) 3.a) b)

Explain the centralized shared memory architectures. Discuss various interconnect topologies in detail.

4.a) b)

Draw the domino CMOS AND-OR gate and explain the same. Write short notes on charge sharing.

5.a) b)

Discuss the device dependent topologies in the context of FPGAs. Explain various sources of power dissipation in VLSI circuits.

6.a) b)

Discuss various limits associated with low power VLSI design. Discuss the architectural level optimizations for low power.

7.a)

Explain power sensitivity method to estimate minimum and maximum average power. Explain the concept energy recovery circuit design in detail.

b) 8.

Write short notes on the following: a) VLSI architectures tailor made to robotic applications b) Bit slice approach.

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