T400xw01 V7 Bn07-00650a T-con

R06 R07

0402 0402 0402

DS1406A

MD43_NPTH 0402 0402 VIN

DS1406A ZD02

Inverse circuit 1206

0402

MLVFN5 MLVFP5 MLVBN0 MLVBP0 MLVBN1 MLVBP1 MLVBN2 MLVBP2

MLVFN3 MLVFP3 MLVFN4 MLVFP4 MLVFN5 MLVFP5 MLVBN0 MLVBP0 MLVBN1 MLVBP1 MLVBN2 MLVBP2 MLVBN4 MLVBP4 MLVBN5 MLVBP5

MLVBN3 MLVBP3 MLVBN4 MLVBP4 MLVBN5 MLVBP5

R08 DS2114A

0402

GH5

GND

C01 C02

0603 0805

MD45_NPTH

GND

AVDD COMF2 VCOM2 VGHC VGL V3D3

XPOL_OUT XSTB_OUT AVDD COMF2 VCOM2 VGHC VGL V3D3 YOE1_OUT YCLK_OUT YDIOU_OUT

XPOL_OUT XSTB_OUT

RES3 RES2 RES1

MLVBN3 MLVBP3

VGMA14 VGMA13

VGMA12 VGMA11 VGMA10

VGMA9 VGMA8 VGMA7 VGMA6

VGMA5 VGMA4 VGMA3

VGMA2 VGMA1

J02

VGMA14 VGMA13

MLVFN4 MLVFP4

MLVBCLKN MLVBCLKP

MLVFN3 MLVFP3

3

VGMA12 VGMA11 VGMA10

MLVFN2 MLVFP2

VGMA14 VGMA13

X-Front VGMA9 VGMA8 VGMA7 VGMA6

B

F01 VIN_B

Close to TCON

0402

D02 R11 AVDD

2

GND

R09

VGHC

C06 V12

LVDS_SDA LVDS_SCL AGMODE

RxINP0 RxINN0

RxINP1 RxINN1

RxINP2 RxINN2

RxCLKP RxCLKN

1

1 1

1 1

1 1

1 1 1 1

RxINP3 RxINN3

RxCLKP RxCLKN

RxINP2 RxINN2

RxINP1 RxINN1 RxINP0 RxINN0

1

1

LVDS

VIN

1

AGMODE

LVDS_SCL 1

LVDS_SDA 1

LVDS_WP 1

GND

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

VIN_12V

RxINN0

RxINP0

RxINN1

RxINP1

RXINN2

RXINP2

RxCLKN

RxCLKP

RxINN3

RxINP3

LVDS_IN

AGMODE

EX_SCL

EX_SDA

EX_WP

GND

3

VGL

GH4

V3D3

LVDS

VGMA[1..14]

R05

0402

AVDD

ZD01

V1D8

RxINP0 RxINN0

RxINP1 RxINN1

RxINP2 RxINN2

RxINP3 RxINN3

AUO-11401

YV1C

AGMODE

RxINP3 RxINN3

4

VGMA5 VGMA4 VGMA3

VGMA2 VGMA1

MLVFN1 MLVFP1 MLVBCLKN MLVBCLKP

MLVFN2 MLVFP2

MLVFN0 MLVFP0 MLVFCLKN MLVFCLKP

MLVFN1 MLVFP1 MLVFCLKN MLVFCLKP

MLVFN0 MLVFP0

RES1 RES2 RES3

VGMA12 VGMA11 VGMA10

VGMA9 VGMA8 VGMA7 VGMA6

VGMA5 VGMA4 VGMA3

VGMA2 VGMA1

4

RxCLKP RxCLKN

LVDS_WP LVDS

VIN

J1

V3D3

R04

0402

MLVBCLKP MLVBCLKN

TCON AGMODEN

MD40_NPTH

LVDSORD

LVDS_SCL

DC/DC & VCOM

LVDSORD

R03

AGMODEN

0402

RxINN[0..3]

0402

RxINN[0..3]

0402

0402

MLVBN[0..5]

C

R02

MLVBP[0..5]

C08

MLVBP[0..5]

DC-DC

R01

MLVBN[0..5]

GH7

RxINP[0..3]

C07

R10

RxINP[0..3]

SOT416GSD

MLVFCLKP MLVFCLKN

GH9

XPOL_OUT XSTB_OUT

AVDD

VCOM2

VGHC

VGL

V3D3

YDIOU_OUT YCLK_OUT YOE1_OUT

5

XPOL_OUT XSTB_OUT

YDIOU_OUT YCLK_OUT YOE1_OUT

A

80

RxCLKN

MD45_NPTH LVDS_SDA

Gamma

RxCLKN

GH8 Q01

RxCLKP

MD43_NPTH MD40_NPTH

RxCLKP

MD40_NPTH GH6

EXSCL

GH3

EXSDA

MD40_NPTH 1

EXSCL

80

EXSDA

VG1

MLVFN[0..5]

J02

MLVFP[0..5]

1 G10 G9 G8 G7 G6 G5 G4 G3 G2 G1 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

Sketch Map

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 G1 G2

MLVFP[0..5]

GH2 LVDS_WP

D

D

J01

MLVFN[0..5]

S

1

1

1

XSTB_OUT XPOL_OUT

YOE1_OUT YCLK_OUT YDIOU_OUT

1

1

MD40_NPTH

EXWP

1

1 GH1

EXWP

1

1 1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 G1 G2

1

5 2 1

LVDS Option:H(3.3V),NC(OPEN) --> NS, THun L(GND) --> JEIDA

J03 VG22

AGMODEN Option: L(0V),NC(OPEN) --> Normal H(3.3V) --> Enter Aging Mode VIN D

R13 VDD_V3D3

B01

LS1206A

V12

D01

DS1406A

0603

R12

0603 V1D8

G YV1C

Gamma C

COMF2

VGMA[1..14]

VCOM2

B

A

J03

X-Back Model Name

Size D

T400XW01 V7_CTRB(EC02)

Document Number

Date: 1

T400XW01 V7

Tuesday, September 30, 2008 Sheet 1 of 4

Rev EC02

3

2

PAD

4

PAD

5

Vo1

SWA L101

S

AVDD_1

D

AVDD

AVDD

AVDD_F

R108

AVDD

G

D101

16V

1

R107

1 V12

V12

1

Q101 D

D

C103

C105 C109 C104

C101

C110

C108

C102

C106

R102 C107 R106

R101 R103

C101, C102, put closed to L101

R104

R127

R109 1

FB

SS

COMP

GD

28

V3D3

GND

VGHM

VFLK

VGH

R128

4

2

R105

VGHM

R110

1

R117

R126

C138 Soft Start AVDD: 22nF typically

GD

C139 Delay for VGH: delay time between Vbuck and VGH

C138 3

4

PAD

27V

27

C111

Vo1

VGHC

U103

PAD

2

3

OS

DLY2

SW

DLY1

26

AVDD_1

VGH C113

C112

SW

5

R122

1

C140 Delay for VGL: delay time between Vbuck and VGL

25

AVDD_1 SW

REF

PGND

GND

PGND

AVIN

SUP

VINB

24

C139

REF C141

VGHC 6

VGH A

23 C140

DRP

J

C142

K 7

C125 R121

D104

AVDD_1 C124

SUP

R123

C

8

21

V12

C

C128

C129

PAD

-6V

R118

Vo1 R125

Vo1

9

V12

EN2

VINB

DRP

NC

DRN

SWB

C143, C144, put closed to U101 pin20/21

20

R124

1

C126

22

10

VGL VGL FBP

19 C143

C144

TI-65161PWPR part No. is changed to SN0703052PWPR for AUO

A

R141

J

11

K R119

18

C133 D105 C134

R142 C136 C135

REF

BOOT

17

I

C114 R146

13

EN1

FBP

FBB

16

Vin

R115

V12

Vout

1.8V V1D8

O R116

V1D8

V1D8

G

REF

FBN

U102 14

15 C120

GND 1

U101

PAD

G1

R144

G1

R120

FREQ

R145

R143

1

12

V12

C137

PAD

8

RE

GND

7

CD

VDPM

PAD

C127 YV1C

VD

1

6

1

5

V3D3_F L102

C116

R114

C118

C122 C123

3.3V V3D3

V3D3_F

C115

C121

V3D3

V3D3

C119

D102 R111 C117 B

B

R112

R113

AUO Confidential

A

A

NEW

Model Name Size D Date: 5

4

3

2

T400XW01 V7

Document Number

Rev 02

T400XW01 V7_CTRB(EC02) Tuesday, September 30, 2008 1

Sheet

2

of

4

5

4

3

2

1

VGMA_REF PAD

R253

VGMA[1..14]

B201 AVDD_Gamma

0603

1

VGMA_REF=2.5(1+10K/2.62K)=12.042

LS0603A

AVDD

VGMA_REF

AVDD

AVDD

R285 R254 C202 0603

REF_F1

C227 0402

REF_B2

R262

REF_F2

REF2 0603 C206

0603

C228

REF_F2

1

PAD

1

15.20V 0402 0603

VGMA3

REF_B6

R266

Connect to GammaOP_Input

PAD

0603

1210

R205 R235

REF_B7

R268 C234 1

GammaOP_Out

0603

1

REF_F7

1

REF_F8

1

PAD 10.57V

R206

PAD

R236 VCOMG

VCOM2

R291

VCOM2

0603

0603

REF7

0603 0603 C211

1206 C256 VGMA5

REF_F6 C210

1

0402

REF6

0603

PAD

VGMA4

C255

C254

V1 & V22 => L255. V2 & V21 => L254. V3 & V20 => L253 V4 & V19 => L224 V5 & V18 => L192 V6 & V17 => L128. V7 & V16 => L64 V8 & V15 => L32 V9 & V14 => L2 V10 & V13 => L1. V11 & V12 => L0.

PAD 10.19V

R207

REF_B8

R269

R237

C235 1

0603 0402

PAD

0603

C262

1206

REF8

0603 0603 C212

1206

PAD 9.91V

0603 0603

0603 R292

COMF2

0603 REF_B1

REF_F1

R209

R239

0603

0603

REF_F2 VGMA6

REF_B10

R270

C263

C236

REF10 REF_F10

C261

1

C214

PAD

C

1

8.30V R210

0402 PAD

R240 0603

0603

1

REF_F6 REF_F7 REF_F8 REF_F10

PAD

0402 REF_B2 REF_B6 REF_B7 REF_B8 REF_B10 REF_B11

0603

C257

REF_B12

REF_B12 REF_B13 REF_B14 REF_B16

Mo Lo Ko Jo Io Ho VSS VDD Go Fo Eo Do

0603

REF_B12

R272

1 2 3 4 5 6 7 8 9 10 11 12

48 47 46 45 44 43 42 41 40 39 38 37

U202 G1 G1

Li Ki Ji Ii Hi VSS VDD Gi Fi Ei Di Ci

36 35 34 33 32 31 30 29 28 27 26 25

PAD

REF11

8.09V

R287

R211

0603

0603

R288

R241

0603

0603

C260

0603

REF_F12 REF_F13 REF_F15 REF_F16 REF_F17

REF_F12

REF_F13 REF_F15 REF_F16 REF_F17

REF_B12 REF_F12

1 C216

PAD

REF12

1

6.58V R212

PAD

0603 AVDD_Gamma

R242 REF13

0603

0603

REF_F13

REF_B13

R273

1 C215

1

C217

PAD 6.32V

1

C239

REF_F11

REF_F11

0402

0603

0603 0603

REF_B11

0603

REF_F6 REF_F7 REF_F8 REF_F10 REF_F11

13 14 15 16 17 18 19 20 21 22 23 24

C238

No Vcomo VSS VDD VSS VDD N.C. N.C. N.C. Vcomi Ni Mi

C237

VGMA8

0603

0603

REF_B11 REF_B11

R271

Co N.C. VDD N.C. N.C. Bo VSS Ao VSS VDD Ai Bi

VGMA7

VGAMA12

R257

0603

C253

0603

VCOM2

VGMA9

0603

R258

0603

0603

VGAMA11

R256

R290

0603

VGAMA10

D

PAD

PAD

1

COMF2 0402

VGAMA8

1

0603

C232

C

R

R259

1

R289

VGAMA7

VZ_REF REF

AVDD_Gamma 0603 COMF2

VGAMA6

GND

0603

U201

PAD VGAMA2

C201

C203 0805

ANODE

0603

GND

C

15.36V

0603

0603

R255

REF1

A

VGAMA1

C205

PAD

R231

PAD VGMA2

1

R201

1

D

C204

0603

REF_B1

REF_B1

R261

CATH

REF_F1

REF_B1 VGMA1

1210

VGMA[1..14]

0603 R286

0402

VGAMA13

C259

C258

PAD

B

0603

B

0603 R214

0603

0603

R244 REF15

0603

REF_B17

REF_F15

0603

1

C219

REF_F21

REF_B21

PAD 4.70V

R215

REF_F22

REF_B22 VGMA10

REF_B15

R274

R245

C240 1

0603

REF_F16

1

C220

PAD VGAMA15

REF16

0603 0603

0402

PAD 4.40V

R216

0603

R246 0603

REF17

0603 REF_F17

0603 VGMA11

REF_B16

R275

1

C221

PAD 4.10V

1

C241 PAD

0402

VGAMA16

0603 0603

VGMA12

R283

REF_B17

R277 C243 1

0603

PAD

0402

VGAMA17

R284

0603 R220

0603

R250 0603 REF_F21 VGMA13

C225 R221

1

PAD 0.44V

A

0603

PAD 1

1

R251

0402 REF_B22

VGMA14 VGAMA21

REF_F21

REF_B21

R281 C247

0603

REF_B22

R282 0603 C248

REF_F22

REF_F22

0603 C226

1

REF_B22

PAD

REF_F22

0.3247V R222

0402 PAD

A

REF21

0603

0603

0603

VGAMA22

R252

0603

0603

Model Name Size D Date:

5

4

3

2

T400XW01 V7

Document Number

Rev 02

T400XW01 V7_CTRB(EC02) Tuesday, September 30, 2008 1

Sheet

3

of

4

5

4

3

R319

Closed to the PIN 65 of

2

1

VDD_V1D8

U301

VDD_V1D8P 0603 C333

C332

C331

0603

1206

1206

D

D

0603

0402

VDD_V3D3 C303

C304

0603

0805

U301

VDD_V3D3

VDD_V3D3

C305

C306

VDD_V3D3

0603

0402

C307

C308

C330

0402

0805

XPOL_OUT

4

3

4

3 YV1C

PWM

V3D3

V3D3

C302

VDD_V3D3

GND

GND

C301

Closed to the PIN 88 of

YOE1_OUT

YDIOU_OUT

YCLK_OUT

XSTB_OUT

XPOL_OUT

MLVFP[0..5]

MLVFN[0..5]

MLVFP[0..5]

MLVFN[0..5]

MLVFCLKP FCKP

MLVFCLKN FCKN

1

R321 0603

2

BCKP

MLVBCLKP

BCKN

1

MLVBP[0..5]

2

MLVBP[0..5]

MLVBN[0..5] MLVBN[0..5]

R322 0603

VDD_V3D3

B301 LS0603A10

1

YV1C

PAD

PWM

V1D8

V1D8

MLVBCLKN

V3D3

0603

Closed to the PIN 13 of

U301

Closed to the PIN 35 of

MLVFN5

U301

MLVFP5 MLVBP0

MLVFN4

1

MLVBN0

MLVFP4 MLVBP1

MLVFN3

MLVBP2

MLVFN2

MLVBN1

1

MLVFP3

1 MLVFP2

PFCAP

MBCKN MBCKP

VDD_V1D8 VDD_V3D3 GND

MFCKN MFCKP

MLVBN2

1 1

PAD PAD PAD PAD PAD

XPOL_1

VDD_V3D3 VDD_V3D3

XSTB_1 C309

C310

0603

0402

YDIOD_1 YDIOU_1 YCLK_1 YOE_1

Closed to the PIN58 of

U301

MLVBCLKN MLVBCLKP MLVB2N MLVB2P GND VDDM MLVB1N MLVB1P MLVB0N MLVB0P VDDP18 PFCAP MLVF5N MLVF5P MLVF4N MLVF4P GND VDDM MLVF3N MLVF3P MLVFCLKN MLVFCLKP MLVF2N MLVF2P GND

75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

1

PAD

MLVBP3

76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

MLVBN3 MLVBP4 MLVBN4 MLVBP5 MLVBN5 YV1C PWM

R320

VSEL

0402 GAMEN ODEN

MLVB3P MLVB3N VDDM GND MLVB4P MLVB4N MLVB5P MLVB5N VDDIO GND YV1C PWM VDDIO GND TEST GND VDDIO VSEL VDDC18 GND GND VDDIO GAMEN ODEN GND

VDD_V3D3

For setting pin pull high or pull low, please use 4.7k ohm resister

R304 G1

G1

V1D8 0402

VDDM MLVF1N MLVF1P MLVF0N MLVF0P PI GND VDDIO XPOL XSTB YDIOD YDIOU YCLK YOE GND VDDIO GND VDDC18 GND VDDIO GND XOUT XIN INSDA INSCL

U301 AUO 11401 K2

50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26

0402 R316

C327

0402

0402

VDD_V1D8

B302 LS0603A10

C311

VDD_V1D8

C312

C313

C314

0402

0603

0805

MLVFN1 MLVFP1 MLVFN0 MLVFP0 R318

PI

C326 0603

R315

Closed to the PIN 94 of

0402 XPOL_T XSTB_T YDIOD_T YDIOU_T YCLK_T YOE_T

0402

0402 R314

C325

0402 R313

0402

U301

C324 VDD_V1D8

VDD_V1D8 VDD_V1D8

0402

0402

C315

XOUT XIN INSDA INSCL

0603

R311 U303

0402

C316

0402

Closed to the PIN 23 of

1

4

2

3

VDD_V1D8 C317

0603

U301

C318

0402

Closed to the PIN 33 of

U301

R312

0402

C322

C323 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

0402

0402

U301

R303

0402 0402

EXSCL EXSDA

RxINN3 RxINP3

C321

RxINN2 RxINP2

0603

RxINN0 RxINP0 RxINN1 RxINP1

R301

0603

B

EPWP LVDSORD AGMODEN

R302

RESET

VDD_V3D3

C

C328 R317

VDDIO NRSET UDSEL LUTSEL CHGFB LVDSORD AGBSEN GND RXIN0N RXIN0P RXIN1N RXIN1P VDDL RXIN2N RXIN2P RXCLKN RXCLKP RXIN3N RXIN3P GND EXSCL EXSDA VDDC18 GND EPWP

C

B

0603

R307

R308

R309

0402

0402

0402

1

VDD_V3D3

1 1

D301 GAVCC_E

1

PAD PAD PAD PAD

INSDA INSCL WP VCC

R310 DS1005A

1 C329 2 0402

3

0603 PAD

1

2EGND

EXWP EXSCL EXSDA A

Vcc

A1

WP

A2

SCL

GND

SDA

Closed to the

U302

7 6 5

U302

U302

RxINP[0..3] RxINP[0..3]

RxCLKN RxCLKP RxCLKN RxCLKP

LVDSORD AGMODEN RxINN[0..3]

LVDSORD AGMODEN RxINN[0..3]

Closed to the

4

A0

8

R323

R305

R306

0402

0402

0402

R324

0402 8 7 6 5

VCC WP SCL SDA

A0 A1 A2 GND

1 2 3 4

U304

A

Model Name Size D Date: 5

4

3

2

T400XW01 V7

Document Number

Rev 02

T400XW01 V7_CTRB(EC02) Tuesday, September 30, 2008 1

Sheet

4

of

4