Substrate Noise Meiasurement By Using Noise-selective Voltage

IEEE Instrumentation and Measurement Technology Conference Minnesota, USA, May 18-21, 1998

Substrate Noise Meiasurement by using Noise-selective Voltage Comparators in Analog and Digital Mixed-signal Integrated Circuits Keiko Makie-Fukuda, Takanobu Anbo* and Toshiro Tsukada Semiconductor Technology Dev. C:tr., Semiconductor 8, Integrated Circuits Div., Hitachi Ltd., Tokyo Japan *Hitachi ULSl Engineering Corporation, Tokyo, Japan Phone +81-423-23-1111 Fax +81-423-27-7766 Emaikkeiko-f @crl.hitachi.co.jp Abstract In mixed-signal ICs, substrate noise produced by high-speed digital circuits passes to the on-chip analog circuits through the substrate and seriously affects their performance. In this paper, we discuss how the substrate noise can be measured by using noise-selective chopper-type voltage comparators as noise detectors to detect the wide-band substrate noise so as to analyze and further reduce its effect. A switched capacitor is selectively loaded to the inverter amplifier of the comparator during the comparison period to redulce the noise detection at the transition from compare to auto-zero. The noise at the transition from auto-zero to compare can be selectively detected. Waveforms of the lhigh frequency substrate noise were reconstructed by this on-chip noise detector incorporating the noise-selective comparators implemented using a 0.5-pm CMOS bulk process. 1. INTRODUCTION Sensitive analog circuits are often designed to share a chip with large-scale digital circuits for multimedia applications. In these mixed-signal ICs, the substrate noise produced by high-speed digital circuits passes to on-chip analog circuits through the substrate and seriously affects the analog circuits' performance [l]. Various ways of measuring, reducing and estimating substrate noise have been proposed [1]-[3]. Of particular concern is the switching noise produced by digital switching circuits, which has high frequency components of over 100 MHz that affect the performance of high-speed switching circuits such as an a Io g - t o - d ig it a I conve rt e rs (ADC s) . The ref o re, improved detection of the wide-band substrate noise is needed so as to analyze and further reduce its effect. A chopper-type voltage comparator [4], which is widely used for ADCs, has a wide bandwidth and high sensitivity. It also has simple circuit configurations, so it is useful for on-chip substrate noise measurement. The chopper-type voltage comparator can detect the substrate noise at the transition frorn auto-zero to the compare mode ( T l ) and at the transition from compare to the auto-zero mode (T2) [3][5]. The substrate noise at T1 and T2 are mixed and detected during one cycle

of the comparator operation. In our previous work, the substrate noise could be detected at only one transition (T1 or T2) by controlling the clock duty ratio for the comparator, to reconstruct the substrate noise waveforms [3]. However, in actual mixed-signal ICs, the noise produced by the various digital circuits that use different timing is coupled to the substrate. So a method to detect the substrate noise without controlling the clock duty is needed. In this paper, we propose a method of selective substrate noise detection that uses modified choppertype voltage comparators. The circuit configuration and the simulated performance of noise-selective choppertype voltage comparators are described in Section 2. The measurement system and the experimental results are described in Sections 3 and 4.

2. NOISE-SELECTIVE COMPARATOR A. Circuit Configuration A noise-selective chopper-type voltage comparator is shown in Fig. 1. A switched capacitor Cc is selectively loaded at the output of the first-stage inverter amplifier Voutl of the comparator. The gain of the first-stage inverter amplifier is large, so the substrate noise is mainly detected from the substrate node of its NMOS transistor (Trl) [5]. When Cc is loaded during the comparison period (the auto-zero period), the noise at T2 is reduced and the noise at T1 can be selectively detected (or vice versa). We analyzed the effect of selective noise detection by using the equivalent circuit model of the first-stage inverter amplifier as shown in Fig. 2. The detected voltage at T1 (Vns(T1)) and that at T2 (Vns(T2)) is transferred to Voutl. The transfer function, defined as the ratio of Voutl to Vns, is expressed as follows:

Vwtl = -gmbRo -Asub Vns(T2) 1+jw (Cc+Co) . Ro 1+jw (Cc+Co) . RO'

(2)

where A (=gmRo) is the dc gain of the inverter amplifier and Asub (=gmbRo) is the dc gain of the body effect. From Eqs. (1) and (2),the cutoff frequency during the

auto-zero period (fAz) and that during the comparison period (fcM) are expressed as follows:

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(3) B. Circuit Simulation We used a SPICE circuit simulation to examine the 1 fCM = operation of the noise-selective comparator. In the (4) 271 . (CC+CO). RO' Usually, A is much larger than Cl'/Cc, so the bandwidth following simulations, the substrate noise was input into of the auto-zero period is much wider than that of the the substrate bias node of T r l and the transferred comparison period. Thus, T i is preferable for noise substrate noise was observed at Vouti. First, the transferred substrate noise dependence detection. Further, when Cc is loaded during the on Cc and Ws was simulated (Fig. 3). Cc was loaded comparison period, the ratio of the cutoff frequency at during the comparison period. The transferred T1 to that at T2 is expressed as follows: substrate noise was reduced with the increase of Cc. It fAZ - (1+A) . (CC+CO) -_ (5) was further reduced with the increase of the gate width. fCM cl'+Co ' The noise during the comparison period is further When Ws was 12 pm and Cc was 0.6 pF, the substrate reduced and the ratio of f A z to fcM becomes much noise during the comparison period was less than -25 larger. Thus, the noise detected at T2 can be dB at 300 MHz. Next, the transferred substrate noise dependence suppressed by loading Cc during the comparison on the frequency was simulated (Fig. 4). When Cc was period and selectively detecting the noise at T1. The substrate noise transfer function also depends loaded during the comparison period, the substrate on the resistance value Rs of the switch SW3. With Rs, noise detected at T2 was suppressed to less than -20 the noise transfer function in Eq. (2) is approximately dB at 100 MHz and above, while the substrate noise detected at T1 was only slightly suppressed up to 500 expressed as follows: MHz. This simulation result shows that T1 is most vml -Asub .( 1 +jo Cc . Rs) ~(6) effective for detecting high-frequency substrate noise, Vns(T2) 1+jw Cc . Ro ' With the increase of Cc and the decrease of Rs, the and that detection can be further enhanced by loading bandwidth of the T2 detection is narrowed. Rs is Cc during the comparison period to suppress the highproportional to the gate's length-to-width ratio (LsNvs). frequency noise detected at T2. When Ls is constant, Ws can be made wider to decrease Rs when designing noise-selective m -15 0 comparators. .-%

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3. MEASUREMENT SYSTEM We measured the substrate noise with a noisedetection circuit composed of eight-channel noiseselective comparators implemented using a 0.5-pm CMOS bulk-process. Substrate noise was input into the substrate through a heavily doped p-type diffusion guard band on a p-type substrate. PI block diagram of the measuring system is shown in Fig. 5. We separately supplied 3-V analog and digital supply voltages to the analog and digital circuits. The comparator clock, substrate noise, and logic analyzer reference signal were controlled by the 10-MHz referlence of the signal generator. A reference voltage V2 of 1 V and input voltages V11 to V18 of 0.98 V to 1.04 V with IO-mV The steps were supplied to the comparators. comparators output a digital High level when the input voltage was higher than the reference voltage. When the noise was applied to the substrate, the input voltage needed to change the output from Low to High was shifted. Thus, the Substrate noise can be determined as the equivalent input noise voltage of the comparator at the transition of the comparator's output. We measured the substrate noise with either the full eight-channel comparators or with just one of the channels. The comparator outputs were detected by the logic analyzer and the sampled substrate noise value was determined. When using the one-channel comparator, a statistical measurement was applied to detect the transition point with high resolution [3]. By shifting the phase of the comparator or by changing its pulse width by a very small amount At (0.1 1 ns), the substrate noise waveforms could be equivalently reconstructed.

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4.MEASURED RESULTS First, we evaluated the effectiveness of the noiseselective comparator by controlling the comparator pulse width as shown in Fig. 6(a). A 180-MHz 700-mV sinusoidal wave was input into the sulbstrate. When the frequency of the substrate noise was an even multiple of the comparator clock frequency, the comparator detected the same phase of the substrate noise at T I and at T2. When the pulse width of the comparison period was changed by a very small At, the sampling point of T2 varied with At, while t h e sampling point of TI

was not changed. Thus, the noise waveform can be reconstructed through T2 detection while the noise detected at T I is used as an offset value. Similarly, when the pulse width of the auto-zero period is changed, the noise waveform can be reconstructed through T I detection. The measured substrate noise is shown in Fig. 6(b). Without Cc, substrate noise of 70 mV at T1 and 20 mV at T2 was observed. The bandwidth during the auto-zero period was wider than that during the comparison period, so the amplitude of the noise detected at T1 was greater than that at T2. When Cc is loaded during the comparison period, the noise detected at T2 was further suppressed. These results demonstrate the effectiveness of loading Cc during the comparison period to suppress the noise detection at T2. Next, we evaluated the effectiveness of the noiseselective comparator by using a rectangular wave (Fig. 7(a)). A -900-mV rectangular wave with a rising and falling edge of 3 ns and a pulse width 10 ns was input into the substrate. The pulse width of the comparator clock was 50 percent constant and it was delayed by At to equivalently sample the substrate noise waveforms. The statistical measurement method based on the onechannel comparator [3] was used to achieve high accuracy. The measured substrate noise is shown in Fig. 7(b). Without Cc, substrate noise was detected at both T1 and at T2. The noise detected at T1 was sharper than that at T2 because the bandwidth of the T I detection was wider than that of the T2 detection. When Cc was loaded during the comparison period, the noise detected at T2 was suppressed and noise was only detected at T1. This shows that the noiseselective comparator can be used to detect highfrequency substrate noise. Next, we measured sinusoidal substrate noise at 100 MHz, 160 MHz and 200 MHz (Fig. 8(b)). Without Cc, the substrate noise detected at T1 (black circles in Fig. 8(a)) and at T2 (hatched circles in Fig. 8(a)) were added, so the amplitude was degraded. With Cc during the comparison period, the substrate noise detected at T2 was suppressed and larger amplitude substrate noise waveforms were reconstructed. These measured results show that the noise-selective comparator is useful for detecting the high-frequency substrate noise caused by the digital circuits activated with various timings. Using more channels of the noiseselective comparators, though, would allow the substrate noise to be measured more accurately. 5. CONCLUSION We have proposed the use of noise-selective chopper-type voltage comparators to monitor highspeed digital noise coupling through the substrate. A switched capacitor is loaded at the output of the firststage inverter of the comparator. This suppresses the noise detection during the comparison period and selectively detects the substrate noise at the transition from the auto-zero to the compare mode. Substrate noise waveforms were reconstructed by a 3-bit noise

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detection circuit composed of the eight-channel noiseselective comparators. This method enables detection of the high-speed substrate noise produced by digital circuits switching with various timings. It is also effective for use in digital signal processing, for example, for substrate noise correction. REFERENCES [ l ] J. A. Olmstead and S. Vulih, "Noise problems in mixed analog-digital integrated circuits," IEEE CICC, pp. 659-662, 1987. Substrate noise (180 MHz, '0° mv) auto-zero

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[2] D. K. Su, M. J. Loinaz, S. Masui, and B. A. Wooley, "Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits," IEEE JSSC, vol. 28, no. 4, pp. 420-430, April 1993. [3] K. Makie-Fukuda, T. Anbo, T. Tsukada, T. Matsuura and M. Hotta, "Voltage-comparator-based measurement of equivalently sampled substrate noise waveform in mixed-signal integrated circuits," IEEE JSSC, vol. 31, no. 5, pp. 726-731, May 1996. [4] A. G. F. Dingwall, "Monolithic expandable 6 bit 20 MHz CMOS/SOS N D converter," IEEE JSSC, vol. 14, no. 6, pp. 926-932, Dec. 1979. [5] K. Makie-Fukuda, T. Anbo, and T. Tsukada, "Measurement of substrate noise in CMOS integrated circuits by using chopper-type voltage comparators," IEiCE c-2, vol. J80-c-2, no. 11, pp. 384-390, November 1997 (in Japanese).

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Fig. 7 Evaluation of the noise-selective voltage comparator with pulse delay control: (a) measurement conditions and (b) results.

Fig. 6 Evaluation of the noise-selectivevoltage comparator with pulse width control: (a) measurement conditions and (b) results.

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