Substrate Effects In Smart-power Ics

Substrate Effects in Smart-Power ICs

Paul Pfäffli

SUBSAFE Project Partners: • Robert BOSCH GmbH • ETH Zurich • ISE AG Zurich

ISE Integrated Systems Engineering

1 This work was supported by the European Commission and the Swiss Federal Office for Education and Science.

Outline

◆ Introduction ◆ Transient 3D Device Simulation ◆ Protection Measures ◆ Conclusion

P. Pfäffli, ISE Integrated Systems Engineering

2

Introduction ◆ The H-Bridge Chip (Smart Power) ◆ Electron and Hole Injection ◆ Topology Reduction ◆ The Testchip ◆ The Mesh ◆ Device Simulation: DESSIS

P. Pfäffli, ISE Integrated Systems Engineering

3

The H-Bridge

low side

high side barrier control logic

Schematic Circuit of H-Bridge

Layout of H-Bridge Chip

P. Pfäffli, ISE Integrated Systems Engineering

4

Electron and Hole Injection into the Substrate

P. Pfäffli, ISE Integrated Systems Engineering

5

Topology Reduction 4000µm

e-

Topology Reduction

P. Pfäffli, ISE Integrated Systems Engineering

6

The Testchip Substrate contacts

barrier

nwell

high side PLDMOS low side NLDMOS

backside contact

barrier nwell

Silicon block: 3500 x 3500 x 375

P. Pfäffli, ISE Integrated Systems Engineering

7

The Mesh

102 277 vertices P. Pfäffli, ISE Integrated Systems Engineering

8

Device Simulation: DESSIS

P. Pfäffli, ISE Integrated Systems Engineering

9

Transient 3D Mixed-Mode Simulation ◆ ◆ ◆ ◆

Principle of Mixed Mode Simulation Electron and Hole Injection Reverse Recovery Movie of the Electron and Hole Distribution

P. Pfäffli, ISE Integrated Systems Engineering

10

Principle of Mixed Mode Simulation Vdd

0

Out 1

Out 2 20mH

10Ω

0

0 P. Pfäffli, ISE Integrated Systems Engineering

11

Electron and Hole Injection

h+

P. Pfäffli, ISE Integrated Systems Engineering

e-

12

Reverse Recovery

P. Pfäffli, ISE Integrated Systems Engineering

13

Potential Distribution (Movie)

P. Pfäffli, ISE Integrated Systems Engineering

14

Protective Measures ◆ 2D Transient Simulations of H-Bridge ■ ■

■

2D Geometry Electron Injection: Influence of Lifetime, Collector N-well, Backside, Substrate Contacts Electron and Hole Injection: Pictures of Electron- and Hole Currents for different Substrate Contacts

◆ 3D Transient Simulations ■

■ ■

3D Simulation of Electron Injection on Testchip: Influence of an additional Barrier, 2 Movies 3D Geometry of H-Bridge Transient 3D Simulation of Electron and Hole Injection for different Substrate Contacts, 2 Movies

P. Pfäffli, ISE Integrated Systems Engineering

15

2D Geometry of H-Bridge

substrate contact low side

e

high side

h

logic nwell p-substrate

Backside Schottky Contact P. Pfäffli, ISE Integrated Systems Engineering

16

Electron Injection: Electron Lifetime default (tau_e=1e-5s)

tau_e=1e-6s

P. Pfäffli, ISE Integrated Systems Engineering

17

Electron Injection: Collector Nwell and Backside Collector Nwell at 14V

without backside contact

P. Pfäffli, ISE Integrated Systems Engineering

18

Electron Injection: Substrate Contacts Substrate contact at low-side

Substrate contact at logic n-well

P. Pfäffli, ISE Integrated Systems Engineering

19

Electron Injection: ‘Logic-Nwell’ Currents

P. Pfäffli, ISE Integrated Systems Engineering

20

Electron and Hole Injection: Electron Current default

Substrate contact at logic n-well

Substrate contact at low-side

ohmic Backside Contact

P. Pfäffli, ISE Integrated Systems Engineering

21

Electron and Hole Injection: Hole Current default

Substrate contact at logic n-well

Substrate contact at low-side

ohmic Backside Contact

P. Pfäffli, ISE Integrated Systems Engineering

22

Electron and Hole Injection: Electrostatic Potential default

Substrate contact at logic n-well

Substrate contact at low-side

ohmic Backside Contact

P. Pfäffli, ISE Integrated Systems Engineering

23

Electron and Hole Injection: ‘Logic-Nwell’ Currents

P. Pfäffli, ISE Integrated Systems Engineering

24

Electron Injection

e-

P. Pfäffli, ISE Integrated Systems Engineering

25

Electron Injection: Movie

P. Pfäffli, ISE Integrated Systems Engineering

26

Influence of a Barrier

e-

P. Pfäffli, ISE Integrated Systems Engineering

27

Influence of a Barrier: Movie

P. Pfäffli, ISE Integrated Systems Engineering

28

3D Geometry of H-Bridge B4 B3 B5

H2

nwell

H1

L2

L1 B2 B1 P. Pfäffli, ISE Integrated Systems Engineering

Backside Schottky 29

H-Bridge: All Substrate Contacts

h+

e-

P. Pfäffli, ISE Integrated Systems Engineering

30

H-Bridge: Without Barrier B1

h+

e-

P. Pfäffli, ISE Integrated Systems Engineering

31

H-Bridge: Without Barrier B2

h+

e-

P. Pfäffli, ISE Integrated Systems Engineering

32

H-Bridge: Without B2 Movie

P. Pfäffli, ISE Integrated Systems Engineering

33

H-Bridge: Without Barrier B4

h+

e-

P. Pfäffli, ISE Integrated Systems Engineering

34

H-Bridge: Backside ohmic, without B1,B2,B3

h+

e-

P. Pfäffli, ISE Integrated Systems Engineering

35

H-Bridge: Backside ohmic - Movie

P. Pfäffli, ISE Integrated Systems Engineering

36

H-Bridge: ‘Logic Nwell’ Currents

P. Pfäffli, ISE Integrated Systems Engineering

37

Summary ◆ Inductive loads lead to electron and hole injection into the substrate of the H-Bridge. ◆ Device simulations with DESSIS allows the calculation of the static and transient minority and majority distribution in the substrate of the full chip. ◆ Substrate contacts at the power stages are very effective barriers. ◆ Substrate contacts at the sensitive logic n- wells are not effective. They can attract electrons and can lead to higher n-well currents. ◆ An ohmic backside contact (instead of a Schottky contact) is also an effective measure against substrate currents. P. Pfäffli, ISE Integrated Systems Engineering

38