Loop gain measurement is done by breaking the loop at an appropriate location and injecting a variable frequency signal at one point and measuring the gain and phase difference at the output. Since the error amplifier has a very large dc gain, it is not practical to measure the gain of the same. However the error amplifier is a linear system and it can be very easily analyzed using simple tools such as Matlab or ORCAD. Let us take the case of IECO Sprint. The best place to break the loop would be at the output of the error amplifier. Figure 1 shows how the signal would be introduced. The dc supply has to be adjusted to get the required output (5.8V) for a given input voltage and load. Caution needs to be exercised in setting the dc voltage as any mistake would make the output to shoot up thereby spoiling the power supply. An important point to be considered is that at 0 voltage at the error amplifier output will give full duty cycle and the output would shoot up to very high levels. Set the dc supply to 10V initially. Increase the mains input voltage slowly and leave it at 320 V dc. Now decrease the error signal's dc voltage slowly until the output dc voltage is close to 5.8 V. The frequency of the ac signal has to be swept from 10 Hz to 10 KHz. The amplitude of the ac signal may be set anywhere between 10 mV and 500 mV depending upon the frequency. At low frequencies the loop gain is large. Hence the signal amplitude has to be low to avoid any saturation. At higher frequencies the signal amplitude has to be increased to get a reasonable output under the noisy environment. Average acquisition mode has to be selected for the storage oscilloscope to cancel out noisy signal. The no of samples has to be experimentally found out to get a neat waveform. At each frequency the gain (output signal/input signal) and the phase difference has to be computed from the measurement. The table below may be used for getting the required Bode plot. Frequenc y 10 Hz 30 Hz 50 Hz 80 Hz 100 Hz 300 Hz 500 Hz 1 KHz 3 KHz 5 KHz 10 KHz
Input Ampltud e
Output Ampltud e
Gain (dB)
time dela y
phase difference (degrees)
D 2
10u
L1
v o S ense+ 100u D 1 N 5 8 0 6 /2 7 C L2 4.2m
K1 1n K _ L in e a r .9 2 L2 L3 L3 L5 19u
K
1
V2 D 1 N 5 8 0 6 /2 7 C D 3
0
R 10
2
1u L4
C 6 22u
R 11
330 R 29 1k
C 7 0 .1 22u
R 12
0
1.8k .1
C 8 R 13
D 7
1n
1
0
3 M 1 22 N 7 0 0 2 / P L P R 14
220
VC C
Q 10 1
4 .7
2 14
14
320
U 2A
1 3 2
4 6
100p IC = 0
C D 4011B 7
7
C D 4011B
0
Error Amp
R 16 R 17
D 1 N 5 8 0 6 /2 7 C D 5
Q 3
ea_out
6 .8
R 18 1000k 3 .9 k
Oscillator
U 2B
5
C 9
0
b a s eB U X D 8 7
0
0
O sc_O ut
e m t rc o l
1k R 15
D 1 N 5 8 0 6 /2 7 C
V3
R 8
R 9
1
H V 1
R 7 0 .1
0
320
C 5
B C 8 5 7 /P L P L5
C B1 2C 8 4 7 C / P L P 1n
F Z T 7 8 9 A /Z T X Q 2
0
0
122u
C 13
C 14
68n
10u
v b
Q 4 C 10
C 11
68n
10u
R 19 1k
0 0
A d ju s t t o g e t 5 . 8 V o u t p u t
V5 A d ju s t t o g e t a g o o d o u t p u t s ig n a l V6
0
Power Supply and signal generators are to connected as above and the output is to be connected to the transistor Q3 base through R17.