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Imec 2001 Workshop on Substrate Coupling N.P. (Nick) van der Meijs Delft University of Technology, The Netherlands
[email protected] http://cas.et.tudelft.nl/space
D I MES Delft Institute of Microelectronics and Submicron Technology
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Delft Delft University of Technology
SPACE for substrate resistance extraction
imec substrate workshop 2001
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Intro, motivation Empirical Parametric Modeling n n n
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Boundary Element Method n n n n
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Modeling A-priori Model Reduction Examples Modeling BEM Solution Schemes A-priori Model Reduction Examples
The Space Environment Conclusion
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SPACE for substrate resistance extraction
imec substrate workshop 2001
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Mixed Signal n n
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RF IC’s n n
n
Integrated inductors Intra-device parasitics
Power IC’s n
n
Digital switching disturbs analog circuits Smart Power: analog power drivers disturb digital circuits
Latchup issues
High-speed Digital n
Digital switching may cause catastrophic clock jitter in communication circuits
Substrate Coupling problems grow with performance of applications and integration density ©
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SPACE for substrate resistance extraction
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•Diffused •Resistor
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• DIGITAL •Substrate Contact
•Analog •Output
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• Silicon •Silicon
Illustration of substrate cross-talk problem n
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Mixed-signal designs often require detailed consideration of substrate noise. Switching in digital part → potential spike on supply lines → coupled into substrate → propagation → picked up by analog circuit → noise, distortion.
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SPACE for substrate resistance extraction
imec substrate workshop 2001
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P+
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Rcb1 N-well
Epi-layer (P-)
Rs1
Rcb2
Rs2
Substrate
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SPACE for substrate resistance extraction
imec substrate workshop 2001
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Assume that coupling can be modeled with resistive network n Valid for f << 1/ρε n
n
Problem reduces to n n n
n n
Determination of resistive N-port For N contacts on top of resistive medium Eventually with back-side contact
Solve Laplace Equation in 3D Use appropriate techniques that n n
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Ignore substrate skin effect, slow wave effects, …
capture knowledge of the application to gain efficiency enable smooth integration in design flow
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SPACE for substrate resistance extraction
imec substrate workshop 2001
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accurate, flexible n
n
n
n
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Device Simulator process development, highest accuracy Finite Element Method (Finite Difference) large meshes, can be accurate for trenches, deep diffusions etc. Hybrid Element Method combination of BEM and FEM Boundary Element Method stratified doping profile Empirical Parametric Method
fast ©
NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
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From Layout (e.g. GDS) to Netlist (e.g. Spice) Devices, interconnect (R, C), substrate Empirical Parametric Method for substrate resistance n Quick, for large circuits Boundary Element Method for substrate resistance n Reference, for smaller circuits Model Order Reduction n A-posteriori on full netlist n A-priori for both EPM and BEM
NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
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Fitting formulas for common contact geometries For quick and moderately accurate extraction of large circuits Can be compared to traditional empirical methods for interconnect capacitance extraction Calibrated against test structure measurements or reference simulations
NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
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Lateral resistance between nearby contacts Vertical resistance to common substrate node d A
Ra = f ( Pa , Aa ) B
Rab
Ra
Rb = f ( Pb , Ab ) Rab = f ( d , Aa , Ab )
Rb substrate node
with P = perimeter A = area
Model valid independent of doping profile ©
NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
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Two squares of size W × W at distance d: 150
R inkΩ
W =1 µ
100 W =2 µ 50 0
W =4 µ 1
10
100 d in µ
1000
150
W =1 µ
100
W =2 µ
R in kΩ
W =4 µ
50 0
1
7 µ 15 Ω.cm + 300 µ 0.05 Ω.cm
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SPACE for substrate resistance extraction
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d in µ
100
1000
300 µ 15 Ω.cm
imec substrate workshop 2001
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0RGHO9DOLGLW\ n n n n n
R increases with distance R saturates for large distance Qualitatively independent of doping profile Small distance: Rab << Ra + Rb ⇒ R ≈ Rab Large distance: Rab >> Ra + Rb ⇒ R ≈ Ra + Rb Ra = f ( Pa , Aa )
d A
Ra
B
Rab Rb
substrate node ©
NvdM Dimes TU Delft
Rb = f ( Pb , Ab ) Rab = f ( d , Aa , Ab )
with P = perimeter A = area
SPACE for substrate resistance extraction
imec substrate workshop 2001
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100
70
90
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Ga 80 in µS 70
Ga 60 in µS 55
60
Aa = 18sq.µ
15
20
25
30
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40
50
Pa in µ n
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Pa = 18 µ 10
15
20
Aa in sq.µ
Substrate resistance as a function of perimeter and area
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SPACE for substrate resistance extraction
imec substrate workshop 2001
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W=1µ 10000
W=2µ
Rab in kΩ 1000 100
W=4µ
1
2
5
10
20
50
d in µ
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Direct coupling resistance as a function of distance and size
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SPACE for substrate resistance extraction
imec substrate workshop 2001
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1 1 Ra = , = Ga k1 + k 2Pa + k 3 Aa
P = contact perimeter, A = contact area k1, k2, k3 are fitting parameters Rab =
Kd p , Aa + Ab
Aa and Ab are contact areas, d = minimum distance, p and K are fitting parameters ©
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SPACE for substrate resistance extraction
imec substrate workshop 2001
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Direct coupling resistances only between neighbor contacts (e.g. not between 1 and 4)
2 1
4 3
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Pairs of neighbor contacts defined by Delaunay triangulation A-priori model order reduction
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SPACE for substrate resistance extraction
imec substrate workshop 2001
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Direct coupling between two contacts iff they are connected in Delaunay diagram
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SPACE for substrate resistance extraction
imec substrate workshop 2001
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Contact 2 and 4 are externally connected. method full BEM Delaunay BEM Delaunay Parametric
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R12 12.662 13.046 12.545
R23 59.599 47.984 47.583
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R13 29.057 31.775 31.775
imec substrate workshop 2001
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............. . . . . . . ... ........................................... ... ... ... ... mag. 1 ... in dB ... ... no sub. res. .... .... BEM 0.5 ........ . ..... ... ......... parametric
0.01
0.1
1
frequency in GHz
Simulated magnitude of the transfer function of a bipolar amplifier.
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Total extraction times (in seconds) on a HP 9000/735. circuit pla processor memory ©
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nr. tors nr. sub. term. 328 418 1467 1357 6360 7057 SPACE for substrate resistance extraction
cpu time 6.4 27.7 320.1 imec substrate workshop 2001
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Extraction of resistance model from first principles n As accurate as underlying physical assumptions n More accurate than empirical parametric modeling Less versatile than Finite Element Method n Conductivity/doping must be independent of lateral position Can be faster n Smaller but full matrix Restricted problem sizes
NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
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contacts
σ1 σ
2
∇ 2G( x , x s ) = −δ ( x − x s ) + V1
Ω
n
Laplace equation with homogenous Neumann BC’s
G(x , xs ) is a Green’s function: potential at x due to current injected at xs n ϕ ( x ) = ∫ G ( x , x s ) j ( x s ) dx s n
n n n
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Admittance matrix after discretization: Y = FT.G-1.H.F H is unity matrix in case of infinite medium F: incidence matrix relating boundary elements (panels) to contacts
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SPACE for substrate resistance extraction
imec substrate workshop 2001
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Most simple case: chip is modeled as infinite medium: n
Infinitely thick substrate layer
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Infinitely long and wide chip
n
⇒ only contacts are discretized
Effects of the lateral sidewalls: approximated by partial method of images: only closest boundaries as mirror Effect of infinite thickness ⇒ discretize bottom
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SPACE for substrate resistance extraction
imec substrate workshop 2001
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exact infinite approximate
Resistance (Ohm)
4400 4200 4000 3800 3600 3400 3200 3000
n n n
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0
5
10
15
20 25 30 35 Distance (micron)
40
45
50
2 rectangular contacts 10 µ × 100 µ, distance 30 µ 22 µ, 20 Ωcm epi, 278 µ, 3.5 Ωcm substrate Distance to chip edge is varied
NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
23
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Resistance (Ohm)
8000 7000 6000 5000 4000 3000 2000 1000 1e-09 1e-08 1e-07 1e-06 1e-051e-04 0.001 0.01 conductivity n n n n
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0.1
2 rectangular contacts 10 µ × 100 µ, distance 30 µ infinite lateral dimensions Solid: exact thickness dashed: infinite thickness tepi = 7 µ ρepi = 20 Ωcm tchip = 7.1, 20, 300 µ
NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
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A = FT G-1 F
GQ=F A = FT Q
invert
solve
exactly
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max entropy (Space)
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direct (LU)
O(N3)
iterative (GMRES)
O(mN2)
GMRES + multipole O(mN) (Fastcap) IES3, Nεbula, Shi, FFT, others G ∈ ℜNxN N panels ©
NvdM Dimes TU Delft
F ∈ {0,1}Nxm
A ∈ ℜmxm
Ω(mN) (?)
w window size
m conductors SPACE for substrate resistance extraction
imec substrate workshop 2001
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Conventional n
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O(mN2) time n
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O(mN) time
Full admittance network
SPACE for substrate resistance extraction
imec substrate workshop 2001
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Admittance matrix: Y = FT G-1 F Need to invert G, but avoid O(N3) time complexity.
X G
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Y 0
O(N)
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GME-1
-1
Z
X GME
O(N3)
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Partially specified G ⇒ reduced order Y
n
linear in number of panels
N
n
quadratic in width of band
b
n
b quadratic in interaction window size
w
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complexity O(Nw4)
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SPACE for substrate resistance extraction
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imec substrate workshop 2001
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Good approximation of exact inverse on controllable band around main diagonal + entries out of band are 0 + no direct coupling between distant contacts Neglected coupling detail is accounted for in total resistance Enables linear time complexity with constant memory usage A-priori model reduction Illustrated on next slide for test structures with 5 parallel, equidistant identical contacts
NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
28
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Resistances for 5 identical parallel equidistant contacts for several Schur windows R1s = “short circuit resistance” = //R1x
window
R1∞
R12
R13
R14
R15
R1s
∞
129
41.8
134
204
193
20.3
4
117
40.9
122
135
∞
20.6
3
101
38.9
83.6
∞
∞
21.0
2
81.0
31.1
∞
∞
∞
22.5
1
47.0
∞
∞
∞
∞
47.0
NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
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Vout
Vin Cin
Cout Epi-
7µ
Simulation data: Vin = 5V Vbulk = -5V Rlead = 2Ω
Rlead Llead
layer Rbulk
200 µ V bulk
fVin = 1 GHz Rbulk = 2.5Ω Llead = 10 nH
Cin = 0.2 pF Cout = 0.015 pF
-2.0
only right substrate contact
Vout (V)
only left substrate contact -4.0
both substrate contacts both substrate contacts and bulk contact
-6.0 0.0
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NvdM Dimes TU Delft
2.0
time (ns)
4.0
6.0
SPACE for substrate resistance extraction
imec substrate workshop 2001
30
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n
n
n n
Good conducting epi-layer on bad conducting substrate. Metal couples capacitively to substrate. Metal resistance plays no role. Lower left pad has an ohmic connection with substrate.
Layout of HF S-parameter dummy structure.
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NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
31
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0.1
0.1
0.01
0.01 0.001
0.0001
Im(Y12) (S)
Re(Y12) (S)
0.001
1e-05 1e-06 measured no substrate with substrate
1e-07 1e-08
1e-05 1e-06 1e-07
1e-09 1e-10 1e+08
1e+09 1e+10 Frequency (Hz)
trans admittance (Real) n
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0.0001
1e+11
1e-08 1e+08
measured no substrate with substrate
1e+09 1e+10 Frequency (Hz)
1e+11
trans admittance (Imaginary)
Measured: markers. Simulations: without (dashed) and with (solid) substrate network
NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
32
9/6,0RGHOLQJDQG9HULILFDWLRQ 63$&(3URMHFW
http://cas.et.tudelft.nl/space Downloads: software, papers, docs, general info
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SPACE for substrate resistance extraction
imec substrate workshop 2001
33
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Consistent modeling algorithms
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Space is extremely fast O(N) time, ≈3M trans/hour on PIII/500
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needs little computer memory << O(N)
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accurately extracts parasitic capacitances BEM, parametric
n
accurately extracts parasitic resistances FEM
n
accurately extracts substrate resistances BEM, parametric
n
produces networks of minimal complexity SNE, MPR, ...
n
can read/write various formats GDSII, SPICE, SPF, ...
n
enables trading accuracy versus time method, parameters
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many little features, GUI we need user feedback
NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
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Heavily used in-house
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Ocean user community (hundreds of installations worldwide).
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Nelsis user community.
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Educational license holders University of California at Santa Cruz,University of Pittsburgh, University of California at Berkeley, MIT, INESC Portugal, Eindhoven University of Technology, IMEC, K.U. Leuven, and others.
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Philips, NL
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Commercialization by OptEM (www.optem.com) (US, CA).
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Part of Blast Fusion from MAGMA (www.magma-da.com),
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Technology partner with Agilent EEsof EDA (www.tm.agilent.com/tmo/hpeesof) NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
35
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Project title VLSI Modeling and Verification (Space Project) World Wide Web http://cas.et.tudelft.nl/space Downloads: software, papers, docs, general info Free 3-month evaluation copy (full version)
Thank you for your attention
©
NvdM Dimes TU Delft
SPACE for substrate resistance extraction
imec substrate workshop 2001
36