Snubber Circuits
A.
Overview of Snubber Circuits
B.
Diode Snubbers
C.
Turn-off Snubbers
D.
Overvoltage Snubbers
E.
Turn-on Snubbers
F.
Thyristor Snubbers
William P. Robbins Professor Dept. of Electrical Engineering University of Minnesota 200 Union St. SE. Minneapolis, MN 555455
Copyright 1997
Snubbers - 1 W.P. Robbins © 1997
Function of Snubber Circuits
• Protect semiconductor devices by:
•
Limiting device voltages during turn-off transients
•
Limiting device currents during turn-on transients
•
Limiting the rate-of-rise (
•
Limiting the rate-of-rise (
•
Shaping the switching trajectory of the device as it turns on/off
di ) of currents through the dt semiconductor device at device turn-on
dv ) of voltages across the dt semiconductor device at device turn-off
Snubbers - 2 W.P. Robbins © 1997
Types of Snubber Circuits
1.
Unpolarized series R-C snubbers
•
2.
3.
Used to protect diodes and thyristors
Polarized R-C snubbers
•
Used as turn-off snubbers to shape the turn-on switching trajectory of controlled switches.
•
Used as overvoltage snubbers to clamp voltages applied to controlled switches to safe values.
•
Limit
dv during device turn-off dt
Polarized L-R snubbers •
Used as turn-on snubbers to shapte the turn-off switching trajectory of controlled switches.
•
Limit
di during device turn-on dt
Snubbers - 3 W.P. Robbins © 1997
Need for Diode Snubber Circuit
+ V d -
Lσ D
Rs
Io
i
Df
v
(t)
Df
f
0
• R s - Cs = snubber circuit
Sw
Df = d t
V d Lσ t I rr
t
(t)
V d
Lσ
•
• S w closes at t =
Cs
di Io
• L σ = stray inductance
d i Lσ d t
di Lσ
Diode breakdown if V d + Lσ dt
> BVBD
Snubbers - 4 W.P. Robbins © 1997
• Diode voltage without snubber
Equivalent Circuits for Diode Snubber Lσ + V d
cathode
Diode snap-off
anode
-
i Df
Rs
• Worst case assumption- diode snaps off instantaneously at end of diode recovery
t
• Simplified snubber - the capacitive snubber Lσ + V d -
• Rs = 0 + v Cs
•v Cs
Cs
= -v
Df
-
d2vCs
vCs
Governing equation -
•
Boundary conditions - v Cs (0+) = 0 and i Lσ(0+) = I r r
LσCs
=
Vd
•
dt 2
+
Cs
L σCs
Snubbers - 5 W.P. Robbins © 1997
Performance of Capacitive Snubber
•
vCs (t) = Vd - V d cos(ωot) + Vd
•
•
1
ωo =
LσCs
Vcs,max = Vd 1 +
;
Cbase Cs
sin(ωot)
I r r 2 C base = Lσ V d Cbase 1 + Cs
5
4
V Cs,max
3
Vd 2
1
0 0
0.2
0.4
0.6
0.8
1
1.2 C base Cs
Snubbers - 6 W.P. Robbins © 1997
1.4
1.6
1.8
2
Effect of Adding Snubber Resistance •
Equivalent circuit with snubber resistance R s
Lσ -
+ v
V d
Df
(t) Cs
+
-
•
Governing equation
•
Boundary conditions vDf (0+) = - I r r R s
•
Rs
LσCs
d2vDf
+ Rs Cs
dt 2
dvDf (0+)
and
=-
dt
dvDf dt
I rr
-
Cs
+ vDf = -Vd
R s Vd Lσ
+
I r r Rs2 Lσ
Solution for v Df (t)
vDf (t) = - Vd -
ωa = ωo
tan(φ) = -
α2 1 ωo2 Rb ωa Lσ
Cbase
V d e- αt
-
Cs
;
ωo =
sin(ωa t - φ − ξ)
1 LσCs
;
α=
Rs 2Lσ
Lσ Vd α α ; tan(ξ) = ; R base = , C base = ωa ωa I rr (Vd/ I r r )2 Snubbers - 7 W.P. Robbins © 1997
Performance of R-C Snubber •
At t = tm vDf (t) = Vmax
•
tm =
tan- 1 (ωa /α)
Vmax
•
Vd
+
ωa =1+
φ - ξ ≥0 ωa
1 + C N- 1 - R N exp(-αt m) Cs
•
CN =
•
Ls I r r 2 Cbase = Vd2
Cbase
and
RN =
and
Rs R base
R base =
Vd I rr
3 R s,opt
C s = C base
R
= 1.3
base
2 V max V d 1 Rs I rr Vd
0 0
1
Snubbers - 8 W.P. Robbins © 1997
R s R base
2
Diode Snubber Design Nomogram Wtot 2 L s I r r /2
3
WR 2 L s I r r /2 0
2 0 V max
0 0
0
for R = R s s,opt
Vd 00
00
0 00
0 00 0
00 0 0
1
0
0
00
R s,op R base
0 0
1
C s / Cbase
2
Snubbers - 9 W.P. Robbins © 1997
3
Need for Snubbers with Controlled Switches
L1
V d
i L3
•
L2
S
Io
L1 , L 2 , L 3 = stray inductances
• L
sw
+ vsw
w
-
L
i
= L + L + L 1 2 3
di dt
sw L
Io
di dt
Io
V d
vsw t 3
to t 1
i
sw t
6
t 4
idealized switching loci
t5
turn-off
to t1
t3 Vd
t
6
• Overvoltage at turn-off due to stray inductance • Overcurrent at turn-on due to diode reverse recovery
turn-on
t 4
t5
vsw
Snubbers - 10 W.P. Robbins © 1997
Turn-on Snubber for Controlled Switches
•
Circuit configuration
+
V
i
Io
d
Ds S
-
•
DF
D f
Turn-off snubber
Rs
w
Cs
i
Cs
Equivalent circuit during switch turn-off
• Assumptions
Io
Df
1. No stray inductance. 2. i s w (t) = Io(1 - t/t f i )
V
d
Io - i i sw
sw
Cs
Snubbers - 11 W.P. Robbins © 1997
3. i s w (t) uneffected by snubber circuit.
Turn-off Snubber Operation
•
Capacitor voltage and current for 0 < t < t f i I ot I ot 2 • i Cs (t) = and v Cs (t) = tf i 2Cs t f i
•
I ot f i For Cs = Cs1 , v Cs = Vd at t = tf i yielding C s1 = 2Vd
•
Circuit waveforms for varying values of C s
i
i
sw
i
sw
sw Io
i
i
Df t fi
i
i
Df t
Df
t fi
fi
Cs
V d v Cs Cs < Cs1
Cs = Cs1
Snubbers - 12 W.P. Robbins © 1997
Cs > C s
Benefits of Snubber Resistance at Sw Turn-on
D
Io
f
Io
• Ds shorts out R s during S w turn-off.
Rs
• During S w turn-on, D s reverse-biased and C s
V d Sw
Ds
discharges thru R s .
Cs
• Turn-on with R s = 0 discharge of C s
t rr vsw
i sw
t ri 0
• Extra energy dissipation in S w because of lengthened voltage fall time.
Io
V d t
• Energy stored on Cs dissipated in S w .
2
t ri + t rr
v
• Turn-on with R s > 0 • Energy stored on Cs dissipated in R s
i
sw
D
I
f
rather than in S w . • Voltage fall time kept quite short.
t rr
i sw
Io
Vd Rs I rr
Snubbers - 13 W.P. Robbins © 1997
rr
Effect of Snubber Capacitance •
Switching trajectory
i sw Io Cs < Cs1
RBSOA
Cs = Cs1 Cs > Cs1 V
•
vsw
d
Energy dissipation 1
WR = dissipation in resistor
W / total Wbase 0.8
WT = dissipation in switch S w
0.6 W / Wbase R
0.4
WT / W base
2Vd
Wtotal = WR + WT
0.2 0
Cs1 =
I ot f i
Wbase = 0.5 VdI ot f i 0
0.2
0.4
0.6
0.8
1
1.2
1.4
C /C s s1
Snubbers - 14 W.P. Robbins © 1997
Turn-off Snubber Design Procedure
• Selection of Cs • Minimize energy dissipation (W T) in BJT at turn-on • Minimize WR + WT • Keep switching locus within RBSOA • Reasonable value is C s = Cs1 • Selection of R s • Limit icap(0+) =
Vd Rs
< Ir r
• Usually designer specifies I r r < 0.2 Io so Vd = 0.2 Io Rs • Snubber recovery time (BJT in on-state) • Capacitor voltage = V d exp(-t/R s Cs ) • Time for vCs to drop to 0.1Vd is 2.3 Rs Cs • BJT must remain on for a time of 2.3 Rs Cs Snubbers - 15 W.P. Robbins © 1997
Overvoltage Snubber for Controlled Switches •
Circuit configuration - D ov, R ov, and C ov form overvoltage snubber
Lσ
+
D
f
Io
R
ov
Vd Sw
-
Dov
C ov
•
Overvoltage snubber limits magnitude of voltage developed across S w as it turns off.
•
Switch S w waveforms without overvoltage snubber •
i
t f i = switch current fall time ; kV d = overvoltage on Sw
kV d
di Lσ
Io • kV d = Lσ = Lσ dt tf i
s w Io
v
s w
V d
o
t
fi
Snubbers - 16 W.P. Robbins © 1997
• Lσ =
kV dt f i Io
Operation of Overvoltage Snubber •
Dov,C ov provide alternate path for inductor current as S w turns off. • Switch current can fall to zero much faster than L σ current.
•
Df forced to be on (approximating a short ckt) by I o after S w is off.
•
Equivalent circuit after turn-off of S w . i
Lσ Lσ
+
R
D ov
Vd
i
+
v
-
-
σ
+ C
ov
v
-
Cov
v
2
LσCov 2
v Cov (0+) = Vd i
(t) = I o cos[ Lσ
Vd
o
s w 0
π
i Lσ(0+) = I o t Lσ C ov
]
Discharge of Cov thru R ov with time constant R ov C ov ∆V sw,max
Lσ I
π
LσCov
• Equivalent circuit while inductor current decays to zero
Charge-up of Cov from Lσ i
• t f i <<
Cov
Lσ L
V d
ov
+
C ov
-
• Dov on for 0 < t <
π
• Energy transfer from Lσ to Cov Cov ( ∆V sw,max )2 Lσ ( I o )2 = 2 2
Lσ C ov 4
. Snubbers - 17 W.P. Robbins © 1997
Overvoltage Snubber Design
• Cov =
Ls I o 2 (∆v sw,max )2
• Limit ∆v sw,max to 0.1Vd
kV d t fi • Using Ls = Io
• Cov =
in equation for Cov yields
kV d t fi I o 2 I o (0.1Vd )2
100k t f i I o = V d2
• Cov = 200 Cs1 where Cs1 =
t fi I o 2Vd
which is used
in turn-off snubber
• Recovery time of C ov (2.3Rov Cov ) must be less than off-time duration, toff , of the switch Sw. • R ov ≈
t off 2.3 C ov
Snubbers - 18 W.P. Robbins © 1997
Turn-on Snubber Circuit •
Circuit topology
+ D
I
f
V d
R
Ls
+
D f
o
Snubber circuit Ls D
Ls
D V d
Ls
Sw
-
R
D
Ls
I
Ls
f
-
Sw
di s w
•
Circuit reduces V s w as switch S w turns on. Voltage drop Ls dt provides the voltage reduction.
•
Switching trajectories with and without turn-on snubber.
Io
i sw With snubber
Without snubber
Ls
di sw dt v V d
Snubbers - 19 W.P. Robbins © 1997
sw
o
Turn-on Snubber Operating Waveforms •
Small values of snubber inductance (L s < Ls1 )
v
I rr
s w
V
•
d
di s w
controlled by dt switch S w and drive circuit.
Io
Ls I o
• ∆vs w = tr i
i
•
s w
I rr
s w
reduced V
d
•
Io
di s w
limited by circuit dt Vd Io to < Ls tr i
• Ls1 =
s w t
•
trr
Large values of snubber inductance (L s > Ls1 ).
v
i
tr i
on
≈
Ls Io V
Vdt r i Io
> tr i + t r r
d
I r r reduced when Ls > Ls1 because I r r proportional to
Snubbers - 20 W.P. Robbins © 1997
di s w dt
Turn-on Snubber Recovery at Switch Turn-off
+ D
Io
f
V d
R
Ls
• Assume switch current fall time t ri = 0. • Inductor current must discharge thru DLs - R Ls series segment.
Ls D
Ls
Sw
-
I o R Ls exp(-R Ls t/Ls )
Io R
Ls
is w vs w
V d
Io
• Switch waveforms at turn-off with turn-on snubber in circuit.
t rv
•
Overvoltage smaller if t f i smaller.
•
Time of 2.3 Ls /R Ls required for inductor current to decay to 0.1 I o
•
Off-time of switch must be > 2.3 L s /R Ls
Snubbers - 21 W.P. Robbins © 1997
Turn-on Snubber Design Trade-offs •
Selection of inductor L s •
•
Larger L s decreases energy dissipation in switch at turn-on •
Ws w = WB (1 + I r r / I o)2 [1 - Ls /L s1 ]
•
WB = VdI ot f i /2 and L s1 = Vdt f i / I o
•
Ls > Ls1 Ws w = 0
Larger L s increases energy dissipation in R Ls •
•
WR = WB Ls / L s1
•
Ls > Ls1 reduces magnitude of reverse recovery current I r r
•
Inductor must carry current I o when switch is on - makes inductor expensive and hence turn-on snubber seldom used
Selection of resistor R Ls •
Smaller values of R Ls reduce switch overvoltage I o R Ls at turn-off •
•
Limiting overvoltage to 0.1V d yields R Ls = 0.1 Vd/ I o
Larger values of R Ls shortens minimum switch off-time of 2.3 Ls /R Ls
Snubbers - 22 W.P. Robbins © 1997
Thyristor Snubber Circuit P 1 van +
L
- v bn +
L
-
-
5
3
A B
i d
L
v cn +
C Cs 4
6
2
Rs
• van (t) = Vs sin(ωt), v bn(t) = Vs sin(ωt - 120°), vcn (t) = Vs sin(ωt - 240°)
• Phase-to-neutral waveforms
v
v bn
an
v LL= v v v bn an = ba •
•
vLL(t) =
t 1
3 Vs sin(ωt - 60°)
Maximum rms line-to-line voltage V LL =
Snubbers - 23 W.P. Robbins © 1997
3 V 2 s
Equivalent Circuit for SCR Snubber Calculations •
Equivalent circuit after T1 reverse recovery
i
L
2 L + V ( bc
T after 1 recovery
t ) 1
Cs
T3 (on)
-
•
P
i
T1
Rs
A
Assumptions •
Trigger angle α = 90° so that vLL(t) = maximum =
•
Reverse recovery time t r r << period of ac waveform so that vLL(t) equals a constant value of v bc(ωt 1) =
•
2 VLL
2 VLL
Worst case stray inductance L σ gives rise to reactance equal to or less than 5% of line impedance.
•
Line impedance =
Vs 2I a1
=
2VLL 6I a1
=
VLL 3I a1
where I a1 = rms value of fundamental component of the line current.
•
ωLσ = 0.05
VLL 3I a1
Snubbers - 24 W.P. Robbins © 1997
Component Values for Thyristor Snubber
•
•
Use same design as for diode snubber but adapt the formulas to the thyristor circuit notation I r r 2 Snubber capacitor C s = Cbase = Lσ V d
•
•
di Lσ
From snubber equivalent circuit 2 L σ dt
I rr =
di Lσ dt
2VLL
tr r =
2Lσ
2VLL
tr r = 2
0.05 V LL
=
2 VLL
t rr = 25 ωI a1t r r
3 I a1ω
•
Vd =
•
0.05 V LL 2 5 ωI a1t r r 2 8.7 ωI a1t r r = Cs = Cbase = VLL 3 I a1ω 2VLL
•
Vd
Snubber resistance R s = 1.3 Rbase = 1.3 I
•
•
2 VLL
R s = 1.3
2VLL 25ωI a1t r r
=
rr
0.07 V LL ωI a1t r r
Energy dissipated per cycle in snubber resistance = W R
•
WR =
LσI r r 2 2
+
Cs Vd2 2
= 18 ω I a1 VLL(tr r )2
Snubbers - 25 W.P. Robbins © 1997