Simulation Lab 4
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1 bit register truth table Clear 1 0 0 0
Enable X 0 1 1
Clock X X Down Down
Data X X
Q 0 Q 1 0
1 0
4 bit register truth table A3
A2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
X X
A1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
X X
A0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
X X
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X X
Enable 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X 0
Clock DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN X X
Clear
A1
A0
Y3 x x x
Y3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
Y2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0
Y1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0
Y0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0
Q
Q
Q
Y2 x x x
Y1 x x x
Y0 x x x
Q
Buffer Truth Table EN1
EN2 0 0 1 1
A3 0 1 0 1
A2 1 1 1 1
1 1 1 1
1 1 1 1
1 1 1 1
Task 4-5 Microprocessor gate delay = 18 gates Propagation delay =72 nanoseconds 72 * (10^-9) = 72 nanoseconds Frequency = 1.38888888 megahertz Task 4-6 Hex Input 0 1 2 3
Task 4-7
Enable 1 1 1 1
Y0
Y1 1 0 0 0
Y2 0 1 0 0
Y3 0 0 1 0
0 0 0 1
1
1
1
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1
EN1
EN2
A3
0 0 1 1
A2
0 1 0 1
A1
1 1 1 1
0 0 0 0
A0 1 1 1 1
0 0 0 0
Y3 x x x
Y2 x x x 1
Y1 x x x
Y0 x x x
0
1
0
Task 4-8 A3
A2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
X X X X
A1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
X X X X
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 X X X X
MS Line
A0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X X X X
X 0 0 1
Write Line 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X 0 1 0
Clock DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN X X X X
Clear 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
Y3
Y2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0
Q Q Q
Y1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0
Q Q Q
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 Q Q Q
Enable X 0 1 1
Clock X X Down Down
Data X X
Q 0 Q 1 0
1 0
4 bit register truth table A3
A2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
X X
A1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
X X
A0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
X X
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X X
Enable 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X 0
Clock DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN X X
Clear
A1
A0
Y3 x x x
Y3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
Y2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0
Y1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0
Y0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0
Q
Q
Q
Y2 x x x
Y1 x x x
Y0 x x x
Q
Buffer Truth Table EN1
EN2 0 0 1 1
A3 0 1 0 1
A2 1 1 1 1
1 1 1 1
1 1 1 1
1 1 1 1
Task 4-5 Microprocessor gate delay = 18 gates Propagation delay =72 nanoseconds 72 * (10^-9) = 72 nanoseconds Frequency = 1.38888888 megahertz Task 4-6 Hex Input 0 1 2 3
Task 4-7
Enable 1 1 1 1
Y0
Y1 1 0 0 0
Y2 0 1 0 0
Y3 0 0 1 0
0 0 0 1
1
1
1
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1
EN1
EN2
A3
0 0 1 1
A2
0 1 0 1
A1
1 1 1 1
0 0 0 0
A0 1 1 1 1
0 0 0 0
Y3 x x x
Y2 x x x 1
Y1 x x x
Y0 x x x
0
1
0
Task 4-8 A3
A2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
X X X X
A1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
X X X X
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 X X X X
MS Line
A0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X X X X
X 0 0 1
Write Line 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X 0 1 0
Clock DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN DOWN X X X X
Clear 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
Y3
Y2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0
Q Q Q
Y1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0
Q Q Q
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 Q Q Q
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