Section 1.pptx

CME-205 Microcontroller and Microprocessor Systems Fall 2015

Dr. Muhammad Farhan (Asstt. Prof.) Electrical Engg. Deptt., CES, IoBM [email protected]

Books • Barry B. Brey, “The Intel Microprocessors,” 5th ed. or above Prentice Hall, 2009. • A.P. Godse, and D.A. Godse , “Microprocessor and Microcontroller System,” 1st ed., Technical Publications Pune, 2008. • M.A. Mazidi , J.G. Mazidi, and R.D. Kinely “The 8051 Microcontroller and Embedded Systems”, PHI Pearson Education, 5th Indian reprint, 2003.

Course Organization • Prerequisites: DLD • Class lectures Saturday 09:00-12:00 Place: TBD

• Course material Power point lecture slides and book reading

• Assignments, Quiz, Projects, Presentations To be announced during the course

Course Objectives • To introduce Microprocessor Intel 8085 and 8086 and the Microcontroller 8051 • After completing the course students will have a knowhow of  architecture of 8085 & 8086, 8051  the addressing modes & instruction set of 8085 & 8051  the need & use of Interrupt structure 8085 & 8051  and developed skill of simple program writing for 8051 & 8085 and applications  commonly used peripheral / interfacing ICs

Course Outline • Section I : Intro to Microprocessors, 8085 and 8086 Microprocessors and their architectures and structures(6 Lectures) • Section II : Instruction set and Programming of 8085 Microprocessor (6 Lectures) • Section III : Peripheral interface (6 Lectures) • Section IV : 8051 Microcontroller (6 Lectures) • Section V : Microcontroller Programming and Applications (6 Lectures)

Embedded Systems Overview Embedded Systems:Application-specific systems which contain hardware and software tailored for a particular task and are generally part of a larger System (e.g., industrial controllers) • Characteristics  Are dedicated to a particular application  Include processors dedicated to specific functions  Represent a subset of reactive (responsive to external inputs) systems  Contain real-time constraints  Include requirements that span: o Performance o Reliability o Form factor

Embedded Systems Overview Embedded computing systems • Computing systems embedded within electronic devices • Hard to define. Nearly any computing system other than a desktop computer • Billions of units produced yearly, versus millions of desktop units • Perhaps 50 per household and per automobile

Examples : Refrigerator

Examples : Car Door

A Short List of Embedded Systems

Concepts of co-design Co-design • The meeting of system-level objectives by exploiting the trade-offs between hardware and software in a system through their concurrent design

Key concepts • Concurrent: hardware and software developed at the same time on parallel paths • Integrated: interaction between hardware and software developments to produce designs that meet performance criteria and functional specifications

Essential components and considerations Essential components :• • • • • •

Microprocessor / DSP core Sensors Converter ( A-D and D-A ) Actuators Memory (on-chip and off-chip ) Communication path with interfacing environment

Essential considerations :• Response time ;- ( Real time system ) • Area, Cost, Power, Portability, Fault-tolerance

Design-flow in ES Design

Microprocessor • Microprocessor (µP) is the “brain” of a computer that has been implemented on one semiconductor chip. • The word comes from the combination micro and processor. • Processor means a device that processes whatever(binary numbers, 0’s and 1’s)  To process means to manipulate. It describes all manipulation.  Micro - > extremely small 14

Definition of a Microprocessor. The microprocessor is a programmable device that takes in numbers, performs on them arithmetic or logical operations according to the program stored in memory and then produces other numbers as a result.

15

Microprocessor ?

A microprocessor is multi programmable clock driven register based semiconductor device that is used to fetch , process & execute a data within fraction of seconds. 16

Applications • • • • • • • •

Calculators Accounting system Games machine Instrumentation Traffic light Control Multi user, multi-function environments Military applications Communication systems 17

MICROPROCESSOR HISTORY

18

DIFFERENT PROCESSORS AVAILABLE Socket Pinless Processor

Processor

Slot Processor

Processor Slot 19

Development of Intel Microprocessors • • • • • • • • • • • • • •

8086 - 1979 286 - 1982 386 - 1985 486 - 1989 Pentium - 1993 Pentium Pro - 1995 Pentium MMX -1997 Pentium II - 1997 Pentium II Celeron - 1998 Pentium II Zeon - 1998 Pentium III - 1999 Pentium III Zeon - 1999 Pentium IV - 2000 Pentium IV Zeon - 2001

20

GENERATION OF PROCESSORS Processor

Bits

Speed

8080

8

2 MHz

8086

16

4.5 – 10 MHz

8088

16

4.5 – 10 MHz

80286

16

10 – 20 MHz

80386

32

20 – 40 MHz

80486

32

40 – 133 MHz 21

GENERATION OF PROCESSORS

Processor

Bits

Speed

Pentium

32

60 – 233 MHz

Pentium Pro

32

150 – 200 MHz

Pentium II, Celeron , Xeon

32

233 – 450 MHz

Pentium III, Celeron , Xeon

32

450 MHz – 1.4 GHz

Pentium IV, Celeron , Xeon

32

1.3 GHz – 3.8 GHz

Itanium

64

800 MHz – 3.0 GHz 22

Intel 4004  Introduced in 1971.  It was the first microprocessor by Intel.  It was a 4-bit µP.  Its clock speed was 740KHz.  It had 2,300 transistors.  It could execute around 60,000 instructions per second. 23

Intel 4040 Introduced in 1971. It was also 4-bit µP.

24

8-bit Microprocessors

25

Intel 8008 Introduced in 1972. It was first 8-bit µP.

Its clock speed was 500 KHz. Could execute 50,000 instructions per second. 26

Intel 8080 Introduced in 1974. It was also 8-bit µP.

Its clock speed was 2 MHz. It had 6,000 transistors.

27

Intel 8085

Introduced in 1976. It was also 8-bit µP. Its clock speed was 3 MHz. Its data bus is 8-bit and address bus is 16-bit. It had 6,500 transistors. Could execute 7,69,230 instructions per second. It could access 64 KB of memory. It had 246 instructions. 28

16-bit Microprocessors

29

 Introduced in 1978.

Intel 8086  It was first 16-bit µP.  Its clock speed is 4.77 MHz, 8 MHz and 10 MHz, depending on the version.  Its data bus is 16-bit and address bus is 20-bit.  It had 29,000 transistors.  Could execute 2.5 million instructions per second.  It could access 1 MB of memory.

 It had 22,000 instructions.  It had Multiply and Divide instructions. 30

Intel 8088 Introduced in 1979. It was also 16-bit µP. It was created as a cheaper version of Intel’s 8086.

It was a 16-bit processor with an 8bit external bus. 31

Intel 80186 & 80188 Introduced in 1982. They were 16-bit µPs.

Clock speed was 6 MHz. 80188 was a cheaper version of 80186 with an 8-bit external data bus. 32

Intel 80286  Introduced in 1982.  It was 16-bit µP.  Its clock speed was 8 MHz.  Its data bus is 16-bit and address bus is 24-bit.  It could address 16 MB of memory.  It had 1,34,000 transistors. 33

32-bit Microprocessors

34

 Introduced in 1986.

Intel It80386 was first 32-bit µP.  Its data bus is 32-bit and address bus is 32-bit.  It could address 4 GB of memory.

 It had 2,75,000 transistors.  Its clock speed varied from 16 MHz to 33 MHz depending upon the various versions. 35

Intel Introduced 80486 in 1989.  It was also 32-bit µP.  It had 1.2 million transistors.  Its clock speed varied from 16 MHz to 100 MHz depending upon the various versions.

 8 KB of cache memory was introduced. 36

IntelIntroduced Pentium in 1993. It was also 32-bit µP. It was originally named 80586. Its clock speed was 66 MHz.

Its data bus is 32-bit and address bus is 32-bit. 37

Intel Pentium Pro Introduced in 1995. It was also 32-bit µP.

It had 21 million transistors. Cache memory: 8 KB for instructions. 8 KB for data. 38

Intel Pentium II Introduced in 1997. It was also 32-bit µP.

Its clock speed was 233 MHz to 500 MHz. Could execute 333 million instructions per second. 39

Intel Pentium II Xeon Introduced in 1998. It was also 32-bit µP.

It was designed for servers. Its clock speed was 400 MHz to 450 MHz. 40

Intel Pentium III Introduced in 1999. It was also 32-bit µP.

Its clock speed varied from 500 MHz to 1.4 GHz. It had 9.5 million transistors. 41

Intel Pentium IV Introduced in 2000. It was also 32-bit µP.

Its clock speed was from 1.3 GHz to 3.8 GHz. It had 42 million transistors. 42

Intel Dual Core in 2006. Introduced It is 32-bit or 64-bit µP.

43

44

64-bit Microprocessors

45

Intel Core 2

Intel Core i3

46

Intel Core i5

INTEL CORE I7

47

Basic Terms • • • •

Bit: A digit of the binary number { 0 or 1 } Nibble: 4 bit Byte: 8 bit word: 16 bit Double word: 32 bit Data: binary number/code operated by an instruction • Address: Identification number for memory locations • Clock: square wave used to synchronize various devices in µP • Memory Capacity = 2^n , n->no. of address lines 48

BUS CONCEPT • BUS: Group of conducting lines that carries data , address & control signals. CLASSIFICATION OF BUSES: 1.DATA BUS: group of conducting lines that carries data. 2. ADDRESS BUS: group of conducting lines that carries address. 3.CONTROL BUS: group of conducting lines that carries control signals {RD, WR etc} CPU BUS: group of conducting lines that directly connected to µP SYSTEM BUS: group of conducting lines that carries data , address & control signals in a µP system 49

3 logic levels are:

TRISTATE LOGIC

• High State (logic 1) • Low state (logic 0) • High Impedance state High Impedance: output is not being driven to any defined logic level by the output circuit.

50

Basic Microprocessors System Central Processing Unit

Input Devices

ArithmeticControl Logic Unit ProcessingUnit Data into Information Primary Storage Unit

Keyboard, Mouse etc

Output Devices Monitor Printer

Disks, Tapes,

Optical Disks

Secondary Storage Devices 51

UNIT

1 THE 8086 MICROPROCESSOR

52

8086 Microprocessor-introduction • INTEL launched 8086 in 1978 • 8086 is a 16-bit microprocessor with – 16-bit Data Bus {D0-D15} – 20-bit Address Bus {A0-A19} [can access upto 2^20= 1 MB memory locations] .

• It has multiplexed address and data bus AD0-AD15 and A16–A19. • It can support upto 64K I/O ports 53

8086 Microprocessor • It provides 14, 16-bit registers. • 8086 requires one phase clock with a 33% duty cycle to provide optimized internal timing. – Range of clock: • 5 MHz for 8086 • 8Mhz for 8086-2 • 10Mhz for 8086-1 54

INTEL 8086 - Pin Diagram/Signal Description

55

INTEL 8086 - Pin Details

Power Supply 5V  10%

Ground Reset Registers, seg regs, flags CS: FFFFH, IP: 0000H

Clock

If high for minimum 4 clks

Duty cycle: 33% 56

INTEL 8086 - Pin Details

Address/Data Bus: Contains address bits A15-A0 when ALE is 1 & data bits D15 – D0 when ALE is 0.

Address Latch Enable: When high, multiplexed address/data bus contains address information.

57

INTEL 8086 - Pin Details

INTERRUPT

Non - maskable interrupt

Interrupt acknowledge Interrupt request 58

INTEL 8086 - Pin Details

Direct Memory Access

Hold

Hold acknowledge 59

INTEL 8086 - Pin Details

Address/Status Bus Address bits A19 – A16 & Status bits S6 – S3

60

INTEL 8086 - Pin Details

BHE#, A0: 0,0: Whole word (16-bits) 0,1: High byte to/from odd address 1,0: Low byte to/from even address

Bus High Enable/S7 Enables most significant data bits D15 – D8 during read or write operation. S7: Always 1.

1,1: No selection

61

INTEL 8086 - Pin Details

Min/Max mode Minimum Mode: +5V Maximum Mode: 0V

Minimum Mode Pins Maximum Mode Pins

62

Minimum Mode- Pin Details

Read Signal

Write Signal

Memory or I/0 Data Transmit/Receive Data Bus Enable 63

Maximum Mode - Pin Details

S2 S1 S0 000: INTA 001: read I/O port 010: write I/O port 011: halt 100: code access 101: read memory 110: write memory 111: none -passive

Status Signal Inputs to 8288 to generate eliminated signals due to max mode.

64

Maximum Mode - Pin Details

Lock Output Used to lock peripherals off the system Activated by using the LOCK: prefix on any instruction

DMA Request/Grant

Lock Output

65

Maximum Mode - Pin Details

QS1 QS0 00: Queue is idle

01: First byte of opcode 10: Queue is empty 11: Subsequent byte of opcode

Queue Status Used by numeric coprocessor (8087) 66

8086 Internal Architecture • •

8086 employs parallel processing 8086 CPU has two parts which operate at the same time – –

•

Bus Interface Unit Execution Unit

CPU functions 1. Fetch

2. Decode 3. Execute

8086 CPU

Bus Interface Unit (BIU)

Execution Unit (EU)

67

Bus Interface Unit • • • • •

Sends out addresses for memory locations Fetches Instructions from memory Reads/Writes data to memory Sends out addresses for I/O ports Reads/Writes data to Input/Output ports

68

Execution Unit • Tells BIU (addresses) where to fetch instructions or data • Decodes & Executes instructions • Dividing the work between BIU & EU speeds up processing

69

Architecture Diagram of 8086

70

∑

Memory Interface

EXTRA SEGMENT (ES)

BIU

CODE SEGMENT (CS)

6

5

4

3

2

1

STACK SEGMENT (SS) DATA SEGMENT (DS)

Instruction Queue

INSTRUCTION POINTER (IP)

Instruction Decoder AH

AL

BH

BL

CH

CL

DH

DL

ARITHMETIC LOGIC UNIT

CONTROL SYSTEM

STACK POINTER (SP) BASE POINTER (BP)

SOURCE INDEX (SI) DESTINATION INDEX (DI)

OPERANDS FLAGS

EU

71

Execution Unit • Main components are – Instruction Decoder – Control System – Arithmetic Logic Unit – General Purpose Registers – Flag Register – Pointer & Index registers

72

Instruction Decoder • Translates instructions fetched from memory into a series of actions which EU carries out

Control System  Generates timing and control signals to perform the internal operations of the microprocessor

Arithmetic Logic Unit  EU has a 16-bit ALU which can ADD, SUBTRACT, AND, OR, increment, decrement, complement or shift binary numbers 73

General Purpose Registers • EU has 8 general purpose registers • Can be individually used for storing 8-bit data • AL register is also called Accumulator • Two registers can also be combined to form 16-bit registers • The valid register pairs are – AX, BX, CX, DX

AH

AL

BH

BL

CH

CL

DH

DL

AH

AL

AX

BH

BL

BX

CH

CL

CX

DH

DL

DX 74

Flag Register • 8086 has a 16-bit flag register • Contains 9 active flags • There are two types of flags in 8086 – Conditional flags – six flags, set or reset by EU on the basis of results of some arithmetic operations – Control flags – three flags, used to control certain operations of the processor 75

Flag Register U U U U OF DF IF TF SF ZF U AF U PF U CF 1.

CF

CARRY FLAG

2.

PF

PARITY FLAG

3.

AF

AUXILIARY CARRY

4.

ZF

ZERO FLAG

5.

SF

SIGN FLAG

6.

OF

OVERFLOW FLAG

7.

TF

TRAP FLAG

8.

IF

INTERRUPT FLAG

9.

DF

DIRECTION FLAG

Conditional Flags (Compatible with 8085, except OF)

Control Flags

76

Flag Register Auxiliary Carry Flag

Carry Flag

This is set, if there is a carry from the lowest nibble, i.e, bit three during addition, or borrow for the lowest nibble, i.e, bit three, during subtraction.

This flag is set, when there is a carry out of MSB in case of addition or a borrow in case of subtraction.

Sign Flag

Zero Flag

Parity Flag

This flag is set, when the result of any computation is negative

This flag is set, if the result of the computation or comparison performed by an instruction is zero

This flag is set to 1, if the lower byte of the result contains even number of 1’s ; for odd number of 1’s set to zero.

15

14

13

12

11

10

9

8

7

6

OF

DF

IF

TF

SF

ZF

5

Over flow Flag

This flag is set, if an overflow occurs, i.e, if the result of a signed operation is large enough to accommodate in a destination register. The result is of more than 7-bits in size in case of 8-bit signed operation and more than 15-bits in size in case of 16-bit sign operations, then the overflow will be set.

Direction Flag

This is used by string manipulation instructions. If this flag bit is ‘0’, the string is processed beginning from the lowest address to the highest address, i.e., auto incrementing mode. Otherwise, the string is processed from the highest address towards the lowest address, i.e., auto incrementing mode.

4 AF

3

2 PF

1

0 CF

Tarp Flag If this flag is set, the processor enters the single step execution mode by generating internal interrupts after the execution of each instruction Interrupt Flag Causes the 8086 to recognize external mask interrupts; clearing IF disables these interrupts. 77

Registers, Flag 8086 registers categorized into 4 groups

Sl.No. 1

Type General purpose register

15

14

13

12

11

10

9

8

7

6

OF

DF

IF

TF

SF

ZF

Register width

5

4 AF

3

2

1

PF

CF

Name of register

16 bit

AX, BX, CX, DX

8 bit

AL, AH, BL, BH, CL, CH, DL, DH

2

Pointer register

16 bit

SP, BP

3

Index register

16 bit

SI, DI

4

Instruction Pointer

16 bit

IP

5

Segment register

16 bit

CS, DS, SS, ES

6

Flag (PSW)

16 bit

Flag register

0

78

Registers and Special Functions Register

Name of the Register

Special Function

AX

16-bit Accumulator

Stores the 16-bit results of arithmetic and logic operations

AL

8-bit Accumulator

Stores the 8-bit results of arithmetic and logic operations

BX

Base register

Used to hold base value in base addressing mode to access memory data

CX

Count Register

Used to hold the count value in SHIFT, ROTATE and LOOP instructions

DX

Data Register

Used to hold data for multiplication and division operations

SP

Stack Pointer

Used to hold the offset address of top stack memory

BP

Base Pointer

Used to hold the base value in base addressing using SS register to access data from stack memory

SI

Source Index

Used to hold index value of source operand (data) for string instructions

DI

Data Index

Used to hold the index value of destination operand (data) for string 79 operations

Bus Interface Unit • Main Components are – Instruction Queue – Segment Registers – Instruction Pointer

80

∑

Memory Interface

EXTRA SEGMENT (ES)

BIU

CODE SEGMENT (CS)

6

5

4

3

2

1

STACK SEGMENT (SS) DATA SEGMENT (DS)

Instruction Queue

INSTRUCTION POINTER (IP)

Instruction Decoder AH

AL

BH

BL

CH

CL

DH

DL

ARITHMETIC LOGIC UNIT

CONTROL SYSTEM

STACK POINTER (SP) BASE POINTER (BP)

SOURCE INDEX (SI) DESTINATION INDEX (DI)

OPERANDS FLAGS

EU

81

Instruction Queue • 8086 employs parallel processing • When EU is busy decoding or executing current instruction, the buses of 8086 may not be in use. • At that time, BIU can use buses to fetch upto six instruction bytes for the following instructions • BIU stores these pre-fetched bytes in a FIFO register called Instruction Queue • When EU is ready for its next instruction, it simply reads the instruction from the queue in BIU

82

Pipelining • EU of 8086 does not have to wait in between for BIU to fetch next instruction byte from memory • So the presence of a queue in 8086 speeds up the processing • Fetching the next instruction while the current instruction executes is called pipelining 83

Memory Segmentation • 8086 has a 20-bit address bus • So it can address a maximum of 1MB of memory • 8086 can work with only four 64KB segments at a time within this 1MB range • These four memory segments are called – – – –

Code segment Stack segment Data segment Extra segment

84

Memory 64KB Memory Segment

1

00000H

2 3 4 4

Only 4 such segments can be addressed at a time

5 6 7

8 9

10

1MB Address Range

11

12 13

14 15 16

FFFFFH 85

Code Segment • That part of memory from where BIU is currently fetching instruction code bytes

Stack Segment  A section of memory set aside to store addresses and data while a subprogram executes

Data & Extra Segments  Used for storing data values to be used in the program 86

Memory Code Segment

1

00000H

2 3 4

Data & Extra Segments

5 6

7 8

9 10

1MB Address Range

11 12 13

14 15

Stack Segment

16

FFFFFH 87

Segment Registers • hold the upper 16-bits of the starting address for each of the segments • The four segment registers are – CS (Code Segment register) – DS (Data Segment register) – SS (Stack Segment register) – ES (Extra Segment register)

88

Memory 1

CS

1000 0H

00000H

Code Segment 3 4

DS ES

4000 0H 5000 0H

Data Segment Extra Segment

Starting Addresses of Segments

7 8 9 10

1MB Address Range

11 12

13 14 15

SS

F000 0H

Stack Segment

FFFFFH 89

• Address of a segment is of 20-bits • A segment register stores only upper 16-bits • BIU always inserts zeros for the lowest 4-bits of the 20-bit starting address. • E.g. if CS = 348AH, then the code segment will start at 348A0H • A 64-KB segment can be located anywhere in the memory, but will start at an address with zeros in the lowest 4-bits

90

Instruction Pointer (IP) Register • a 16-bit register • Holds 16-bit offset, of the next instruction byte in the code segment • BIU uses IP and CS registers to generate the 20-bit address of the instruction to be fetched from memory

91

Physical Address Calculation Start of Code Segment

1

348A0H

00000H

Data Segment

IP = 4214H

Code Byte

Memory

3

38AB4H

MOV AL, BL

4

Code Segment

Extra Segment 7 8 9

CS

IP Physical Address

348A0 H + 4214 H 38AB4 H

1MB Address Range

10 11 12

13 14 15

Stack Segment

FFFFFH 92

Stack Segment (SS) Register Stack Pointer (SP) Register

• Upper 16-bits of the starting address of stack segment is stored in SS register • It is located in BIU • SP register holds a 16-bit offset from the start of stack segment to the top of the stack • It is located in EU

93

Other Pointer & Index Registers • • • • •

Base Pointer (BP) register Source Index (SI) register Destination Index (DI) register Can be used for temporary storage of data Main use is to hold a 16-bit offset of a data word in one of the segments

94

ADDRESSING MODES OF 8086 95

Various Addressing Modes 1. 2. 3. 4. 5. 6. 7. 8.

Immediate Addressing Mode Register Addressing Mode Direct Addressing Mode Register Indirect Addressing Mode Index Addressing Mode Based Addressing Mode Based & Indexed Addressing Mode Based & Indexed with displacement Addressing Mode 9. Strings Addressing Mode 96

1. IMMEDIATE ADDRESSING MODE • The instruction will specify the name of the register which holds the data to be operated by the instruction.

• Source data is within the instruction • Ex: MOV AX,10AB

H



AL=ABH, AH=10H 97

2.REGISTER ADDRESSING MODE • In immediate addressing mode, an 8-bit or 16-bit data is specified as part of the instruction

• Ex: MOV AX,BL MOV AX,BL

H

H

98

3. DIRECT ADDRESSING MODE • Memory address is supplied with in the instruction • Mnemonic: MOV AH,[MEMBDS] AH [1000H] • But the memory address is not index or pointer register

99

4. REGISTER INDIRECT ADDRESSING MODE • Memory address is supplied in an index or pointer register • EX: MOV AX,[SI] ; AL [SI] ; AH [SI+1] JMP [DI] ; IP [DI+1: DI] INC BYTE PTR [BP] ; [BP] [BP]+1 DEC WORD PTR [BX] ; [BX+1:BX] [BX+1:BX]-1 100

5.Indexed Addressing Mode • Memory address is the sum of index register plus displacement MOV AX,[SI+2] AL [SI+2]; AH JMP [DI+2] IP [BX+3:BX+2]

[SI+3]

101

6. Based Addressing Mode • Memory address is the sum of the BX or BP base register plus a displacement within instruction • Ex: MOV AX,[BP+2] AL [BP+2]; AH [BP+3] JMP [BX+2] IP [BX+3:BX+2]

102

7.BASED & INDEX ADDRESSING MODES • Memory address is the sum of the index register & base register Ex: MOV AX,[BX+SI] ; AL [BX+SI] ; AH [BX+SI+1] JMP [BX+DI] ; IP [BX+DI+1 : BX+DI] INC BYTE PTR [BP+SI] ; [BP] [BP]+1 DEC WORD PTR [BP+DI] ; [BX+1:BX] [BX+1:BX]-1

103

8. BASED & INDEXED WITH DISPLACEMENT ADDRESSING MODE • Memory address is the sum of an index register , base register and displacement within instruction MOV AX,[BX+SI+6] ; AL

[BX+SI+6] ; AH

JMP [BX+DI+6] ;

IP

[BX+SI+7] [BX+DI+7 : BX+DI+6]

INC BYTE PTR [BP+SI+5] ; DEC WORD PTR [BP+DI+5] ;

104

9. Strings Addressing Mode • The memory source address is a register SI in the data segment, and the memory destination address is register DI in the extra segment • Ex: MOVSB

• If DF=0 SI DF=1 SI

[ES:DI]

SI+1 SI-1

[DS:SI]

, DI , DI

DI+1 DI-1 105

INSTRUCTION SET of 8086 106

Instruction set basics • Instruction:- An instruction is a binary pattern designed inside a microprocessor to perform a specific function. • Opcode:- It stands for operational code. It specifies the type of operation to be performed by CPU. It is the first field in the machine language instruction format. • E.g. 08 is the opcode for instruction “MOV X,Y”.

• Operand:- We can also say it as data on which operation should act. operands may be register values or memory values. The CPU executes the instructions using information present in this field. It may be 8-bit data or 16-bit data. 107

Instruction set basics • Assembler:- it converts the instruction into sequence of binary bits, so that this bits can be read by the processor.

• Mnemonics:- these are the symbolic codes for either instructions or commands to perform a particular function. • E.g. MOV, ADD, SUB etc.

108

Types of instruction set of 8086 microprocessor (1). Data Copy/Transfer instructions. (2). Arithmetic & Logical instructions. (3). Branch instructions.

(4). Loop instructions. (5). Machine Control instructions. (6). Flag Manipulation instructions. (7). Shift & Rotate instructions. (8). String instructions. 109

(1). Data copy/transfer instructions. (1). MOV Destination, Source • There will be transfer of data from source to destination. • Source can be register, memory location or immediate data. • Destination can be register or memory operand. • Both Source and Destination cannot be memory location or segment registers at the same time. • E.g. • (1). MOV CX, 037A H; • (2). MOV AL, BL; • (3). MOV BX, [0301 H]; 110

BEFORE EXECUTION AX

AFTER EXECUTION MOV BX,AX

2000H

BEFORE EXECUTION

BX

2000H

AFTER EXECUTION

AH

AL

AH

AL

BH

BL

BH

BL

CH

CL

CH

CL

DH

DL

DH

DL

MOV CL,M 40

40 40

111

Stack Pointer • It is a 16-bit register, contains the address of the data item currently on top of the stack. • Stack operation includes pushing (providing) data on to the stack and popping (taking)data from the stack. • Pushing operation decrements stack pointer and Popping operation increments stack pointer. i.e. there is a last in first out (LIFO) operation.

112

(2). Push Source • Source can be register, segment register or memory. • This instruction pushes the contents of specified source on to the stack. • In this stack pointer is decremented by 2. • The higher byte data is pushed first (SP-1). • Then lower byte data is pushed (SP-2). • • • •

E.g.: (1). PUSH AX; (2). PUSH DS; (3). PUSH [5000H]; 113

INITIAL POSITION

(1) STACK POINTER DECREMENTS SP & STORES HIGHER BYTE

(2) STACK POINTER

HIGHER BYTE

DECREMENTS SP & STORES LOWER BYTE (3) STACK POINTER

LOWER BYTE HIGHER BYTE 114

BEFORE EXECUTION SP

2002H

BH

CH

2000H

BL

10

DH

CL

50

DL

2001H 2002H

PUSH CX AFTER EXECUTION SP

2000H

BH

BL

CH DH

10

CL DL

2000H

50

2001H

10

50 2002H 115

(3) POP Destination • Destination can be register, segment register or memory. • This instruction pops (takes) the contents of specified destination. • In this stack pointer is incremented by 2. • The lower byte data is popped first (SP+1). • Then higher byte data is popped (SP+2).

• • • •

E.g. (1). POP AX; (2). POP DS; (3). POP [5000H]; 116

INITIAL POSITION AND READS LOWER BYTE (1) STACK POINTER

LOWER BYTE

INCREMENTS SP & READS HIGHER BYTE LOWER BYTE

(2) STACK POINTER

HIGHER BYTE

INCREMENTS SP LOWER BYTE

HIGHER BYTE (3) STACK POINTER 117

BEFORE EXECUTION SP BH

2000H

2000H

2001H

BL

POP BX

30 50

2002H

AFTER EXECUTION SP

2002H

BH

5 BL 0

2000H 30 2001H 50

30

2002H 118

(4). XCHG Destination, source; • This instruction exchanges contents of Source with destination. • It cannot exchange two memory locations directly. •The contents of AL are exchanged with BL. •The contents of AH are exchanged with BH. •E.g. (1). XCHG BX, AX; (2). XCHG [5000H],AX; 119

BEFORE EXECUTION

AFTER EXECUTION

AH 20 AL 40

AH 70

AL

80

BH 70 BL 80

BH 20

BL

40

XCHG AX,BX 120

(5)IN AL/AX, 8-bit/16-bit port address • It reads from the specified port address. • It copies data to accumulator from a port with 8bit or 16-bit address. • DX is the only register is allowed to carry port address. • E.g. (1). IN AL, 80H; (2). IN AX,DX; //DX contains address of 16-bit port. 121

BEFORE EXECUTION PORT 80H

10

AL

IN AL,80H AFTER EXECUTION

PORT 80H

10

AL

10 122

OUT 8-bit/16-bit port address, AL/AX • It writes to the specified port address. • It copies contents of accumulator to the port with 8-bit or 16-bit address. • DX is the only register is allowed to carry port address. • E.g. (1). OUT 80H,AL; (2). OUT DX,AX; //DX contains address of 16-bit port. 123

BEFORE EXECUTION PORT 50H

AL

10

40

OUT 50H,AL AFTER EXECUTION PORT 50H

40

AL

40 124

(7) XLAT • Also known as translate instruction. • It is used to find out codes in case of code conversion. • i.e. it translates code of the key pressed to the corresponding 7-segment code. • After execution this instruction contents of AL register always gets replaced. • E.g. XLAT;

125

8.LEA 16-bit register (source), address (dest.) • LEA Also known as Load Effective Address (LEA). • It loads effective address formed by the destination into the source register. • E.g. (1). LEA BX,Address; (2). LEA SI,Address[BX];

126

(9). LDS 16-bit register (source), address (dest.); (10). LES 16-bit register (source), address (dest.);

• LDS Also known as Load Data Segment (LDS). • LES Also known as Load Extra Segment (LES). • It loads the contents of DS (Data Segment) or ES (Extra Segment) & contents of the destination to the contents of source register.

• E.g. (1). LDS BX,5000H; (2). LES BX,5000H; 127

(1). LDS BX,5000H; (2). LES BX,5000H; 15

BX 20

0

10

7 0 10 5000H 20

DS/ES 40

30

5001H

30

5002H

40

5003H

128

(11). LAHF:- This instruction loads the AH register from the contents of lower byte of the flag register. • This command is used to observe the status of the all conditional flags of flag register. E.g. LAHF;

(12). SAHF:- This instruction sets or resets all conditional flags of flag register with respect to the corresponding bit positions. • If bit position in AH is 1 then related flag is set otherwise flag will be reset. E.g. SAHF; 129

PUSH & POP (13). PUSH F:- This instruction decrements the stack pointer by 2. • It copies contents of flag register to the memory location pointed by stack pointer. • E.g. PUSH F; (14). POP F:- This instruction increments the stack pointer by 2. • It copies contents of memory location pointed by stack pointer to the flag register. • E.g. POP F; 130

(2). Arithmetic Instructions • These instructions perform the operations like: • • • •

Addition, Subtraction, Increment, Decrement. 131

(2). Arithmetic Instructions (1). ADD destination, source; • This instruction adds the contents of source operand with the contents of destination operand. • The source may be immediate data, memory location or register. • The destination may be memory location or register. • The result is stored in destination operand. • AX is the default destination register.

• E.g. (1). ADD AX,2020H; (2). ADD AX,BX;

132

AFTER EXECUTION

BEFORE EXECUTION AH

10

AL

10

ADD AX,2020H

AH

30

AL

30

1010 +2020 3030 BEFORE EXECUTION

AFTER EXECUTION

AH

10

AL

10

AH

30

AL

30

BH

20

BL

20

BH

20

BL

20

ADD AX,BX

133

ADC destination, source • This instruction adds the contents of source operand with the contents of destination operand with carry flag bit. • The source may be immediate data, memory location or register. • The destination may be memory location or register. • The result is stored in destination operand. • AX is the default destination register.

• E.g. (1). ADC AX,2020H; (2). ADC AX,BX; 134

(3) INC source • This instruction increases the contents of source operand by 1. • The source may be memory location or register. • The source can not be immediate data. • The result is stored in the same place.

• E.g. (1). INC AX; (2). INC [5000H]; 135

BEFORE EXECUTION

AH

10

AL

10

AFTER EXECUTION

INC AX

BEFORE EXECUTION

5000H

1010

AH 10

AL

11

AFTER EXECUTION

INC [5000H]

5000H

1011 136

4. DEC source • This instruction decreases the contents of source operand by 1. • The source may be memory location or register. • The source can not be immediate data. • The result is stored in the same place.

• E.g. (1). DEC AX; (2). DEC [5000H]; 137

BEFORE EXECUTION

AH 10

AL

10

AFTER EXECUTION

DEC AX

1010

AL

09

AFTER EXECUTION

BEFORE EXECUTION

5000H

AH 10

DEC [5000H]

5000H

1009 138

(5) SUB destination, source; • This instruction subtracts the contents of source operand from contents of destination. • The source may be immediate data, memory location or register. • The destination may be memory location or register. • The result is stored in the destination place.

• E.g. (1). SUB AX,1000H; (2). SUB AX,BX; 139

BEFORE EXECUTION AH

20

AL

00

AFTER EXECUTION

SUB AX,1000H

AH

10

AL

00

2000 -1000 =1000

AFTER EXECUTION

BEFORE EXECUTION AH

20

AL

00

BH

10

BL

00

SUB AX,BX

AH

10

AL

00

BH

10

BL

00 140

(6). SBB destination, source; • Also known as Subtract with Borrow. • This instruction subtracts the contents of source operand & borrow from contents of destination operand. • The source may be immediate data, memory location or register. • The destination may be memory location or register. • The result is stored in the destination place.

• E.g. (1). SBB AX,1000H; (2). SBB AX,BX; 141

BEFORE EXECUTION

B 1

AFTER EXECUTION

SBB AX,1000H AH 10 AL

AH 20 AL 20

19

2020 - 1000 1020-1=1019 BEFORE EXECUTION

AFTER EXECUTION

B 1 AH

20

AL

20

BH

10

BL

10

SBB AX,BX

AH

10

AL

19

BH

10

BL

10 2050

142

(7). CMP destination, source • Also known as Compare. • This instruction compares the contents of source operand with the contents of destination operands. • The source may be immediate data, memory location or register. • The destination may be memory location or register. • Then resulting carry & zero flag will be set or reset. • E.g. (1). CMP AX,1000H; (2). CMP AX,BX; 143

D=S: CY=0,Z=1 D>S: CY=0,Z=0 D<S: CY=1,Z=0

BEFORE EXECUTION AH

10

AL

00

BH

10

BL

00

CMP AX,BX

BEFORE EXECUTION AH

10

AL

00

BH

00

BL

10

10

AL

00

BH

20

BL

00

CY

0

Z

1

AFTER EXECUTION CY

CMP AX,BX

BEFORE EXECUTION AH

AFTER EXECUTION

0

Z

0

AFTER EXECUTION

CMP AX,BX

CY

1

Z

0

144

 AAA (ASCII Adjust after Addition):  The data entered from the terminal is in ASCII format.  In ASCII, 0 – 9 are represented by 30H – 39H.  This instruction allows us to add the ASCII codes.  This instruction does not have any operand.

 Other ASCII Instructions:  AAS (ASCII Adjust after Subtraction)  AAM (ASCII Adjust after Multiplication)  AAD (ASCII Adjust Before Division) 145

• DAA (Decimal Adjust after Addition)

– It is used to make sure that the result of adding two BCD numbers is adjusted to be a correct BCD number. – It only works on AL register.

• DAS (Decimal Adjust after Subtraction) – It is used to make sure that the result of subtracting two BCD numbers is adjusted to be a correct BCD number. – It only works on AL register.

146

MUL operand • • • • • •

Unsigned Multiplication. Operand contents are positively signed. Operand may be general purpose register or memory location. If operand is of 8-bit then multiply it with contents of AL. If operand is of 16-bit then multiply it with contents of AX. Result is stored in accumulator (AX).

• E.g. (1). MUL BH

// AX= AL*BH; // (+3) * (+4) = +12.

•

// AX=AX*CX;

(2). MUL CX

147

IMUL operand • Signed Multiplication. • Operand contents are negatively signed. • Operand may be general purpose register, memory location or index register. • If operand is of 8-bit then multiply it with contents of AL. • If operand is of 16-bit then multiply it with contents of AX. • Result is stored in accumulator (AX).

• E.g. (1). IMUL BH

•

// AX= AL*BH;

// (-3) * (-4) = 12.

(2). IMUL CX // AX=AX*CX; 148

DIV operand • • • •

Unsigned Division. Operand may be register or memory. Operand contents are positively signed. Operand may be general purpose register or memory location. • AL=AX/Operand (8-bit/16-bit) & AH=Remainder.

• E.g. MOV AX, 0203 // AX=0203 •

MOV BL, 04

•

IDIV BL

// BL=04 // AL=0203/04=50 (i.e. AL=50 & AH=03) 149

IDIV operand • • • •

Signed Division. Operand may be register or memory. Operand contents are negatively signed. Operand may be general purpose register or memory location. • AL=AX/Operand (8-bit/16-bit) & AH=Remainder.

• E.g. MOV AX, -0203 •

MOV BL, 04

•

DIV BL

// AX=-0203 // BL=04 // AL=-0203/04=-50 (i.e. AL=-50 & AH=03) 150

Multiplication and Division Examples

151

152

153

154

LOGICAL (or) Bit Manipulation Instructions • These instructions are used at the bit level. • These instructions can be used for: – Testing a zero bit – Set or reset a bit – Shift bits across registers

155

Bit Manipulation Instructions(LOGICAL Instructions) • AND

– Especially used in clearing certain bits (masking) xxxx xxxx AND 0000 1111 = 0000 xxxx (clear the first four bits) – Examples: AND BL, 0FH

• OR – Used in setting certain bits

xxxx xxxx OR 0000 1111 = xxxx 1111 (Set the upper four bits) 156

• XOR – Used in Inverting bits xxxx xxxx XOR 0000 1111 = xxxxx’x’x’x’ -Example: bit 5 of

Clear bits 0 and 1, set bits 6 and 7, invert register CL:

AND CL, FCH OR CL, C0H XOR CL, 20H

; ; ;

1111 1100B 1100 0000B 0010 0000B

157

SHL Instruction • The SHL (shift left) instruction performs a logical left shift on the destination operand, filling the lowest bit with 0.

0 CF

mov dl,5d

shl dl,1 158

SHR Instruction • The SHR (shift right) instruction performs a logical right shift on the destination operand. The highest bit position is filled with a zero. 0 CF

MOV DL,80d SHR DL,1 SHR DL,2

; DL = 40 ; DL = 10 159

SAR Instruction • SAR (shift arithmetic right) performs a right arithmetic shift on the destination operand.

CF

An arithmetic shift preserves the number's sign. MOV DL,-80 SAR DL,1 SAR DL,2

; DL = -40 ; DL = -10 160

Shifting left n bits multiplies the operand by 2n For example, 5 * 22 = 20

Shifting right n bits divides the operand by 2n

For example, 80 / 23 = 10

mov dl,5

Before:

00000101

=5

shl dl,1

After:

00001010

= 10

161

ROL Instruction • ROL (rotate) shifts each bit to the left • The highest bit is copied into both the Carry flag and into the lowest bit • No bits are lost

CF

MOV Al,11110000b ROL Al,1

; AL = 11100001b

MOV Dl,3Fh ROL Dl,4

; DL = F3h 162

ROR Instruction • ROR (rotate right) shifts each bit to the right • The lowest bit is copied into both the Carry flag and into the highest bit • No bits are lost

CF

MOV AL,11110000b ROR AL,1

; AL = 01111000b

MOV DL,3Fh ROR DL,4

; DL = F3h 163

RCL Instruction • RCL (rotate carry left) shifts each bit to the left • Copies the Carry flag to the least significant bit • Copies the most significant bit to the Carry flag CF

CLC MOV BL,88H RCL BL,1 RCL BL,1

; ; ; ;

CF = 0 CF,BL = 0 10001000b CF,BL = 1 00010000b CF,BL = 0 00100001b 164

RCR Instruction • RCR (rotate carry right) shifts each bit to the right • Copies the Carry flag to the most significant bit • Copies the least significant bit to the Carry flag CF

STC MOV AH,10H RCR AH,1

; CF = 1 ; CF,AH = 00010000 1 ; CF,AH = 10001000 0 165

Branching Instructions (or) Program Execution Transfer Instructions • These instructions cause change in the sequence of the execution of instruction. • This change can be through a condition or sometimes unconditional. • The conditions are represented by flags. 166

• CALL Des: – This instruction is used to call a subroutine or function or procedure. – The address of next instruction after CALL is saved onto stack.

• RET: – It returns the control from procedure to calling program. – Every CALL instruction should have a RET. 167

SUBROUTINE & SUBROUTINE HANDILING INSTRUCTIONS Main program Subroutine A First Instruction Call subroutine A Next instruction

Call subroutine A

Return

Next instruction

168

• JMP Des: – This instruction is used for unconditional jump from one place to another.

• Jxx Des (Conditional Jump): – All the conditional jumps follow some conditional statements or any instruction that affects the flag. 169

Conditional Jump Table Mnemonic

Meaning

JA

Jump if Above

JAE

Jump if Above or Equal

JB

Jump if Below

JBE

Jump if Below or Equal

JC

Jump if Carry

JE

Jump if Equal

JNC

Jump if Not Carry

JNE

Jump if Not Equal

JNZ

Jump if Not Zero

JPE

Jump if Parity Even

JPO

Jump if Parity Odd

JZ

Jump if Zero 170

• Loop Des: – This is a looping instruction.

– The number of times looping is required is placed in the CX register. – With each iteration, the contents of CX are decremented. – ZF is checked whether to loop again or not. 171

String Instructions • String in assembly language is just a sequentially stored bytes or words. • There are very strong set of string instructions in 8086. • By using these string instructions, the size of the program is considerably reduced.

172

• CMPS Des, Src: – It compares the string bytes or words.

• SCAS String: – It scans a string. – It compares the String with byte in AL or with word in AX. 173

• MOVS / MOVSB / MOVSW: – It causes moving of byte or word from one string to another. – In this instruction, the source string is in Data Segment and destination string is in Extra Segment. – SI and DI store the offset values for source and destination index. 174

• REP (Repeat): – This is an instruction prefix.

– It causes the repetition of the instruction until CX becomes zero. – E.g.: REP MOVSB STR1, STR2 • It copies byte by byte contents. • REP repeats the operation MOVSB until CX becomes zero. 175

Processor Control Instructions • These instructions control the processor itself. • 8086 allows to control certain control flags that: – causes the processing in a certain direction – processor synchronization if more than one microprocessor attached.

176

STC

– It sets the carry flag to 1. CLC – It clears the carry flag to 0. CMC – It complements the carry flag.

177

STD:  It sets the direction flag to 1.

 If it is set, string bytes are accessed from higher memory address to lower memory address.

CLD:  It clears the direction flag to 0.  If it is reset, the string bytes are accessed from lower memory address to higher memory address.

178

 HLT instruction – HALT processing The HLT instruction will cause the 8086 to stop fetching and executing instructions.

NOP instruction this instruction simply takes up three clock cycles and does no processing.

LOCK instruction this is a prefix to an instruction. This prefix makes sure that during execution of the instruction, control of system bus is not taken by other microprocessor.

WAIT instruction this instruction takes 8086 to an idle condition. The CPU will not do any processing during this. 179

INSTRUCTION SET-summary 1.DATA TRANSFER INSTRUCTIONS Mnemonic

Meaning

Format

Operation

Move

Mov D,S

(S)  (D)

Exchange

XCHG D,S

(S)

Load Effective Address

LEA Reg16,EA

EA 

pushes the operand into top of stack.

PUSH BX

POP

pops the operand from top of stack to Des.

POP BX

IN

transfers the operand from specified port to accumulator register.

IN AX,0028

OUT

transfers the operand from accumulator to specified port.

OUT 0028,BX

MOV XCHG LEA

PUSH

(D) (Reg16)

180

2. ARITHMETIC INSTRUCTIONS Mnemonic

SUB

Meaning Subtract

Format

SUB D,S

Operation (D) - (S)  Borrow

(D)



(CF)

(D) - (S) - (CF) 

(D)

SBB

Subtract with borrow

SBB D,S

DEC

Decrement by one

DEC D

NEG

Negate

NEG D

DAS

Decimal adjust for subtraction

DAS

Convert the result in AL to packed decimal format

AAS

ASCII adjust for subtraction

AAS

(AL) difference (AH) dec by 1 if borrow

ADD

Addition

ADD D,S

(S)+(D)

ADC

Add with carry

ADC D,S

(S)+(D)+(CF)

INC

Increment by one

INC D

(D)+1  (D)

AAA

ASCII adjust for addition

AAA

If the sum is >9, AH

Decimal adjust for addition

DAA

DAA

(D) - 1 

(D)

 (D)  (D)

carry  (CF) carry  (CF)

is incremented by 1 Adjust AL for decimal Packed BCD 181

3. Bit Manipulation Instructions(Logical Instructions) Mnemonic

Meaning

Format

Operation

AND

Logical AND

AND D,S

(S) · (D) → (D)

OR

Logical Inclusive OR

OR D,S

(S)+(D) → (D)

XOR

Logical Exclusive OR

XOR D,S

(S) + (D)→(D)

NOT

LOGICAL NOT

NOT D

(D) → (D)

182

Shift & Rotate Instructions Mnemonic SAL/SHL

Meaning

Format

Shift arithmetic Left/ Shift Logical left

SAL/SHL D, Count

SHR

Shift logical right

SHR D, Count

SAR

Shift arithmetic right

SAR D, Count

Mnemonic

Meaning

Format

ROL ROR

Rotate Left

ROL D,Count

Rotate Right

ROR D,Count

RCL

Rotate Left through Carry

RCL D,Count

RCR

Rotate right through Carry

RCR D,Count 183

4. Branching or PROGRAM EXECUTION TRANSFER INSTRUCTIONS • CALL - call a subroutine • RET - returns the control from procedure to calling program

• JMP Des – Unconditional Jump • Jxx Des – conditional Jump (ex: JC 8000) • Loop Des

184

5. STRING INSTRUCTIONS • CMPS Des, Src - compares the string bytes • SCAS String - scans a string • MOVS / MOVSB / MOVSW - moving of byte or word • REP (Repeat) - repetition of the instruction

185

6. PROCESSOR CONTROL INSTRUCTIONS • • • • • • • • •

STC – set the carry flag (CF=1) CLC – clear the carry flag (CF=0) STD – set the direction flag (DF=1) CLD – clear the direction flag (DF=0) HLT – stop fetching & execution NOP – no operation(no processing) LOCK - control of system bus is not taken by other µP WAIT - CPU will not do any processing ESC - µP does NOP or access a data from memory for coprocessor 186

Assembler Directives 187

Directives Expansion

188

• ASSUME Directive - The ASSUME directive is used to tell the assembler that the name of the logical segment should be used for a specified segment. • DB(define byte) - DB directive is used to declare a byte type variable or to store a byte in memory location. • DW(define word) - The DW directive is used to define a variable of type word or to reserve storage location of type word in memory. 189

• DD(define double word) :This directive is used to declare a variable of type double word or restore memory locations which can be accessed as type double word. • DQ (define quadword) :This directive is used to tell the assembler to declare a variable 4 words in length or to reserve 4 words of storage in memory . • DT (define ten bytes):It is used to inform the assembler to define a variable which is 10 bytes in length or to reserve 10 bytes of storage in memory. 190

• END- End program .This directive indicates the assembler that this is the end of the program module. The assembler ignores any statements after an END directive. • ENDP- End procedure: It indicates the end of the procedure (subroutine) to the assembler. • ENDS-End Segment: This directive is used with the name of the segment to indicate the end of that logical segment. • EQU - This EQU directive is used to give a name to some value or to a symbol. 191

• PROC - The PROC directive is used to identify the start of a procedure. • PTR -This PTR operator is used to assign a specific type of a variable or to a label. • ORG -Originate : The ORG statement changes the starting offset address of the data.

192

Directives examples • • • • •

ASSUME CS:CODE cs=> code segment ORG 3000 NAME DB ‘THOMAS’ POINTER DD 12341234H FACTOR EQU 03H

193

Assembly Language Programming(ALP) 8086 194

Program 1: Increment an 8-bit number • MOV AL, 05H • INC AL

Move 8-bit data to AL. Increment AL.

Program 2: Increment an 16-bit number • MOV AX, 0005H • INC AX

Move 16-bit data to AX. Increment AX.

195

Program 3: Decrement an 8-bit number • MOV AL, 05H • DEC AL

Move 8-bit data to AL. Decrement AL.

Program 4: Decrement an 16-bit number • MOV AX, 0005H • DEC AX

Move 16-bit data to AX. Decrement AX.

196

Program 5: 1’s complement of an 8-bit number. • MOV AL, 05H • NOT AL

Move 8-bit data to AL. Complement AL.

Program 6: 1’s complement of a 16-bit number. • MOV AX, 0005H • NOT AX

Move 16-bit data to AX. Complement AX.

197

Program 7: 2’s complement of an 8-bit number. • MOV AL, 05H • NOT AL • INC AL

Move 8-bit data to AL. Complement AL. Increment AL

Program 8: 2’s complement of a 16-bit number. • MOV AX, 0005H • NOT AX • INC AX

Move 16-bit data to AX. Complement AX. Increment AX 198

Program 7: 2’s complement of an 8-bit number. • MOV AL, 05H • NOT AL • INC AL

Move 8-bit data to AL. Complement AL. Increment AL

Program 8: 2’s complement of a 16-bit number. • MOV AX, 0005H • NOT AX • INC AX

Move 16-bit data to AX. Complement AX. Increment AX 199

Program 9: Add two 8-bit numbers MOV AL, 05H MOV BL, 03H ADD AL, BL

Move 1st 8-bit number to AL. Move 2nd 8-bit number to BL. Add BL with AL.

Program 10: Add two 16-bit numbers MOV AX, 0005H MOV BX, 0003H ADD AX, BX

Move 1st 16-bit number to AX. Move 2nd 16-bit number to BX. Add BX with AX. 200

Program 11: subtract two 8-bit numbers MOV AL, 05H MOV BL, 03H SUB AL, BL

Move 1st 8-bit number to AL. Move 2nd 8-bit number to BL. subtract BL from AL.

Program 12: subtract two 16-bit numbers MOV AX, 0005H MOV BX, 0003H SUB AX, BX

Move 1st 16-bit number to AX. Move 2nd 16-bit number to BX. subtract BX from AX. 201

Program 13: Multiply two 8-bit unsigned numbers. MOV AL, 04H MOV BL, 02H MUL BL

Move 1st 8-bit number to AL. Move 2nd 8-bit number to BL. Multiply BL with AL and the result will be in AX.

Program 14: Multiply two 8-bit signed numbers. MOV AL, 04H MOV BL, 02H IMUL BL

Move 1st 8-bit number to AL. Move 2nd 8-bit number to BL. Multiply BL with AL and the result will be in AX. 202

Program 15: Multiply two 16-bit unsigned numbers. MOV AX, 0004H MOV BX, 0002H MUL BX

Move 1st 16-bit number to AL. Move 2nd 16-bit number to BL. Multiply BX with AX and the result will be in DX:AX {4*2=0008=> 08=> AX , 00=> DX}

Program 16: Divide two 16-bit unsigned numbers. MOV AX, 0004H Move 1st 16-bit number to AL. MOV BX, 0002H Move 2nd 16-bit number to BL. DIV BX Divide BX from AX and the result will be in AX & DX {4/2=0002=> 02=> AX ,00=>DX} (ie: Quotient => AX , Reminder => DX )

203

Detailed coding 16 BIT ADDITION

204

Detailed coding 16 BIT SUBTRACTION

205

16 BIT MULTIPLICATION

206

16 BIT DIVISION

207

SUM of N numbers

L1:

MOV AX,0000 MOV SI,1100 MOV DI,1200 MOV CX,0005 MOV DX,0000 ADD AX,[SI] INC SI INC DX CMP CX,DX JNZ L1 MOV [1200],AX HLT

5 NUMBERS TO BE TAKEN SUM

208

Average of N numbers

L1:

MOV AX,0000 MOV SI,1100 MOV DI,1200 MOV CX,0005 MOV DX,0000 ADD AX,[SI] INC SI INC DX CMP CX,DX JNZ L1 DIV CX MOV [1200],AX HLT

5 NUMBERS TO BE TAKEN AVERAGE

AX=AX/5(AVERAGE OF 5 NUMBERS) 209

FACTORIAL of N L1:

MOV CX,0005 5 Factorial=5*4*3*2*1=120 MOV DX,0000 MOV AX,0001 MUL CX DEC DX CMP CX,DX JNZ L1 MOV [1200],AX HLT 210

ASCENDING ORDER

211

212

DECENDING ORDER

Note: change the coding

JNB L1 into JB L1

in the LINE 10 213

LARGEST, smallest NUMBER IN AN ARRAY

214

LARGEST NUMBER

215

SMALLEST NUMBER

216

Modular Programming 217

• Generally , industry-programming projects consist of thousands of lines of instructions or operation code. • The size of the modules are reduced to a humanly comprehensible and manageable level. • Program is composed from several smaller modules. Modules could be developed by separate teams concurrently.OBJ modules (Object modules). • The .OBJ modules so produced are combined using a LINK program. • Modular programming techniques simplify the software development process 218

CHARACTERISTICS of module: 1. Each module is independent of other modules. 2. Each module has one input and one output. 3. A module is small in size. 4. Programming a single function per module is a goal Advantages of Modular Programming: • It is easy to write, test and debug a module. • Code can be reused. • The programmer can divide tasks. • Re-usable Modules can be re-used within a program DRAWBACKS: Modular programming requires extra time and memory 219

MODULAR PROGRAMMING: 1.LINKING & RELOCATION 2.STACKS 3.Procedures 4.Interrupts & Interrupt Routines 5.Macros 220

LINKING & RELOCATION 221

LINKER • A linker is a program used to join together several object files into one large object file. • The linker produces a link file which contains the binary codes for all the combined modules. The linker program is invoked using the following options. C> LINK or C>LINK MS.OBJ 222

• The loader is a part of the operating system and places codes into the memory after reading the ‘.exe’ file • A program called locator reallocates the linked file and creates a file for permanent location of codes in a standard format.

223

Creation and execution of a program

224

Loader ->Loader is a utility program which takes object code as input prepares it for execution and loads the executable code into the memory . ->Loader is actually responsible for initializing the process of execution. Functions of loaders: 1.It allocates the space for program in the memory(Allocation) 2.It resolves the code between the object modules(Linking) 3. some address dependent locations in the program, address constants must be adjusted according to allocated space(Relocation) 4. It also places all the machine instructions and data of corresponding programs and subroutines into the memory .(Loading) 225

Relocating loader (BSS Loader) • When a single subroutine is changed then all the subroutine needs to be reassembled. • The binary symbolic subroutine (BSS) loader used in IBM 7094 machine is relocating loader. • In BSS loader there are many procedure segments • The assembler reads one sourced program and assembles each procedure segment independently 226

• The output of the relocating loader is the object program • The assembler takes the source program as input; this source program may call some external routines. SEGMENT COMBINATION: ASM-86 assembler regulating the way segments with the same name are concatenated & sometimes they are overlaid. Form of segment directive: Segment name SEGEMENT Combine-type Possible combine-type are: • PUBLIC • COMMON • STACK • AT • MEMORY 227

Procedures 228

• Procedure is a part of code that can be called from your program in order to make some specific task. Procedures make program more structural and easier to understand. • syntax for procedure declaration: name PROC …………. ; here goes the code …………. ; of the procedure ... RET name ENDP

here PROC is the procedure name.(used in top & bottom) RET - used to return from OS. CALL-call a procedure PROC & ENDP – complier directives CALL & RET - instructions

229

EXAMPLE 1 (call a procedure) ORG 100h CALL m1 MOV AX, 2 RET ;

return to operating system.

m1 PROC MOV BX, 5 RET ; return to caller. m1 ENDP END • The above example calls procedure m1, does MOV BX, 5 & returns to the next instruction after CALL: MOV AX, 2. 230

Example 2 : several ways to pass parameters to procedure ORG 100h MOV AL, 1 MOV BL, 2 CALL m2 CALL m2 CALL m2 CALL m2 RET m2 PROC MUL BL RET m2 ENDP END

; return to operating system.

; AX = AL * BL. ; return to caller. value of AL register is update every time the procedure is called. final result in AX register is 16 (or 10h) 231

232

• Stack is an area of memory for keeping temporary data. • STACK is used by CALL & RET instructions. PUSH -stores 16 bit value in the stack. POP -gets 16 bit value from the stack. • PUSH and POP instruction are especially useful because we don't have too much registers to operate 1. Store original value of the register in stack (using PUSH). 2. Use the register for any purpose. 3. Restore the original value of the register from stack (using POP). 233

Example-1 (store value in STACK using PUSH & POP) ORG 100h MOV AX, 1234h PUSH AX ; store value of AX in stack. MOV AX, 5678h ; modify the AX value. POP AX ; restore the original value of AX. RET END 234

Example 2: use of the stack is for exchanging the values ORG 100h MOV AX, 1212h ; store 1212h in AX. MOV BX, 3434h ; store 3434h in BX PUSH AX ; store value of AX in stack. PUSH BX ; store value of BX in stack. POP AX ; set AX to original value of BX. POP BX ; set BX to original value of AX. RET END push 1212h and then 3434h, on pop we will first get 3434h and only after it 1212h 235

MACROS 236

• Macros are just like procedures, but not really. • Macros exist only until your code is compiled • After compilation all macros are replaced with real instructions • several macros to make coding easier(Reduce large & complex programs) Example (Macro definition) name MACRO [parameters,...] ENDM 237

Example1 : Macro Definitions SAVE

MACRO PUSH AX PUSH BX PUSH CX ENDM

RETREIVE

MACRO POP CX POP BX POP AX ENDM

definition of MACRO name SAVE

Another definition of MACRO name

RETREIVE

238

239

MACROS with Parameters Example: COPY MACRO x, y

; macro named

COPY with

2 parameters{x, y}

PUSH AX MOV AX, x MOV y, AX POP AX ENDM 240

INTERRUPTS & INTERRUPT SERVICE ROUTINE(ISR) 241

INTERRUPT & ISR ? • ‘Interrupts’ is to break the sequence of operation. • While the CPU is executing a program, on ‘interrupt’ breaks the normal sequence of execution of instructions, diverts its execution to some other program called Interrupt Service Routine (ISR)

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243

244

245

• Maskable Interrupt: An Interrupt that can be disabled or ignored by the instructions of CPU are called as Maskable Interrupt. • Non- Maskable Interrupt: An interrupt that cannot be disabled or ignored by the instructions of CPU are called as Non- Maskable Interrupt. • Software interrupts are machine instructions that amount to a call to the designated interrupt subroutine, usually identified by interrupt number. Ex: INT0 - INT255 246

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248

249

250

251

INTERRUPT VECTOR TABLE 256 INTERRUPTS OF 8086 ARE DIVIDED IN TO 3 GROUPS 1. TYPE 0 TO TYPE 4 INTERRUPTSThese Are Used For Fixed Operations And Hence Are Called Dedicated Interrupts 2. TYPE 5 TO TYPE 31 INTERRUPTS Not Used By 8086,reserved For Higher Processors Like 80286 80386 Etc 3. TYPE 32 TO 255 INTERRUPTS Available For User, called User Defined Interrupts These Can Be H/W Interrupts And Activated Through Intr Line Or Can Be 252 S/W Interrupts.

Type – 0 Divide Error Interrupt Quotient is too large cant be fit in AL/AX or Divide By Zero

{AX/0=∞}

Type –1 Single Step Interrupt used for executing the program in single step mode by setting Trap Flag To Set Trap Flag PUSHF MOV BP,SP OR [BP+0],0100H;SET BIT8 POPF

Type – 2 Non Maskable Interrupt This Interrupt is used for executing ISR of NMI Pin (Positive Egde Signal). NMI cant be masked by S/W

Type – 3 Break Point Interrupt used for providing BREAK POINTS in the program

Type – 4 Over Flow Interrupt used to handle any Overflow Error after signed arithmetic 253

PRIORITY OF INTERRUPTS Interrupt Type

Priority

INT0, INT3-INT 255,

Highest

NMI(INT2) INTR SINGLE STEP

Lowest

254

Byte & String Manipulation 255

Move,

compare,

store,

load,

scan

Refer String Instructions in Instruction Set Slide No: 160-163

256

Byte Manipulation Example 1: MOV AX,[1000] MOV BX,[1002] AND AX,BX MOV [2000],AX HLT Example 2: MOV AX,[1000] MOV BX,[1002] OR AX,BX MOV [2000],AX HLT

Example 3: MOV AX,[1000] MOV BX,[1002] XOR AX,BX MOV [2000],AX HLT Example 4: MOV AX,[1000] NOT AX MOV [2000],AX HLT 257

STRING MANIPULATION 1. Copying a string (MOV SB)

L1

MOV CX,0003 MOV SI,1000 MOV DI,2000 CLD MOV SB DEC CX JNZ L1 HLT

copy 3 memory locations

decrement CX

258

2. Find & Replace

259