Rr322203-microprocessors--and--microcontrollers

Set No. 1

Code No: RR322203

III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2008 MICROPROCESSORS AND MICROCONTROLLERS (Instrumentation & Control Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. (a) Give the 8085 compatible flags of 8086 processors? Discuss the design of each flag? (b) List out segmentation resisters of 8086? Explain how 8086 provides 1 MB memory address space using the segment registers? What is the purpose of extra segment? [8+8] 2. (a) What is a recursive procedure? Write a recursive procedure to calculate the factorial of number N, where N is a two-digit Hex number? (b) What are the loop instructions of 8086? Explain the use of DF flag in the execution of string instructions. [9+7] 3. Describe the function of the following pins in 8086 maximum mode of operation. (a) T EST (b) RQ/GT0 and RQ/GT1 (c) QS0 & QS1 (d) S0 , S1 , S2

[2+4+4+6]

4. Interface a 12-bit DAC to 8255 with an address map of 0C00H to 0C03H. The DAC provides output in the range of +5V to -5V. Write the instruction sequence. (a) For generating a square wave with a peak to peak voltage of 4V and the frequency will be selected from memory location ‘F’. (b) For generating a triangular wave with a maximum voltage of +3V and a minimum of -2V. [6+10] 5. (a) Draw the circuit of TTL to RS232 and explain the necessity of this interface. (b) Draw necessary circuit to interface 8251 to an 8086 based system with an address 0A0H. Write the sequence of instructions to initialize 8251 for synchronous transmission with odd parity, single SYNC character, 8-bit data character? [6+10] 6. With detailed hardware and the associated algorithm, explain how a real time clock will be implemented in an 8086 based system. [16] 7. (a) With a neat sketch explain the function of memory array of PROM? (b) Draw the basic cell structure of EPROM and explain the principle of operation? 1 of 2

Set No. 1

Code No: RR322203

(c) Distinguish between EPROM and E 2 PROM? Mention their application areas? [5+5+6] 8. (a) Discuss the interrupt structure of 8051? Mention the priority? Explain how least priority is made as highest priority? (b) Explain the support given in 8051 instruction set to handle bit addressable RAM? [8+8] ⋆⋆⋆⋆⋆

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Set No. 2

Code No: RR322203

III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2008 MICROPROCESSORS AND MICROCONTROLLERS (Instrumentation & Control Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. (a) Discuss the general functions of all general-purpose resisters of 8086? Explain the special function of each resister and instruction support for these functions. (b) What is the use of segmentation? Discuss one application area? Explain how segmentation provides efficient task switching mechanism? [10+6] 2. (a) What is a recursive procedure? Write a recursive procedure to calculate the factorial of number N, where N is a two-digit Hex number? (b) What are the loop instructions of 8086? Explain the use of DF flag in the execution of string instructions. [9+7] 3. (a) What is the difference between HALT state and HOLD state? Discuss the status of different control pins of 8086 in both the states? (b) Explain how an 8086 enters into Wait State? How many wait states can be inserted in a machine cycle? [10+6] 4. Write the necessary instruction sequence to initialize 8255 with address 0C00H to 0C03H for the following combinations. (a) Port A as input port in mode 1 and port B as input port in mode 1 without the interrupt driven i/o. (b) Port A in mode 2 as output port and port B as input port in mode 0 with interrupt driven i/o. (c) Port A in mode 0, port c upper half as input ports and port B as input port in mode 1 with interrupt driven i/o. (d) Port A as output port in mode 1 with active interrupt, port B as input port in mode 0 and port C lower half as output port in mode 0. [4 x 4 =16] 5. (a) Explain demand transfer mode and block transfer mode of 8237? (b) Show how 8237’s are cascaded to provide more number of DRQ’s and explain the operation? (c) Explain how memory to memory transfer is performed with 8237?

[5+6+5]

6. (a) What is the address map of interrupt address vector table? (b) Give the priority of 8086 interrupts, hardware and software? Explain why single step interrupt is having lower priority? [6+10]

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Set No. 2

Code No: RR322203

7. (a) With a neat sketch explain the internal organization of SRAM chip? List out the input and output pins? Discuss their function in a system? [8] (b) Explain the following terms with reference to DRAM i. ii. iii. iv.

Write cycle Access time Refresh Read cycle

[4x2=8]

8. Interface two 8255’s to 8051 with starting address of 0FFF0H? Show the hardware design? Write the instruction sequence to initialize all ports of 8255?s as input ports in mode 0. [16] ⋆⋆⋆⋆⋆

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Set No. 3

Code No: RR322203

III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2008 MICROPROCESSORS AND MICROCONTROLLERS (Instrumentation & Control Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. It is necessary to check the parity of the data byte in location 4000H:01FEH. If the parity is even store 00H otherwise store 0FFH in location 5000H:1000H. Give the instruction sequence for every addressing mode to achieve the above result. [16] 2. (a) Develop an assembly language program to find the average of ‘n’ elements of an array of 4-digit hex numbers? Round off the average to digits position? The value of ‘n’ is available in location ‘length’. (b) Develop an assembly language program to convert 4-digit hex to BCD? [8+8] 3. (a) Compare interrupted I/O and DMA data transfer schemes. (b) Describe the function of S0 to S7 pins of 8086 in maximum mode.

[6+10]

4. (a) What is BSR mode operation? How it is useful in controlling the interrupt initiated data transfer for mode 1 and 2? (b) Explain the transistor buffer circuit used to drive 7-segment LEDs?

[8+8]

5. (a) What is the difference between 20mA current loop and RS232-C standard? (b) Explain the necessity of RS232 to TTL interface and draw the circuit? (c) Draw the circuit of TTL to RS232 and explain the necessity of this interface. [6+5+5] 6. It is necessary to serve 18 interrupt requests using 8259’s. The address map for the 8259’s is given from 0A00H to 0A0FH. Show the complete interface with 8086 system bus? These 18 interrupts are to be requested from interrupt type 040H on words, with edge trigged mode and auto end of interrupt. Give the initialization sequence for all 8259’s. [16] 7. In an SDK-86 kit 128KB SRAM and 64KB EPROM is provided on system and provision for expansion of another 128KB SRAM is given. The on system SRAM address starts from 00000H and that of EPROM ends with FFFFFH. The expansion slot address map is from 80000H to 9FFFFH. The size of SRAM chip is 64KB. EPROM chip size is 16KB. Give the complete memory interface and also the address map for individual chips? [16] 8. Draw and discuss the formats and bit definitions of the following SFR’s in 8051 microcontroller? (a) PCON 1 of 2

Set No. 3

Code No: RR322203 (b) PSW (c) IP (d) TMOD

[4x4=16] ⋆⋆⋆⋆⋆

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Set No. 4

Code No: RR322203

III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2008 MICROPROCESSORS AND MICROCONTROLLERS (Instrumentation & Control Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. (a) Compare 8 bit processors and 16 bit processors from the architectural view. (b) Explain Overflow condition with 8 bit signed data. Generate Overflow flag using other flags of 8086? [6+10] 2. (a) Discuss various branch instruction of 8086 microprocessor, that are useful for relocation? (b) Using a do-while construct, develop a sequence of 8086 instructions that reads a character string from the keyboard and after pressing the enter key the character string is to be displayed again. [6+10] 3. The I/O circuitry in an 8086 based system consists of five I/O devices with one status signal for each device. Design the required hardware providing two address locations to each device, one for status and other for data. In the range 0F00H to 0FOFH. Write an instruction sequence to test the status of each device and store it. [16] 4. (a) What is BSR mode operation? How it is useful in controlling the interrupt initiated data transfer for mode 1 and 2? (b) Explain the transistor buffer circuit used to drive 7-segment LEDs?

[8+8]

5. (a) How do we connect RS-232C equipment i. To data terminal type devices? ii. To serial port of SDK -86, RS-232C connection? (b) Give the specifications of RS-232C.

[5+5+6]

6. Write an initialization sequence for an 8259 that is the only 8259 in an 8086 based system, with an even address of 0F0H that will cause. (a) Request to the edge triggered mode (b) IR0 request to an interrupt type 30 (c) SP/EN to output a disable signal to the data-bus transceivers. (d) The ISR bits to be cleared automatically at the end of second INTA pulse. (e) The IMR to be cleared. (f) The highest priority interrupt will be IR6 .

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[16]

Set No. 4

Code No: RR322203

7. In an SDK-86 kit 128KB SRAM and 64KB EPROM is provided on system and provision for expansion of another 128KB SRAM is given. The on system SRAM address starts from 00000H and that of EPROM ends with FFFFFH. The expansion slot address map is from 80000H to 9FFFFH. The size of SRAM chip is 64KB. EPROM chip size is 16KB. Give the complete memory interface and also the address map for individual chips? [16] 8. Draw and discuss the formats and bit definitions of the following SFR’s in 8051 microcontroller? (a) PCON (b) PSW (c) IP (d) TMOD

[4x4=16] ⋆⋆⋆⋆⋆

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