Topics Covered
PCB Design using Protel 99 Gordon Wyeth University of Queensland
Introducing Protel
• Run-through tutorial of Protel 99 SE. Complete notes available on web page. • Notes on design rules to use for our PCB manufacturer. • Tips on laying out PCBs in general.
Starting a Design • Choose an Access style database
Schematic Capture
Create an Empty Sheet • Work with a sheet size to suit documentation standard. • Typically use A4 for Team Project.
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Locate the Components • Standard components are stored in libraries. • You can access most major parts by part number. • Some parts are generic (e.g. resistors, capacitors). • ITEE electronics workshop has edited libraries: http://www.itee.uq.edu.au/~etsg/ > Electronics workshop > Protel99 libraries
Placing the Parts • Orient the parts correctly – Spacebar rotates – X flips horizontally, Y flips vertically
• Place all your components first. • Follow your diagram.
Part Attributes • Very important! Set the footprint of the part to the correct value. • The footprint is the description of the physical shape of the component. • For semiconductors consult the datasheet – e.g. TO220, PLCC68, SM08, DIP14. • For resistors and capacitors choose from generic footprints – e.g. AXIAL0.4, RADIAL0.2
Wire up the Schematic • Be sure to end wires right on component ends. • Add nodes to wires that are meant to join. • Net labels identify key nets such as power and ground.
12V
R1 100K
R3 1K
R4 1K
R
Y1 C2
1 2
20n
CON2
C1 20n
Q2
Q1 2N3904 2N3904 GND
Electrical Rule Check • Each pin in a library component is defined as input, output, I/O, power, etc. • ERC checks that component connections are sensible – unconnected inputs, outputs connected together, no power
Create a PCB File • Use the PCB wizard to create your empty board. • Use the custom board option and set size to suit.
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Transfer the Design • Make sure that the appropriate footprint libraries are loaded. • Use the Update PCB dialog to load parts and nets from schematic.
Routing Design Rules • Protel 99 Path = Design > Rules > Routing • Clearance Constraint = 10mil • Routing Via Style – Preferred = 50mil dia / 20mil hole – Minimum = 30mil dia / 12mil hole
• Width Constraint – Preferred = 12mil – Minimum = 10mil – Use thicker tracks for less resistance and inductance
Design Options • Protel 99 Path = Design > Options > Options • Grids – Snap X = 25mil – Snap Y = 25mil – Component X = 25mil – Component Y = 25mil
• Measurement Unit = Imperial inches
Set the Layers • Layers separate physically and electrically different parts. • Use top and bottom layer. • Use mechanical layers for holes and cutouts.
Design Rules for Manufacturing • Protel 99 Path = Design > Rules > Manufacturing > • Minimum hole size = 12mil – Define Hole Sizes in 4mil increments
• Minimum Annular Ring = 10mil • Polygon Connect Style – – – – – –
Rule attributes: Relief Connect Conductor Width: 15mil Conductors: 4 Angle: 90 degrees Filter Kind: Whole Board Pwr Plane Clearance: 20mil
Position the Parts • Keep net lengths to a minumum. • Cross nets as little as possible. • Beware part outlines – parts may be physcially larger. • Use spacing and alignment tools.
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AutoRouting • Autorouting can be a quick start but is often a nuisance. • Will do “silly” routing. • Does not optimise power nets.
Design Rule Check • Design Rule Check produces a DRC file which gives errors in clearances and track widths. • Errors will be highlighted in green on PCB file.
Manual Routing • Very effective system for placing tracks. • Net information and design rules will prevent you making routing errors. • Resulting board is usually far superior.
Routing Power Nets
• Aim for:
• Not this: • Use decoupling capacitors.
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