N Type Metal Oxide Semiconductors
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N Type Metal Oxide Semiconductors
Group Members
Adnan Irshad
Reg : IT171035
Arish Ali
Reg : IT171052
Muhammad Zeeshan
Reg : IT171012
Ahmad Sarvar
Reg : IT171013
Hamza Shoukat
Reg : IT171003
Mohsin Ali
Reg : IT171036
Presentation’s Outline
Introduction to CMOS to understands NMOS
NMOS
NMOS Structure
NMOS Regions
Impacts of Width and Length on NMOS
Purpose of NMOS
Comparison of NMOS with PMOS
Summary
Introduction to CMOS
The term CMOS stands for “Complementary Metal Oxide Semiconductor”.
CMOS technology is one of the most popular technology in the computer chip design industry.
Complementary Metal Oxide Semiconductor transistor consists P-channel MOS (PMOS) and N-channel MOS (NMOS).
In CMOS, NMOS transistor used to control the high level(1) connection to ground at low level(0).
CMOS Diagram To Understand NMOS
NMOS
NMOS stands for “n-type Metal Oxide Semiconductor”. It is pronounced as en-moss.
It is a type of semiconductor that charges negatively. So that transistors are turned ON/OFF by the movement of electrons.
NMOS is a four terminal device and operates at the high logic.
The NMOS transistor works on the base of G’s value which is called Gate.
D
G
B S
NMOS Structure
The NMOS is fabricated on a p-type substance, which is a single-crystal silicon wafer that provides physical support for the device. Two heavily doped n-type regions, are created in the substrate, indicated in the figure as:
n+ Source (‘S’)
n+ Drain (‘D’)
A layer of Silicon Dioxide (SiO2) which is good insulator with thickness
is placed on the top of the substrate.
The Gate is heavily doped material
Body B
Source S
Gate G IG=0
called polysilicon(Poly).
L is the length between the Source(S)
IS
and Drain(D).
The Body(B) of NMOS is connected to the lowest voltage.
Drain D ID=IS
Metal oxide
n+
L P-Substrate
n+
W
NMOS Physical Structure
Cross-Section. Typically L = 0.1 to 3 mm, W = 0.2 to 100 mm, and the thickness of the oxide layer (tox) is in the range of 2 to 50 nm.
NMOS V-I Characteristics
Basically we have two regions: the Triode/Linear region at smaller VDS and the saturation region at higher VDS but Cut-Off and Deeply Triode regions also occurs in NMOS.
ID=Drain Current , IDS=Drain Source Current , VDS=Drain Source Voltage , VGS=Gage Source Voltage ID
IDS
Linear/Triode Region
Regions
Saturation ID for VGS = maximum Region (VDD)
If VGS = 0. VDS VDD
VDS < VGS - VTH
VDS > VGS - VTH
Linear/Triode Region
Saturation Region
VDS << Vo Deeply Triode Region
VGS > VTH Cut-off Region
Arish Ali
Linear / Triode Region
If the gate voltage is above threshold, but the source to drain voltage is small, the charge under the gate is uniform, and carries current much like a resistor.
We call the boundary between the regions VDSat.
VGS > VTH
sourc e
+
n
AND
VDS < VGS - VTH
ID
Linear/Triode Region
VGS
gate
oxide insulator
drai n n
P
VDS VDSat
Linear / Triode Region
If
VGS > VTH
and VDS < VGS - VTH , then
ID = kn {2( VGS – VTH )VDS – VDS . VDS }
Here Kn is the conduction parameter.
kn = µn Cox W/2L
µn
Cox = The Capacitance of Silicon Diode
W
= Width of channel
L
= Distance between Source(S) and Drain(D).
= Electron Mobility in the channel
Body B
Source S
Gate G
IG=0
I
Drain D
ID=IS
S
Metal oxide
n+
L P-Substrate
n+
W
Saturation Region
When the voltage from the source to the drain gets high enough, the channel gets “pinched” In the pinch region.
The carriers move very fast, but the current is determined by the triangular region, which does not change much as the drain voltage is changed, so the current saturates. Saturation Region ID We call the boundary between the regions VDSat. VGS
-
sourc e
+
gate
drain n
oxide insulator
n
P
VDS VDSat
Saturation Region
If
VGS > VTH
AND VDS > VGS - VTH
ID = kn {( VGS – VTH ). ( VGS – VTH )}
Here Kn is the conduction parameter.
kn = µn Cox W/2L
𝑉DS
= Drain Source Voltage 𝑉D- 𝑉s
𝑉 GS
= Gate Source Voltage
𝑉 TH
= Thresh Voltage
𝑉G- 𝑉s
, then
Muhammad Zeeshan
Cut-off Region Region
If
The Sub-threshold or cut-off mode whenever VGS < VTH .
VGS < VTH
then, The cut-off Mode Occurs.
where VTH is the threshold voltage. In this mode the device is essentially off, and in the ideal case there is no current flowing through the device.
NMOS As Resistor
If
VDS
is very small then the drain source terminal
functions as Resistor. kn {( VGS – VTH ). ( VGS – VTH )}
For the very small 𝑉 DS the current equation will be as.
RON = 𝑉DS / 𝐼 D
RON = 1 / kn( VGS – VTH )
NMOS As Resistor
When the voltage applied between drain and source, VDS, is kept very small. The device operates as a linear resistor whose value is controlled by VGS.
Ahmad Sarvar
Impacts of length and Width on NMOS Gate Length
The gate length, L, is the distance the electrons have to travel. It is generally set at the minimum value (e.g. .18 micron) for nearly all logic transistors
As the gate length gets shorter, the gate capacitance gets smaller Gate As the gate length gets shorter, Body Source G the current drive of the transistor IG=0 B S
Drain D
also gets larger.
However, leakage current also increases.
ID=IS
IS
Metal oxide
n+
L P-Substrate
n+
W
Impacts of length and Width on NMOS Gate Width
The gate width, W, is determined by the circuit designer.
One uses a wider gate to get more current (and thus charge a capacitor faster).
For example doubling W is the same as putting two equal-sized transistors
Body B in parallel, and thus doubles the current
Source S
Gate G
IG=0
Drain D
at any given voltage.
ID=IS
IS
Metal oxide
n+
L P-Substrate
n+
W
Purpose of NMOS
NMOS is fast than PMOS.
NMOS is used as a Switching and Amplification.
We use it where we have to discharge the some load.
The NMOS switching is great for discharging a node to ground. When VIN goes high (VDD ) then VOUT goes from VDD to ground. When it reaches VDD /2 we call that time the stage delay.
NMOS is used to built CMOS devices.
In CMOS devices NMOS is used as NOT Gate.
Hamza Shoukat
Comparison of NMOS with PMOS NMOS
PMOS
An NMOS the n-type semiconductor, so the charges free to move along the channel are negatively charged (electrons). In this device the gate controls electron flow from source to drain. source N-MOS n
oxide insulator P
drain n
In a PMOS free charges which move from endto-end are positively charged (holes).
In this device the gate controls hole flow from source to drain.
source P-MOS
gate
p
drain p
n-type Si
Comparison of NMOS with PMOS NMOS
PMOS
D
G
B
S
G
B
S D NMOS-Circuit
PMOS-Circuit
Comparison of NMOS with PMOS NMOS “Body” – p-type Source – n-type Drain – n-type VGS – positive VT – positive VDS – positive ID – positive (into drain) NMOS V-I Characteristics
“Body” Source Drain VGS VT VDS ID
PMOS – n-type – p-type – p-type – negative – negative – negative – negative (into drain)
PMOS V-I Characteristics ID
ID
VGS=3V
1 mA
(for IDS = 1mA)
(for IDS = -1mA)
VGS=0 1
2
3
4
VGS= 3V
1 mA
VDS
VGS=0 1
2
3
4
VDS
Mohsin Ali
Summary NMOS
Working
NMOS is the four terminal electronic device. It is a type of semiconductor that charges negatively. So that transistors are turned ON/OFF by the movement of electrons.
NMOS is works on the basis of G’s value it is used in CMOS as a inverter.
Regions
NMOS have four regions. Which are: 1.
Linear / Triode Region
2.
Saturation Region
3.
Cut-off Region
4.
As Resistor Region
Summary VGS >
VTH and VDS < VGS − VTH : The Linear Region
The second mode of operation is the linear region when VGS > VTH and VDS < VGS − VTH. Where the current remains uniform.
ID = kn {2( VGS – VTH )VDS – VDS . VDS } VGS
> VTH and VDS > VGS − Vt: The Saturation Mode
The saturation mode occurs when VGS > VTH and VDS > VGS − VTH. In this mode the switch is on and conducting, however since drain voltage is higher than the gate voltage, part of the channel is turned off. ID = kn {( VGS – VTH ). ( VGS – VTH )}
Summary The
sub-threshold or cut-off mode; VGS < Vt:
where Vt is the threshold voltage. In this mode the device is essentially off, and in the ideal case there is no current flowing through the device.
NMOS As
Resistor
If VDS is very small then NMOS works as Resistor. RON = 𝑉 DS / 𝐼 D RON = 1 / kn( VGS – VTH )
Any Question !!!!
Thanks!
Group Members
Adnan Irshad
Reg : IT171035
Arish Ali
Reg : IT171052
Muhammad Zeeshan
Reg : IT171012
Ahmad Sarvar
Reg : IT171013
Hamza Shoukat
Reg : IT171003
Mohsin Ali
Reg : IT171036
Presentation’s Outline
Introduction to CMOS to understands NMOS
NMOS
NMOS Structure
NMOS Regions
Impacts of Width and Length on NMOS
Purpose of NMOS
Comparison of NMOS with PMOS
Summary
Introduction to CMOS
The term CMOS stands for “Complementary Metal Oxide Semiconductor”.
CMOS technology is one of the most popular technology in the computer chip design industry.
Complementary Metal Oxide Semiconductor transistor consists P-channel MOS (PMOS) and N-channel MOS (NMOS).
In CMOS, NMOS transistor used to control the high level(1) connection to ground at low level(0).
CMOS Diagram To Understand NMOS
NMOS
NMOS stands for “n-type Metal Oxide Semiconductor”. It is pronounced as en-moss.
It is a type of semiconductor that charges negatively. So that transistors are turned ON/OFF by the movement of electrons.
NMOS is a four terminal device and operates at the high logic.
The NMOS transistor works on the base of G’s value which is called Gate.
D
G
B S
NMOS Structure
The NMOS is fabricated on a p-type substance, which is a single-crystal silicon wafer that provides physical support for the device. Two heavily doped n-type regions, are created in the substrate, indicated in the figure as:
n+ Source (‘S’)
n+ Drain (‘D’)
A layer of Silicon Dioxide (SiO2) which is good insulator with thickness
is placed on the top of the substrate.
The Gate is heavily doped material
Body B
Source S
Gate G IG=0
called polysilicon(Poly).
L is the length between the Source(S)
IS
and Drain(D).
The Body(B) of NMOS is connected to the lowest voltage.
Drain D ID=IS
Metal oxide
n+
L P-Substrate
n+
W
NMOS Physical Structure
Cross-Section. Typically L = 0.1 to 3 mm, W = 0.2 to 100 mm, and the thickness of the oxide layer (tox) is in the range of 2 to 50 nm.
NMOS V-I Characteristics
Basically we have two regions: the Triode/Linear region at smaller VDS and the saturation region at higher VDS but Cut-Off and Deeply Triode regions also occurs in NMOS.
ID=Drain Current , IDS=Drain Source Current , VDS=Drain Source Voltage , VGS=Gage Source Voltage ID
IDS
Linear/Triode Region
Regions
Saturation ID for VGS = maximum Region (VDD)
If VGS = 0. VDS VDD
VDS < VGS - VTH
VDS > VGS - VTH
Linear/Triode Region
Saturation Region
VDS << Vo Deeply Triode Region
VGS > VTH Cut-off Region
Arish Ali
Linear / Triode Region
If the gate voltage is above threshold, but the source to drain voltage is small, the charge under the gate is uniform, and carries current much like a resistor.
We call the boundary between the regions VDSat.
VGS > VTH
sourc e
+
n
AND
VDS < VGS - VTH
ID
Linear/Triode Region
VGS
gate
oxide insulator
drai n n
P
VDS VDSat
Linear / Triode Region
If
VGS > VTH
and VDS < VGS - VTH , then
ID = kn {2( VGS – VTH )VDS – VDS . VDS }
Here Kn is the conduction parameter.
kn = µn Cox W/2L
µn
Cox = The Capacitance of Silicon Diode
W
= Width of channel
L
= Distance between Source(S) and Drain(D).
= Electron Mobility in the channel
Body B
Source S
Gate G
IG=0
I
Drain D
ID=IS
S
Metal oxide
n+
L P-Substrate
n+
W
Saturation Region
When the voltage from the source to the drain gets high enough, the channel gets “pinched” In the pinch region.
The carriers move very fast, but the current is determined by the triangular region, which does not change much as the drain voltage is changed, so the current saturates. Saturation Region ID We call the boundary between the regions VDSat. VGS
-
sourc e
+
gate
drain n
oxide insulator
n
P
VDS VDSat
Saturation Region
If
VGS > VTH
AND VDS > VGS - VTH
ID = kn {( VGS – VTH ). ( VGS – VTH )}
Here Kn is the conduction parameter.
kn = µn Cox W/2L
𝑉DS
= Drain Source Voltage 𝑉D- 𝑉s
𝑉 GS
= Gate Source Voltage
𝑉 TH
= Thresh Voltage
𝑉G- 𝑉s
, then
Muhammad Zeeshan
Cut-off Region Region
If
The Sub-threshold or cut-off mode whenever VGS < VTH .
VGS < VTH
then, The cut-off Mode Occurs.
where VTH is the threshold voltage. In this mode the device is essentially off, and in the ideal case there is no current flowing through the device.
NMOS As Resistor
If
VDS
is very small then the drain source terminal
functions as Resistor. kn {( VGS – VTH ). ( VGS – VTH )}
For the very small 𝑉 DS the current equation will be as.
RON = 𝑉DS / 𝐼 D
RON = 1 / kn( VGS – VTH )
NMOS As Resistor
When the voltage applied between drain and source, VDS, is kept very small. The device operates as a linear resistor whose value is controlled by VGS.
Ahmad Sarvar
Impacts of length and Width on NMOS Gate Length
The gate length, L, is the distance the electrons have to travel. It is generally set at the minimum value (e.g. .18 micron) for nearly all logic transistors
As the gate length gets shorter, the gate capacitance gets smaller Gate As the gate length gets shorter, Body Source G the current drive of the transistor IG=0 B S
Drain D
also gets larger.
However, leakage current also increases.
ID=IS
IS
Metal oxide
n+
L P-Substrate
n+
W
Impacts of length and Width on NMOS Gate Width
The gate width, W, is determined by the circuit designer.
One uses a wider gate to get more current (and thus charge a capacitor faster).
For example doubling W is the same as putting two equal-sized transistors
Body B in parallel, and thus doubles the current
Source S
Gate G
IG=0
Drain D
at any given voltage.
ID=IS
IS
Metal oxide
n+
L P-Substrate
n+
W
Purpose of NMOS
NMOS is fast than PMOS.
NMOS is used as a Switching and Amplification.
We use it where we have to discharge the some load.
The NMOS switching is great for discharging a node to ground. When VIN goes high (VDD ) then VOUT goes from VDD to ground. When it reaches VDD /2 we call that time the stage delay.
NMOS is used to built CMOS devices.
In CMOS devices NMOS is used as NOT Gate.
Hamza Shoukat
Comparison of NMOS with PMOS NMOS
PMOS
An NMOS the n-type semiconductor, so the charges free to move along the channel are negatively charged (electrons). In this device the gate controls electron flow from source to drain. source N-MOS n
oxide insulator P
drain n
In a PMOS free charges which move from endto-end are positively charged (holes).
In this device the gate controls hole flow from source to drain.
source P-MOS
gate
p
drain p
n-type Si
Comparison of NMOS with PMOS NMOS
PMOS
D
G
B
S
G
B
S D NMOS-Circuit
PMOS-Circuit
Comparison of NMOS with PMOS NMOS “Body” – p-type Source – n-type Drain – n-type VGS – positive VT – positive VDS – positive ID – positive (into drain) NMOS V-I Characteristics
“Body” Source Drain VGS VT VDS ID
PMOS – n-type – p-type – p-type – negative – negative – negative – negative (into drain)
PMOS V-I Characteristics ID
ID
VGS=3V
1 mA
(for IDS = 1mA)
(for IDS = -1mA)
VGS=0 1
2
3
4
VGS= 3V
1 mA
VDS
VGS=0 1
2
3
4
VDS
Mohsin Ali
Summary NMOS
Working
NMOS is the four terminal electronic device. It is a type of semiconductor that charges negatively. So that transistors are turned ON/OFF by the movement of electrons.
NMOS is works on the basis of G’s value it is used in CMOS as a inverter.
Regions
NMOS have four regions. Which are: 1.
Linear / Triode Region
2.
Saturation Region
3.
Cut-off Region
4.
As Resistor Region
Summary VGS >
VTH and VDS < VGS − VTH : The Linear Region
The second mode of operation is the linear region when VGS > VTH and VDS < VGS − VTH. Where the current remains uniform.
ID = kn {2( VGS – VTH )VDS – VDS . VDS } VGS
> VTH and VDS > VGS − Vt: The Saturation Mode
The saturation mode occurs when VGS > VTH and VDS > VGS − VTH. In this mode the switch is on and conducting, however since drain voltage is higher than the gate voltage, part of the channel is turned off. ID = kn {( VGS – VTH ). ( VGS – VTH )}
Summary The
sub-threshold or cut-off mode; VGS < Vt:
where Vt is the threshold voltage. In this mode the device is essentially off, and in the ideal case there is no current flowing through the device.
NMOS As
Resistor
If VDS is very small then NMOS works as Resistor. RON = 𝑉 DS / 𝐼 D RON = 1 / kn( VGS – VTH )
Any Question !!!!
Thanks!
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