Mosfet Amplifier Large Signal Analysis

6.002

CIRCUITS AND ELECTRONICS

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MOSFET Amplifier Large Signal Analysis

Review „

Amp constructed using dependent source control a a′ port

„

DS

b output b′ port

Dependent source in a circuit b

+ –

a + v

i = f (v )

a′ –

b′

„

Superposition with dependent sources: one way tleave all dependent sources in; solve for one independent source at a time [section 3.5.1 of the text]

„

Next, quick review of amp …

Reading: Chapter 7.3–7.7

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Amp review VS RL

vO VCCS

vI

K 2 iD = (vI − 1) 2

+ –

for vI ≥ 1V = 0 otherwise vO = VS − iD RL K (vI − 1)2 2

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Key device Needed: v A

B i = f (v )

voltage controlled current source

C

Let’s look at our old friend, the MOSFET …

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Key device Needed: Our old friend, the MOSFET … First, we sort of lied. The on-state behavior of the MOSFET is quite a bit more complex than either the ideal switch or the resistor model would have you believe.

D G vGS < VT

D

S

S

?

G vGS ≥ VT

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Graphically

Demo iDS

+ vGS –

iDS

egio n

iDS

vGS ≥ VT

vGS < VT

vDS

S MODEL

vGS < VT

vDS = vGS − VT vGS 1 Saturation region

vGS 2

vGS3 ...

vGS ≥ VT

Trio de r

iDS

v+DS –

vDS

SR MODEL

vGS < VT Cutoff

vDS

region

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Graphically

+ vGS –

iDS

iDS

S MODEL

vGS 2

vGS3 ...

vGS < VT

Saturation region

Trio de r

vGS ≥ VT

vDS

vDS = vGS − VT vGS 1

egio n

iDS

vGS ≥ VT

vGS < VT

v+DS –

iDS

vDS

SR MODEL

vGS < VT

vDS

when

vDS ≥ vGS − VT Notice that MOSFET behaves like a current source

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MOSFET SCS Model When

vDS ≥ vGS − VT

the MOSFET is in its saturation region, and the switch current source (SCS) model of the MOSFET is more accurate than the S or SR model

D G vGS < VT S

D

D

G S vGS

G ≥ VT

iDS = f (vGS ) K 2 = (vGS − VT ) 2 S

when

vDS ≥ vGS − VT

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Reconciling the models… iDS

iDS

egio n

iDS

Trio de r

vGS ≥ VT

vGS < VT

vDS

S MODEL for fun!

vGS < VT

Saturation region

vGS 2

vGS3 ...

vGS ≥ VT

vDS = vGS − VT vGS 1

vDS

SR MODEL for digital designs

vGS < VT

v DS

SCS MODEL for analog designs

When to use each model in 6.002? Note: alternatively (in more advanced courses)

vDS ≥ vGS − VT vDS < vGS − VT

use SCS model use SR model

or, use SU Model (Section 7.8 of A&L)

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Back to Amplifier VS vI

AMP

vO

VS RL vI

G

D S

vO K 2 iDS = (vI − VT ) 2 in saturation region

To ensure the MOSFET operates as a VCCS, we must operate it in its saturation region only. To do so, we promise to adhere to the “saturation discipline”

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MOSFET Amplifier VS RL vI

G

D S

vO K 2 iDS = (vI − VT ) 2 in saturation region

To ensure the MOSFET operates as a VCCS, we must operate it in its saturation region only. We promise to adhere to the “saturation discipline.” In other words, we will operate the amp circuit such that vGS ≥ VT and vDS ≥ vGS – VT vO ≥ vI – vT

at all times.

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Let’s analyze the circuit First, replace the MOSFET with its SCS model.

VS RL

vO G

vGS = vI

+ –

+ vI –

D

S

iDS

K 2 = (vI − VT ) 2

A

for vO ≥ v I − VT

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Let’s analyze the circuit VS

RL

vO G

vGS = vI

+ –

+ vI –

D

S

iDS =

K (vI − VT )2 2

A

for vO ≥ v I − VT (vO = vDS in our example)

1

Analytical method: vO vs vI vO = VS − iDS RL B K 2 or vO = VS − (vI − VT ) RL for vI ≥ VT 2 vO ≥ vI − VT

vO = VS

v I < VT (MOSFET turns off) for

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Graphical method vO vs vI K 2 From A : iDS = (vI − VT ) , 2 vO ≥ vI − VT 2

for

⇓ 2iDS vO ≥ K ⇓ K 2 iDS ≤ vO 2

B : iDS =

VS v0 − RL RL

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2

Graphical method vO vs vI K 2 K 2 A : iDS = (vI − VT ) , for iDS ≤ vO 2 2 VS vO = − i B : DS RL RL iDS

VS RL

iDS B

Lo ad

K 2 ≤ vO 2 A

li n e

vI = vGS

VS Constraints

A

and

B

vO

must be met

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2

Graphical method vO vs vI

iDS VS RL

iDS ≤

K 2 vO 2 A

B

vI

VI

I DS

VO

VS

vO

Constraints A and B must be met. Then, given VI, we can find VO, IDS .

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Large Signal Analysis of Amplifier (under “saturation discipline”) 1

vO versus vI

2

Valid input operating range and valid output operating range

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Large Signal Analysis vO versus vI

1

vO

K 2 VS − (vI − VT ) RL 2

VS

VT

vO = vI − VT gets into triode region vI

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Large Signal Analysis What are valid operating ranges under the saturation discipline? vI ≥ VT Our K 2 iDS ≤ vO Constraints vO ≥ v I − VT 2 2

iDS VS RL

iDS ≤

K 2 vO 2

K (vI − VT )2 2 vI VS vO iDS = − RL R L

iDS =

VS

?

vO

vI = VT vO = VS and iDS = 0

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2

Large Signal Analysis

What are valid operating ranges under the saturation discipline?

iDS

iDS

K 2 ≤ vO 2

K 2 iDS = (vI − VT ) 2 vI v V iDS = S − O RL R L vO − 1 + 1 + 2 KRLVS vI = VT + KRL − 1 + 1 + 2 KRLVS vO = KRL VS vO iDS = − RL RL

vI = VT vO = VS and iDS = 0

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Large Signal Analysis Summary 1

vO versus vI vO = VS −

2

K (vI − VT )2 RL 2

Valid operating ranges under the saturation discipline? Valid input range: vI : VT

to

− 1 + 1 + 2 KRLVS VT + KRL

corresponding output range: vO : VS to

− 1 + 1 + 2 KRLVS KRL

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