Models And Parameters For Simulation Of Digita_analog Crosstalk In Deep Submicron Cmos Technology

ESD-MSD Cluster for Mixed-Signal Design Workshop on Substrate Noise in Mixed-Signal ICs IMEC, Leuven (Belgium) September 5-6, 2001

Models and Parameters for Simulation of Digital/Analog Crosstalk in Deep Submicron CMOS Technology Valentino Liberali (*), Roberto Rossi, Guido Torelli (*) Department

of Information Technologies, University of Milano Via Bramante 65, 26013 Crema, Italy

Department of Electronics, University of Pavia Via Ferrata 1, 27100 Pavia, Italy [email protected] V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 1

Outline Difficult aspects in mixed signal design q Software and “humanware” q Analog-digital crosstalk q Crosstalk modeling q Analog design strategies q Simple substrate model q Substrate bias resistance q Package parasitics q Conclusion q Acknowledgement q

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 2

Difficult aspects in mixed system design q

CMOS technology optimized for digital processing

q

Different design methodology and tools for digital and analog design: n n

q

Behavioral (VHDL) for digital Structural (SPICE) for analog

Common physical level introduces coupling between digital and analog devices (crosstalk) that limits analog circuit performance

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 3

Different design concerns Digital designer: capacitive coupling between adjacent wires (signal integrity) q Analog designer: digital noise injection (substrate coupling) q

Both effects, and many others, are present! q There is NO IDEAL CONNECTION: q

n n

On-chip wire inductance and mutual inductance Skin effect in copper wires

n

Need for distributed element models when f c =

n

Parasitic L and C depend on f

c 10l ε r

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 4

The “designer” approach Designers are very conservative (sometimes in a wrong way) q Portability of mixed signal designs to different technologies is not guaranteed q Reuse of analog designs in mixed signal systems does not guarantee correct operation q A silicon demostrator demonstrates that the demonstrator itself is working (self-referencing definition) q

Need for mixed signal design and verification tools as simple as possible q Need for training in mixed-signal design q

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 5

Software and “humanware” q

Design methodology and software tools to increase productivity (time-to-market)

q

Design “specialists” with different methods and complex tools

q

Need for a better undestanding

q

Need for more communication between designers (too many “dialects” spoken in electronics)

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 6

The question Design productivity OR designer consciousness ? V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 7

Definitions q

Model a description or analogy used to help visualize something that cannot be directly observed

q

Parsimony economy in the use of means to an end; especially: economy of explanation in conformity with Occam’s razor (Webster dictionary)

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 8

Why parsimony? q

Software development has forgotten parsimony

q

Computing capability is growing faster that human understanding ⇒ gap between software and humanware

q

Software verification is becoming the new bottleneck

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 9

Analog-digital crosstalk (1) High level simulation can be simple q Digital activity injects switching noise q Epi layer on heavily doped substrate Í high bulk conductivity q

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 10

Analog-digital crosstalk (2) CMOS digital blocks dissipate power only for output level transitions q Low static current (leakage); high switching current q Parasitic inductances due to bonding, package, (and on-chip wires) q

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 11

Analog-digital crosstalk (3) q q

“VDD bounce” and “GND bounce” due to RLC parasitics Non-ideal voltage supplies with peaks up to several hundreds millivolts q

Example: substrate bias voltage with one ring oscillator (17 inverters)

OFF

ON

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 12

Crosstalk modeling (1) q

Exact solution: Maxwell’s equations

q

Approximate methods (proposed in literature) n

n n

Geometry dependence also in vertical direction ⇒ complex 3D problem Strong dependence on process parameters and on layout The accuracy is limited by the less accurate approximation (limiting factor)

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 13

Crosstalk modeling (2) Bonding and package inductance q Voltage drop due to digital switching q Inaccuracies in substrate bias can lead to glitches q

q

Digital disturbs are correlated with clock n n

No white noise model Analysis in time domain

Digital switching device

Injected current noise

Analog device

epi layer resistance

substrate bonding inductances Digital ground

Analog ground

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 14

Crosstalk modeling (3) q

Need for simple models n

q

Analog designers need to evaluate several circuit architectures and topologies

Cross talk model should be: n

n

Suitable for (fast) SPICE simulations Layout independent

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 15

Analog design The “best” analog design for mixed circuits can be different from the “best” standalone design! q Key issues: q

n n

q

Robustness Testability

For a top-down design: n n n n

Estimate ALL parasitics Use simple SPICE models Refine models ONLY when needed Which approximation is the limiting factor?

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 16

Analog design strategies q

Key points for analog design for mixed signal:

q q

Stable power supplies Proper biasing with careful layout

q

Fully differential structures n n

q

Use decoupling capacitances n

q q

Noise is a common mode signal Analog dynamic range is doubled On-chip is most effective

Evaluate several architectures and topologies (if possible) Consider 3D and package

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 17

A simple substrate model q

Heavily doped bulk can be considered a “lumped” node!

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 18

Substrate resistance Consider a careful biasing of substrate q Bias is through the resistive epi layer q Between two points (1) and (2) at the silicon surface: q

No dependence on distance q R bulk negligible q R lin very high q R eq ≈ 2 Repi q

1

Repi

2

Rlin Rbulk

Repi

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 19

Model of substrate resistance Repi = Rarea // R perimeter

with

ρepi ⋅ t Rarea = A ρepi R perimeter = p

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 20

Packaging Packaging parasitics cannot be neglected bonding wire q Bonding wire pad chip inductance: package 1 nH/mm q Package inductance: 5 to 10 nH for a 84-pin PLCC q Package mutual inductance: 4 to 6 nH between adjacent connections q To reduce parasitics: chip q

n

n

“Enhanced” package with exposed metal substrate pads Flip-chip assembling technique (no bonding wire)

pad

package

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 21

SPICE model ANAVDD

DIGVDD

RL

C2

L1 C’’nwell

Vout Rlat1 M1

L6 C’nwell

L7

C7

Vin

C1 M2 Rlat2

R1

R2

Rlat3 bulk node

C3

C4

digital section

R4

VBIAS

C6 Rct R3

L2

L5

M3

C5

R5

analogue section L4

L3 p+ substrate contacts

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 22

Conclusion New mixed-signal design techniques q New CAD tools and models q Simple models (parsimony) q Package will become more and more important q Designer consciousness q “Humanware” will be the key issue q

q

“Everything should be made as simple as possible, but not simpler.” -- Albert Einstein

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 23

Acknowledgement This work was supported by ESPRIT Project 29261 MIXMODEST: Mixed Mode in Deep Submicron Technology q Target: DESIGN OF INTERFACE CIRCUITS FOR SINGLE-CHIP ADSL SYSTEM IN SUBMICRON DIGITAL CMOS TECHNOLOGY q Participants: q

n n n n n n

Alcatel Microelectronics (B) Katholieke Universiteit Leuven (B) Instituto de Microelectrónica de Sevilla (E) Università di Pavia (I); Università di Milano (I) Instituto Superior Técnico, Lisboa (P) ChipIdea (P)

V. Liberali, R. Rossi, G. Torelli: Models and Parameters for Simulation of Digital/Analog Crosstalk ... 24