Instuction For Pic As Assembly
This document was uploaded by user and they confirmed that they have the permission to share it. If you are author or own the copyright of this book, please report to us by using this DMCA report form. Report DMCA
Overview
Download & View Instuction For Pic As Assembly as PDF for free.
More details
- Words: 326
- Pages: 32
PIC16F877 Instruction Set
PIC – INSTRUCTION SET
Dr. Charles J. Kim Howard University
1
F877 Instruction Set 14-Bit Word Byte-Oriented Instruction F: File Register (or RAM) D: Destination ⌧D=0: Destination W ⌧D=1: Destination File Register Bit-Oriented Instruction B: Bit Field F: Register File where the Bit is located Literal and Control Operation K: 8-bit constant 2
General Form of Instruction
3
Instruction List
4
Destination of the result D=0: Destination W D=1: Destination File Register (Default) addwf PORTD ; ⌧Add content of PORTD to content of the W and store the result back into PORTD addwf PORTD, 0 ; ⌧Add content of PORTD to content of the W and store the result into W
5
Register Addressing Modes Immediate Addressing ⌧(ex) MOVLW 0x0F
Direct Addressing
Uses 7 bits of 14 bit instruction to identify a register file address 8th and 9th bit comes from RP0 and RP1 bits of STATUS register. (ex) SSPCON EQU 0x14 STATUS EQU 0x03 SSPSTAT EQU 0x94 BCF STATUS, 0x05 BCF SSPCON, 0x01 BSF STATUS, 0x05 BCF SSPSTAT, 0x02
6
Direct Addressing
7
Indirect Addressing INDF register Any instruction using the INDF actually accesses the register pointed to by the File Select Register (FSR).
A 9-bit EA is obtained by concatenating the 8-bit FSR register and the IRP bit(STATUS<7>) Example: Erase the RAM section of 0x20-0x2F
Movlw Movwf Next clrf incf btfss goto ……
0x20; pointer FSR INDF FSR FSR, 4 next
8
Direct vs. Indirect Addressing
9
Instruction Sets –description convention
10
addlw
11
addwf
12
andlw
13
andwf
14
Bcf & bsf
15
btfsc
16
Btfss
17
Call
18
CLRF & CLRW
19
COMF & DECF
20
DECFSZ
21
GOTO & INCF
22
INCFSZ
23
IORLW & IORWF
24
MOVLW & MOVF
25
MOVWF & NOP
26
RETFIE & RETLW
27
RETURN
28
RLF & RRF
29
SUBLW & SUBWF
30
SWAPF & XORLW
31
XORWF
32
PIC – INSTRUCTION SET
Dr. Charles J. Kim Howard University
1
F877 Instruction Set 14-Bit Word Byte-Oriented Instruction F: File Register (or RAM) D: Destination ⌧D=0: Destination W ⌧D=1: Destination File Register Bit-Oriented Instruction B: Bit Field F: Register File where the Bit is located Literal and Control Operation K: 8-bit constant 2
General Form of Instruction
3
Instruction List
4
Destination of the result D=0: Destination W D=1: Destination File Register (Default) addwf PORTD ; ⌧Add content of PORTD to content of the W and store the result back into PORTD addwf PORTD, 0 ; ⌧Add content of PORTD to content of the W and store the result into W
5
Register Addressing Modes Immediate Addressing ⌧(ex) MOVLW 0x0F
Direct Addressing
Uses 7 bits of 14 bit instruction to identify a register file address 8th and 9th bit comes from RP0 and RP1 bits of STATUS register. (ex) SSPCON EQU 0x14 STATUS EQU 0x03 SSPSTAT EQU 0x94 BCF STATUS, 0x05 BCF SSPCON, 0x01 BSF STATUS, 0x05 BCF SSPSTAT, 0x02
6
Direct Addressing
7
Indirect Addressing INDF register Any instruction using the INDF actually accesses the register pointed to by the File Select Register (FSR).
A 9-bit EA is obtained by concatenating the 8-bit FSR register and the IRP bit(STATUS<7>) Example: Erase the RAM section of 0x20-0x2F
Movlw Movwf Next clrf incf btfss goto ……
0x20; pointer FSR INDF FSR FSR, 4 next
8
Direct vs. Indirect Addressing
9
Instruction Sets –description convention
10
addlw
11
addwf
12
andlw
13
andwf
14
Bcf & bsf
15
btfsc
16
Btfss
17
Call
18
CLRF & CLRW
19
COMF & DECF
20
DECFSZ
21
GOTO & INCF
22
INCFSZ
23
IORLW & IORWF
24
MOVLW & MOVF
25
MOVWF & NOP
26
RETFIE & RETLW
27
RETURN
28
RLF & RRF
29
SUBLW & SUBWF
30
SWAPF & XORLW
31
XORWF
32
Related Documents
Instuction For Pic As Assembly
November 2019 3
Pbis Assembly Pic Collage
October 2019 14
Citadels As With Pic
November 2019 9
Pic As So Trip
April 2020 11
Pic As So
May 2020 7