Iit Kanpur L20_class_ab.pdf

CMOS Analog Circuits

L20: Class C AB amplifier f (24.10.2013)

B. Mazhari B Dept. of EE, IIT Kanpur B. Mazhari, IITK

56 G-Number

Output Stage

+3.3V 1 vS

2 -3.3V

3

v0

RL = 1K

Low output Resistance; Rail-to-Rail voltage swing Low distortion; High efficiency

B. Mazhari, IITK

57 G-Number

CS Amplifier 3.3V

VDD = 3.3V +3

Vbias2

0

RD

(W/L)P M2

-3

vO

vO (W/L)N

1k vin

VSS = -3.3V

vS

Vbias1

M1 -3.3V

VDD I DSQ   33mA RD

B. Mazhari, IITK

I DSQ  3mA

58 G-Number

CD Amplifier

VDD = 3.3

VDD = 3 3.3 3

vO vin

RS VSS =-3.3

3.3 Ibias  ~ 33mA 100

B. Mazhari, IITK

RL = 1K

VBias1 vin

m1 VBias2 m2

vO RL = 1K

VSS =-3.3

I Bias  3.3 3 3mA A

59 G-Number

Class A amplifiers

VDD

VBias2

3.3V

m2 vO

Vbias2

VBias1

M2

m1

vO vS

Vbbias1 as

vin

1k

M1

RL=1k

VSS

-3.3V

In both CS and CD amplifiers, amplifiers the transistor remains ON and conducting throughout out the ac cycle. To achieve this the bias current must be larger than the ac drain current. I ds ids d  I Bias  ids d d  I Bias iL  ids d  I Bias Ids

vo  VDD ids

IBias

t B. Mazhari, IITK

PL  0.5vo  iL  0.5VDD I Bias

1T Pdd  VDD  I Bias Pss    VSS  I ds dt  Vss I Bias T0 PL   0.25 60 Psup ply G-Number

Amplifiers with negligible stand-by power dissipation Ids

VDD

VBias2 m2

ids

vO VBias1

IBias

RL m1 vin

Even when no input is applied, pp power is drawn p from the supply.

t

VSS

An efficient A ffi i t amplifier lifi will ill take t k power from f th supply the l only when power is to be delivered to the load.

Bi currentt mustt be Bias b zero !!

Ids

2 ids R 1T 2 PL   ids dt  RL  max L 4 T0

vO VBias1

RL m1 vin

VSS

V i 1T Pss    VSS  I ds dt  ss ds max T0  B. Mazhari, IITK

ids



t

v  ids max RL   0.785 0 785  o max 4

VSS

VSS

61 G-Number

How do we reduce distortion?

VDD = 3.3

VBias2

vO VBias1

m2

RL

vin

m1

IL

vin

vO RL

IL

VSS

t

t VDD = 3.3

VBias2 m2 vO vin

RL

Each Transistor conducts for only half the cycle resulting in Class B operation

VBias1 m1 B. Mazhari, IITK

VSS

62 G-Number

Class B push-pull amplifier VDD = 3.3

VBias2 m2 vO vin

RL VBias1 m1 VSS

During positive cycle, M2 pushes current into the load, while during the negative cycle, M1 pull current from the load and hence the name Push-Pull amplifier 63

B. Mazhari, IITK

G-Number

VDD = 3.3

0V 700/1

Symmetrical y nmos and p pmos with identical parameters and no body effect for nmos.

m2 700/1 vin

vO RL

0V

m1 VSS

Cross-over distortion

B. Mazhari, IITK

64 G-Number

Note the odd harmonics B. Mazhari, IITK

65 G-Number

VDD = 3.3

0.7V m2 vO vin

RL -0.7V m1 VSS

Psby~24 24 µW W



2.14mW  49.1% @ 2.3V 4.26mW

v   0.785 0 785  o max VSS

For output swing of 3V, efficiency increase c ease to o 71.6% 6%

B. Mazhari, IITK

66 G-Number

VDD = 3.3

0.8V m2 vO vin

RL -0.8V m1 VSS

Psby~2.92mW 2 92 W



2.14mW  43.6% @ 2.2V 4.9mW For output swing of 3V, efficiencyy increase to 68%

B. Mazhari, IITK

67 G-Number

VDD = 3.3

0V 700/1 m2 700/1

vO

vin

RL 0V

m1 VSS

VDD = 3.3

0.7V m2 vO vin

RL -0.7V m1 VSS

VDD = 3.3

0.8V m2 vO vin

RL -0.8V m1

B. Mazhari, IITK

68 G-Number VSS

Distortion can also be reduced by employing negative feedback 3.3V 700/1 M2 100

vS

-100

700/1 M1

vO 1k

-3.3V 3 3V

B. Mazhari, IITK

69 G-Number

0.5um nmos and pmos Tr. With body effect VDD = 3.3

0V 700/1 m2 700/1 vin

vO RL

0V

m1 VSS

Not the strong second harmonic distortion as well resulting from unequal swings in positive and negative p g directions..

B. Mazhari, IITK

70 G-Number

VDD = 3.3

0.7V m2 vO vin

RL -0.86V m1 VSS

Pstb~0 0

B. Mazhari, IITK

71 G-Number

VDD = 3.3

1.0V m2 vO vin

RL -1.16V m1 VSS

Pstb ~0.6mW 06 W

B. Mazhari, IITK

72 G-Number

VDD = 3.3

1.0V m2 vO vin

RL -1.16V m1 VSS

B. Mazhari, IITK

73 G-Number

Class AB Push-Pull amplifier using CS stage

VDD = 3.3

VBias2 m2 vO vin

RL VBias1 m1 VSS

B. Mazhari, IITK

74 G-Number

Symmetrical nmos and pmos with identical parameters and no body effect for nmos. VDD = 3.3

2.6V

700/1 m2 700/1

vin

vO RL=1k

-2.6V m1 VSS

B. Mazhari, IITK

75 G-Number

B. Mazhari, IITK

76 G-Number

B. Mazhari, IITK

77 G-Number

VDD = 3.3

VBias2 m2 vO vin

RL VBias1 m1 VSS

VDD = 3.3

VBias2 Bi 2

VDD = 3.3

VBias2

m2

m2

vO

vO vin

VBias1

RL

m1

VBias1 m1 VSS

Need to address biasing B. Mazhari, IITK

VSS 78 G-Number

Biasing Of Class AB Output Stage ~ VDD  0.7

VDD

VDD

m2

VBias2 m2 vin

VBias3

vO

vin

RL

VBias4

VBias1 m1

~ VSS  0.7

vO

VSS

m1

VBias2

m2

VSS

vO vin B. Mazhari, IITK

VBias1 m1 VSS

79 G-Number

VDD

VDD

m2

m2 VBias3 as3 vin

vO

vin

VBias4

VBias3 vO

m1

VBias4

VSS

m1 VBias2

m2

VSS

vO vin B. Mazhari, IITK

VBias1 m1 VSS

80 G-Number

VDD

m2

VDD

m2 vin

VBias3

VBias3

vO

vO

vin

VBias4 m1

VBias4

VSS

m1 VSS

B. Mazhari, IITK

81 G-Number

VDD

m6

m14 VBias3 vO VBias4

m7

m15

VSS

CS gain i Stage St B. Mazhari, IITK

Class AB Output Stage 82 G-Number

Class AB Buffer Amplifier

C.W. Lu,” High-Speed Class AB Buffer Amplifiers with Accurate Quiescent Current Control B. Mazhari, IITK

83 G-Number

B. Mazhari, IITK

84 G-Number

B. Mazhari, IITK

85 G-Number

Class AB CMOS Pseudo-Source Buffer Amplifier VDD VDD

M6 M6 A1

+

_ Vb1 Vin

Vin

Vout

Vout

RL +

RL

_ Vb2

A2

M6A

M6A VSS

B. Mazhari, IITK

VSS

86 G-Number

VDD VBias2 Folded cascode Load

M5A

M6

M1A

VSS

M2A

Vout

VDD Vin

M1

M2 M6A

Folded cascode Load

VBias1

M5

VSS

(a)

B. Mazhari, IITK

87 G-Number

Positive error amplifier

M44

M45 M52

M54 Vin+

VinM42

M43

Ibn M55

M56

M40

M41 VBIAS

B. Mazhari, IITK

88 G-Number