Final Presentation

Project Title: “Designing Software Defined Radio for GSM Reception”

Director Syndicate Respected

“Lt Col Syed Javed Hussain (Retd) ”

Group Members NC Ahsan Raza NC Saad Naveed GC Asif Azad GC Muhammad Haris

Project Goals:

 Main Goal: Establishing SDR platform and implementing the GSM Receiver on it.  Additional Goals: Designing the GSM transmitter.

Achievements GSM Speech Codec RPE-LTP Compression

rate104kbps to 13kbps. GSM specific Viterbi Decoding. Hardware implementation of GSM modem on TMS320 C671DSK GSM Waveform Implementation on SCA compliant OSSIE.

Softwares Used MATLAB 7 for simulations Microsoft Visual C++ Code Composer studio for DSK implementation Fedora 7 for SCA implementation of SDR on

OSSIE

RPE-LTP CODEC

CONVOLUTION ENCODER

INTERLEAVER

VOICE

DES ENCRYPTION

GMSK MODULATION

TRANSMITTER

SYNCHRONIZATION

SPEECH RPE-LTP CODEC

VETERBI DECODER

DEINTERLEAVER

DES DECRYPTION

DEMODULATION

Speech Coding Speech Encoder RPE-LTP _

+

Linear Prediction 20 ms Speech Block

Long-term Prediction

Excitation Analysis

36 bits

36 bits

Synthesis Filter

188 bits 260 bits

RPE LTP Compression Rate  Input data rate to Speech Coder is 104 kbps  160 samples out of 8000 samples per second correspond to

time of 20 ms  260 bits produced per 20 ms of speech  Output data rate of 13kbps  Compression rate of 8:1

RPE-LTP Components Main Components  Linear Predictive Coding  Long-Term Prediction  Excitation Analysis

Linear Predictive Coding The Linear Prediction Analysis includes Autocorrelation of the 160 samples Levinson Durbin Recursion is performed on

this auto correlated signal to yield the 8 prediction coefficients

Linear Predictive Coding… Conversion of 8 prediction coefficients to

lattice filter coefficients Calculation of Log Area Ratios Coding of parameters 1 and 2 by Coding of parameters 3 and 4 by Coding of parameters 5 and 6 by Coding of parameters 7 and 8 by

6 5 4 3

bits bits bits bits

Long Term Prediction Residual Signal is computed Spitting of the 160 samples in 4 windows of 40

samples Estimation of two parameters for each sub window: Lag and the gain Lag is determined as the peak of the cross-correlation between the current frame and the last two frames Gain is the found by normalizing the cross correlation coefficients.

Long Term Prediction….  The lag and gain parameters are applied to a long-term filter, and a

prediction of the current short-term residual signal is made  Each estimate provides a lag coefficient and gain coefficient of 7 bits and 2 bits, respectively  These four estimates require 4*(7+2) bits = 36 bits  The gain factor in the predicted speech sample ensures that the synthesized speech has the same energy level as the original speech signal  This residual signal is exposed to short term filtering and using short term filtering, long term residual is obtained  This long term residual is filtered using weighted filter coefficients and the filtered long term residual is sent to the next stage of RPE (Regular Pulse Excitation).

Regular Pulse Excitation The Excitation analysis involves the sections

of  RPE decimation  RPE Interpolation  Grid position

Regular Pulse Excitation…  The 40 samples of filtered long term residual obtained are given input

to the RPE decimation section where 40 samples are converted into 4 sequences each of 13 samples

 The energy of these four sequences is computed and the sequence with

the largest energy is chosen

 Grid position is coded with 2 bits  Maximum of that 13 samples is determined and it is coded with 6 bits  13 samples are additionally coded with 3 bits to produce

(2+6+13*3)=47 bits for 40 samples of the filtered long term residual

 These 47 bits are produced for every cycle so after 160 samples of the

residual signal have been processed we get 47*4=188 bits

 Now we have got the 76 parameters comprising of total 260 bits for

frame of 160 samples

Table of Bits for RPE LTP

Channel Coding 260 bits

50 bits

Error Detection

53 bits

50 bits

132 bits

78 bits

Error Correction

456 bit output

Error Detection-Cyclic Redundancy Check

50 bit Class Ia

Zero Padding

Modulo 2 Division

Remainder Padding Remainder

Generator Polynomial X3+X+1

53 bit Output

Error CorrectionConvolution Coding 53 bits from CRC Constraint Length K=5 Rate = 1/2 Generator Polynomials: G1=1+X+X3+X4 G2=1+X3+X4

132 bits (Class Ib)

378 bit Output

1st Output bit

+ Input Bit

1

X

X2

X3

X4

+ 2nd Output bit

Interleaving 456 bits are shuffled in a manner such that 0th

,8th ,16th ,24th bits ..are arranged in first row. 1st,9th,17th,25th….in 2nd row and so on The 8 rows resulting from this shuffling are moreover shuffled by placing odd no rows in first 4 positions and even no. rows in last 4 positions

Interleaving 0 8 16 24 ..

0 8 16 24 ..

1 9 17 25 ..

2 10 18 26 ..

2 10 18 26 ..

4 12 20 28 ..

3 11 19 27 ..

6 14 22 30 ..

456 bits

01101101

456 Shuffled bits

11010011 4 12 20 28 ..

1 9 17 25 ..

5 13 21 29 ..

3 11 19 27 ..

6 14 22 30 ..

5 13 21 29 ..

7 15 23 31 ..

7 15 23 31 ..

Encryption-DES 56 Bit key

64 Bit plaintext Initial Permutations

Permuted Choice 1 K1

Round 1

Permuted Choice 2

Left Circular Shift

Permuted Choice 2

Left Circular Shift

Permuted Choice 2

Left Circular Shift

K2 Round 2

K16 Round 16

32 Bit Swap

Inverse Initial Permutations

DES-Round Details

DES-Round Details

Modulation Demodulation Recovered Data Stream

011011100

NRZ Sequence

Gaussian Filter

Exp(.)

Baseband Channel Model

One Bit Delay

Imag(.)

conj(.)

Timing Recovery

GMSK Modulation Conversion of bits to NRZ sequence Shaping of NRZ sequence by Gaussian filter Integration of convolved sequence to get in Scaling for pi/2 phase change I and Q channel computation

GMSK

GMSK Demodulation Non Coherent Detection Complex GMSK signal delayed by one bit Multiplication of complex GMSK signal with

delayed GMSK signal Imaginary part of GMSK contains phase information Synchronization is applied to recover bit sequence

GMSK Demodulation

Synchronization r(t)

r(mTs) Sampling

y(kTi) Interpolator

Gardener TED m(k)

mu(k)

x(kTi) M x(kMTi)

Integrator

Loop Filter y(kMTi)

DES Decryption

De Interleave The rows are arranged in the order so that the

original order is restored Then the bits are read column wise so the original order of the 456 bits is restored Data is correspondingly fed to the Viterbi decoder for further processing.

Deinterleavi ng 0 8 16 24 ..

0 8 16 24 ..

2 10 18 26 ..

1 9 17 25 ..

4 12 20 28 ..

2 10 18 26 ..

456 Shuffled bits

456 bits

6 14 22 30 ..

3 11 19 27 ..

11010011

01101101 1 9 17 25 ..

4 12 20 28 ..

3 11 19 27 ..

5 13 21 29 ..

5 13 21 29 ..

6 14 22 30 ..

7 15 23 31 ..

7 15 23 31 ..

Viterbi Decoding State Diagram (K=5, r=1/2)

0000 1001

0001 1000 0010 0100 1010

1101

1100 1110

0110 0101

1111

0111

0011 1011

Trellis Diagram 0000 0001

00

0000

00

0000

00

0000

00

0000

0001

0001

0001

0001

0010

0010

0010

0010

0010

0011

0011

0011

0011

0011

0100

0100

0100

0100

0100

0101

0101

0101

0101

0101

0110

0110

0110

0110

0110

0111

0111

0111

0111

0111

1000

1000

1000

1000

1000

1001

1001

1001

1001

1001

1010

1010

1010

1010

1011

1011

1011

1011

1011

1100

1100

1100

1100

1100

1101

1101

1101

1101

1101

1110

1110

1110

1110

1110

1111

1111

1111

1111

1111

11

10

00

1010

00

11

10

01

Speech Decoding  The RPE LTP decoder works separates the incoming 260 bits

on the basis of the 76 parameters  We proceed by decoding the bits and obtaining the speech parameters  We obtain the long term residual from the quantized residual sequences and then estimate the short term residual from the long term residual  Finally the speech is synthesized from the filtering of the short term residual with the recovered prediction coefficients  The recovered speech is processed to improve its quality and then it is passed to the D/A converter to be played back via speaker.

Speech Decoding RPE-LTP Decoder

Xn

DEMUX

Grid Position RPE Decoding

Pn’ gn LARn(k)

LTP Synthesis Filter

STP Synthesis Filter

Post Processing

Output

Speech

Software Communication Architecture The SCA is a common open architecture that is used to

build a family of radios across multiple domains. The radios built upon SCA are interoperable, can use a wide range of frequencies, and enable technology insertion. The radios support multiple waveforms. It supports software reusability.

SCA Consist of  Core Framework 

The CF describes the interfaces, their purposes and their operations

 CORBA 

Middleware is a layer of software between the applications and the underlying network

 POSIX based OS 

Portable Operating System Interface

Goals Of SCA has been published to meet the following goals  Common Open Architecture  Multiple Domains  Multiple Bands  Compatibility  Upgrades  Security  Networking  Software Reusability

OSSIE OSSIE is a LINUX based implementation of

SCA, introduced by Virginia Tech. http://ossie.wireless.vt.edu/trac It is intended to enable research in SDR and wireless communications. It provides necessary SCA tools for development of SDR components and waveforms.

This is an environment that integrates the

CORBA services, XML and UML and IDL. It enables you to design your waveform components in C / C++.

Creating Component

OSSIE Component Editor OSSIE component editor allows you to design

a component for your waveform. The input and output ports are to be defined according to the requirement. The component is needed to be programmed in C. Component once compiled will be registered in the OWD.

OSSIE Waveform Developer OWD is a tool for generating different

waveforms. Components are connected together and attached to a device, in our case the processor of my PC.

Simple Waveform

GSM Waveform

Waveforms All the waveforms generated are present in a

folder. Any of the waveform can be loaded on to the device and executed. Real time shifting onto multiple waveforms.

Loading Waveforms

Output of Transmitter

Output Of Receiver

DSK Implementation C6713 Floating Point DSP was used 225 MHz Clock, 96KHz A/D and D/A converters 16 MByte SDRAM

DSP Kit Implementation

DIGITAL DOWN CONVERSION  Digital down conversion is a technique that takes a band

limited high sample rate digitized signal.  This technique mixes the signal to a lower frequency and

reduces the sample rate while retaining all the information  It is a fundamental part of many communication systems.

COMPONENTS OF DIGITAL DOWNCONVERTER (DDC) Numerically Controlled Oscillator (NCO) Mixer Low pass filter Decimator

DDC BLOCK DIAGRAM

DIRECT DIGITAL SYNTHESIS (DDS) It is a technique for using digital data processing

blocks as a means to generate a frequency tunable output signal referenced to a fixed-frequency clock source. The introduction of the phase accumulator in the DDS

architecture in place of address counter forms numerically controlled oscillator (NCO)

NCO BLOCK DIAGRAM

DIGITAL PHASE WHEEL

FORMULA FOR OUTPUT FREQUENCY

where  fo = the output frequency of the NCO  M = value of the binary tuning word made of N bits  fc = the internal reference clock frequency (system clock)  N = The length in bits of the phase accumulator  2^N = Total number of points on the phase wheel

SIGNAL FLOW THROUGH NCO

MATLAB IMPLEMENTATION GENERATED BANDPASS SIGNAL Frequency domain representation

MATLAB IMPLEMENTATION Cont.. GENERATED BANDPASS SIGNAL Time domain representation

MATLAB IMPLEMENTATION Cont.. OUTPUT OF NCO The results shown in the next slide are for the following Specifications  Tuning word value

=

64

 Clock frequency

=

12800 Hz

 Output frequency

=

1600 Hz

MATLAB IMPLEMENTATION Cont..

MATLAB IMPLEMENTATION Cont.. OUTPUT OF MIXER

MATLAB IMPLEMENTATION Cont.. OUTPUT OF LOW PASS FILTER Frequency domain representation

MATLAB IMPLEMENTATION Cont.. OUTPUT OF LOW PASS FILTER Time domain representation

MATLAB IMPLEMENTATION Cont.. OUTPUT OF DECIMATOR Time domain representation